Difference between revisions of "Taiwan Semiconductor Manufacturing Company, Ltd. patent applications published on March 14th, 2024"
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+ | '''Summary of the patent applications from Taiwan Semiconductor Manufacturing Company, Ltd. on March 14th, 2024''' | ||
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+ | The Taiwan Semiconductor Manufacturing Company, Ltd. has recently filed patents for memory cells with unique designs and improved performance. These patents include memory cells with extended upper electrodes, efficient memory cell layouts, and ferroelectric memory cells integrated with active and passive devices. The memory cells described in the patents aim to enhance data storage capabilities, increase device reliability, and improve semiconductor device performance. | ||
+ | |||
+ | Notable applications of these patents include: | ||
+ | * Memory storage devices | ||
+ | * Semiconductor manufacturing | ||
+ | * Data storage devices | ||
+ | * Computer memory modules | ||
+ | * Embedded systems | ||
+ | * Computing systems | ||
+ | * Data processing applications | ||
+ | * Sensing technology | ||
+ | * Energy harvesting devices | ||
+ | * Actuators and transducers | ||
+ | * Integrated circuit design | ||
+ | * Memory cell technology | ||
+ | * IoT devices | ||
+ | |||
+ | These patents address the need for efficient memory cell design, improved connectivity, enhanced data storage capacity, increased device reliability, and higher memory capacity in a smaller footprint. The innovations described in the patents offer potential benefits such as enhanced performance, increased reliability, energy efficiency improvements, and improved overall semiconductor structure efficiency. | ||
+ | |||
+ | |||
+ | |||
+ | |||
==Patent applications for Taiwan Semiconductor Manufacturing Company, Ltd. on March 14th, 2024== | ==Patent applications for Taiwan Semiconductor Manufacturing Company, Ltd. on March 14th, 2024== | ||
Latest revision as of 03:06, 19 March 2024
Summary of the patent applications from Taiwan Semiconductor Manufacturing Company, Ltd. on March 14th, 2024
The Taiwan Semiconductor Manufacturing Company, Ltd. has recently filed patents for memory cells with unique designs and improved performance. These patents include memory cells with extended upper electrodes, efficient memory cell layouts, and ferroelectric memory cells integrated with active and passive devices. The memory cells described in the patents aim to enhance data storage capabilities, increase device reliability, and improve semiconductor device performance.
Notable applications of these patents include:
- Memory storage devices
- Semiconductor manufacturing
- Data storage devices
- Computer memory modules
- Embedded systems
- Computing systems
- Data processing applications
- Sensing technology
- Energy harvesting devices
- Actuators and transducers
- Integrated circuit design
- Memory cell technology
- IoT devices
These patents address the need for efficient memory cell design, improved connectivity, enhanced data storage capacity, increased device reliability, and higher memory capacity in a smaller footprint. The innovations described in the patents offer potential benefits such as enhanced performance, increased reliability, energy efficiency improvements, and improved overall semiconductor structure efficiency.
Contents
- 1 Patent applications for Taiwan Semiconductor Manufacturing Company, Ltd. on March 14th, 2024
- 1.1 MICRO-ELECTRO MECHANICAL SYSTEM AND MANUFACTURING METHOD THEREOF (18510628)
- 1.2 SEALING ARTICLE COMPRISING METAL COATING, METHOD OF MAKING AND METHOD OF USING THE SAME (18513448)
- 1.3 SEMICONDUCTOR PROCESSING TOOL (18517387)
- 1.4 SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION (18166196)
- 1.5 DISPLACEMENT CONTROL DEVICE FOR SEISMIC EVENTS (18511070)
- 1.6 GALLIUM NITRIDE-BASED DEVICES AND METHODS OF TESTING THEREOF (18516106)
- 1.7 Photonic Package and Method of Manufacture (18153116)
- 1.8 SEMICONDUCTOR STRUCTURE (18513611)
- 1.9 Signal Communication Through Optical-Engine Based Interconnect Component (18151033)
- 1.10 FLAT OPTICS CAMERA MODULE FOR HIGH QUALITY IMAGING (18313459)
- 1.11 CLEANING METHOD FOR PHOTO MASKS AND APPARATUS THEREFOR (18517828)
- 1.12 TARGET CONTROL IN EXTREME ULTRAVIOLET LITHOGRAPHY SYSTEMS USING ABERRATION OF REFLECTION IMAGE (18508195)
- 1.13 LENS ADJUSTMENT FOR AN EDGE EXPOSURE TOOL (18517070)
- 1.14 TECHNIQUES FOR CORRECTION OF ABERRATIONS (18517635)
- 1.15 MULTI-METAL FILL WITH SELF-ALIGNED PATTERNING AND DIELECTRIC WITH VOIDS (18514254)
- 1.16 FREQUENCY-PICKED METHODOLOGY FOR DIFFRACTION-BASED OVERLAY MEASUREMENT (18517653)
- 1.17 PARTICLE REMOVAL METHOD (18513893)
- 1.18 DIGITAL LOW-DROPOUT VOLTAGE REGULATOR (18452423)
- 1.19 IMPEDANCE MEASUREMENT CIRCUIT AND IMPEDANCE MEASUREMENT METHOD THEREOF (18516954)
- 1.20 NEAR EYE DISPLAY APPARATUS (18518429)
- 1.21 COMPUTATION METHOD AND COMPUTATION APPARATUS WITH INPUT SWAPPING (18150810)
- 1.22 METHOD AND SYSTEM TO GENERATE PERFORMANCE-DATA-LIBRARY ASSOCIATED WITH STANDARD-CELL-LIBRARY (18158159)
- 1.23 SYSTEMS AND METHODS FOR INTEGRATED CIRCUIT LAYOUT (18518167)
- 1.24 INTEGRATED CIRCUIT DESIGN METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT (18170111)
- 1.25 BLOCK LEVEL DESIGN METHOD FOR HETEROGENEOUS PG-STRUCTURE CELLS (18513349)
- 1.26 BASE LAYOUT CELL (18514356)
- 1.27 INTEGRATED CIRCUIT FIN STRUCTURE (18517400)
- 1.28 SYSTEM AND METHOD OF VERIFYING SLANTED LAYOUT COMPONENTS (18516499)
- 1.29 BACK END FLOATING GATE STRUCTURE IN A SEMICONDUCTOR DEVICE (18150410)
- 1.30 SRAM ARCHITECTURE FOR CONVOLUTIONAL NEURAL NETWORK APPLICATION (18518151)
- 1.31 MEMORY DEVICE, MEMORY CELL READ CIRCUIT, AND CONTROL METHOD FOR MISMATCH COMPENSATION (18518578)
- 1.32 LOW POWER WAKE UP FOR MEMORY (18518157)
- 1.33 MEMORY DEVICE WITH SELECTIVE PRECHARGING (18362662)
- 1.34 BUFFER CONTROL OF MULTIPLE MEMORY BANKS (18516143)
- 1.35 MEMORY DEVICE WITH GLOBAL AND LOCAL LATCHES (18516641)
- 1.36 STRESSING ALGORITHM FOR SOLVING CELL-TO-CELL VARIATIONS IN PHASE CHANGE MEMORY (18516733)
- 1.37 MEMORY CELL (18167437)
- 1.38 SYSTEMS AND METHODS TO DETECT CELL-INTERNAL DEFECTS (18512792)
- 1.39 MRAM STACKS, MRAM DEVICES AND METHODS OF FORMING THE SAME (18519085)
- 1.40 IN-SITU CLOSED-LOOP MANAGEMENT OF RADIO FREQUENCY POWER GENERATOR (18511845)
- 1.41 PERMEANCE MAGNETIC ASSEMBLY (18513313)
- 1.42 SEMICONDUCTOR WAFER CLEANING APPARATUS (18517194)
- 1.43 INTEGRATE RINSE MODULE IN HYBRID BONDING PLATFORM (18509053)
- 1.44 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17896726)
- 1.45 LINE-END EXTENSION METHOD AND DEVICE (18516719)
- 1.46 MULTIPLE DIE STRUCTURE AND METHOD OF FABRICATING THEREOF (18156960)
- 1.47 PACKAGE STRUCTURE (18510646)
- 1.48 ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION PROCESS (18514010)
- 1.49 SEMICONDUCTOR SUBSTRATE BONDING TOOL AND METHODS OF OPERATION (18517457)
- 1.50 SPACE FILLING DEVICE FOR WET BENCH (18514859)
- 1.51 FRAME CASSETTE WITH INTERNAL COVER CASES (18171288)
- 1.52 SEMICONDUCTOR DIE CARRIER STRUCTURE (18514268)
- 1.53 INTERFACE TOOL (18515616)
- 1.54 PICK-AND-PLACE TOOL WITH WARPAGE-CORRECTION MECHANISM (18171315)
- 1.55 SEMICONDUCTOR PROCESSING APPARATUS AND METHOD UTILIZING ELECTROSTATIC DISCHARGE (ESD) PREVENTION LAYER (18516703)
- 1.56 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING (18152477)
- 1.57 ENLARGING CONTACT AREA AND PROCESS WINDOW FOR A CONTACT VIA (18511102)
- 1.58 Semiconductor Device Structure with Interconnect Structure and Method for Forming the Same (18512682)
- 1.59 Metal Contact Structure and Method of Forming the Same in a Semiconductor Device (18518081)
- 1.60 GAP PATTERNING FOR METAL-TO-SOURCE/DRAIN PLUGS IN A SEMICONDUCTOR DEVICE (18507138)
- 1.61 Fin Loss Prevention (18516408)
- 1.62 APPARATUS FOR DETECTING END POINT (18510693)
- 1.63 DISPLAY DEFECT MONITORING STRUCTURE (18171286)
- 1.64 INTEGRATED CIRCUIT COMPONENT AND PACKAGE STRUCTURE HAVING THE SAME (18513649)
- 1.65 SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME (18515264)
- 1.66 ETCHING-DAMAGE-FREE INTERMETAL DIELECTRIC LAYER WITH THERMAL DISSIPATION FEATURE (18170933)
- 1.67 SEMICONDUCTOR DEVICE (18510599)
- 1.68 THROUGH-SUBSTRATE-VIA WITH REENTRANT PROFILE (18511016)
- 1.69 SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME (18516971)
- 1.70 Metal-Insulator-Metal Structure (18511438)
- 1.71 SIDEWALL SPACER STRUCTURE ENCLOSING CONDUCTIVE WIRE SIDEWALLS TO INCREASE RELIABILITY (18512139)
- 1.72 SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME (18515130)
- 1.73 SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS (18517354)
- 1.74 SEMICONDUCTOR STRUCTURE AND METHOD MAKING THE SAME (18519516)
- 1.75 PASSIVE DEVICES IN BONDING LAYERS (18155569)
- 1.76 INTEGRATED CIRCUIT WITH GUARD RING (18508766)
- 1.77 SEMICONDUCTOR PACKAGES (18518448)
- 1.78 HYBRID CUT METAL GATE TO ACHIEVE MINIMUM CELL PITCHES, REDUCING ROUTING AND RISING THE YIELD (18158137)
- 1.79 SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME (18186206)
- 1.80 CHIP STRUCTURE AND METHOD OF FABRICATING THE SAME (18152153)
- 1.81 Chamfered Die of Semiconductor Package and Method for Forming the Same (18514126)
- 1.82 METHOD OF FORMING SEMICONDUCTOR DEVICE (18510091)
- 1.83 Stacking Via Structures for Stress Reduction (18517489)
- 1.84 PACKAGE STRUCTURE (18518456)
- 1.85 SEMICONDUCTOR PACKAGE (18518466)
- 1.86 PACKAGE STRUCTURE (18516974)
- 1.87 THICK REDISTRIBUTION LAYER FEATURES (18184480)
- 1.88 Packaged Memory Device and Method (18150034)
- 1.89 PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME (18516753)
- 1.90 CHIP PACKAGE STRUCTURE (18518790)
- 1.91 Integrated Circuit Packages and Methods of Forming the Same (18149793)
- 1.92 FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE (18518794)
- 1.93 ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME (18163410)
- 1.94 3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES (18512092)
- 1.95 PACKAGES WITH METAL LINE CRACK PREVENTION DESIGN (18517232)
- 1.96 PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME (18515274)
- 1.97 BUFFER DESIGN FOR PACKAGE INTEGRATION (18517330)
- 1.98 Integrated Circuit Package and Method (18518187)
- 1.99 CELL STRUCTURE HAVING DIFFERENT POLY EXTENSION LENGTHS (18517276)
- 1.100 STACK-GATE CIRCUIT (18517377)
- 1.101 SHARED WELL STRUCTURE MANUFACTURING METHOD (18518706)
- 1.102 INTEGRATED CIRCUIT DEVICE (18519460)
- 1.103 HIGH ESD IMMUNITY FIELD-EFFECT DEVICE AND MANUFACTURING METHOD THEREOF (18513254)
- 1.104 ELECTROSTATIC DISCHARGE (ESD) ARRAY WITH BACK END OF LINE (BEOL) CONNECTION IN A CARRIER WAFER (18513544)
- 1.105 POLYSILICON RESISTOR STRUCTURES (18516311)
- 1.106 INTEGRATED CIRCUIT DEVICE INCLUDING A POWER SUPPLY LINE AND METHOD OF FORMING THE SAME (18511533)
- 1.107 GATE STRUCTURE, FIN FIELD-EFFECT TRANSISTOR, AND METHOD OF MANUFACTURING FIN-FIELD EFFECT TRANSISTOR (18518413)
- 1.108 INTEGRATED CIRCUITS WITH GATE CUT FEATURES (18519263)
- 1.109 INTEGRATED CIRCUIT HAVING TRANSISTORS WITH DIFFERENT WIDTH SOURCE AND DRAIN TERMINALS (18152007)
- 1.110 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (18152775)
- 1.111 SEMICONDUCTOR STRUCTURE WITH HIGH INTEGRATION DENSITY AND METHOD FOR MANUFACTURING THE SAME (18169628)
- 1.112 BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY (18515912)
- 1.113 AIR GAP FORMATION BETWEEN GATE SPACER AND EPITAXY STRUCTURE (18510370)
- 1.114 SEMICONDUCTOR DEVICE (18518459)
- 1.115 WAVE GUIDE FILTER FOR SEMICONDUCTOR IMAGING DEVICES (18515829)
- 1.116 DEEP TRENCH ISOLATION STRUCTURE FOR HIGH RESOLUTION CIS PIXEL (18149240)
- 1.117 IMAGE SENSOR DEVICE (18511731)
- 1.118 Metal-Insulator-Metal Capacitors And Methods Of Forming The Same (18188196)
- 1.119 CAPACITANCE STRUCTURE (18510787)
- 1.120 SEMICONDUCTOR DEVICE STRUCTURE WITH METAL OXIDE LAYER AND METHOD FOR FORMING THE SAME (18152950)
- 1.121 TRENCH PATTERN FOR TRENCH CAPACITOR YIELD IMPROVEMENT (18512096)
- 1.122 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (18518797)
- 1.123 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES (18126298)
- 1.124 MELT ANNEAL SOURCE AND DRAIN REGIONS (18508788)
- 1.125 Gate Structures For Semiconductor Devices (18516215)
- 1.126 SEMICONDUCTOR DEVICE HAVING 2D CHANNEL LAYER (18515148)
- 1.127 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE (18518170)
- 1.128 Contacts for Semiconductor Devices and Methods of Forming the Same (18517458)
- 1.129 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18518585)
- 1.130 CONTROL GATE STRAP LAYOUT TO IMPROVE A WORD LINE ETCH PROCESS WINDOW (18510991)
- 1.131 SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF (18507957)
- 1.132 FIELD EFFECT TRANSISTORS WITH DUAL SILICIDE CONTACT STRUCTURES (18516410)
- 1.133 EPITAXIAL FIN STRUCTURES OF FINFET HAVING AN EPITAXIAL BUFFER REGION AND AN EPITAXIAL CAPPING REGION (18511711)
- 1.134 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18518131)
- 1.135 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18518190)
- 1.136 SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME (18153646)
- 1.137 HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) WITH A BACK BARRIER LAYER (18513404)
- 1.138 ROUGH BUFFER LAYER FOR GROUP III-V DEVICES ON SILICON (18513942)
- 1.139 LOW-FREQUENCY NOSIE TRANSISTORS WITH CURVED CHANNELS (18171362)
- 1.140 TRANSISTOR, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF TRANSISTOR (18510506)
- 1.141 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE (18515908)
- 1.142 A SEMICONDUCTOR DEVICE FOR RECESSED FIN STRUCTURE HAVING ROUNDED CORNERS (18517565)
- 1.143 SEMICONDUCTOR PACKAGE AND FORMING METHOD THEREOF (18513644)
- 1.144 Failsafe Input/Output Electrostatic Discharge Protection With Diodes (18515580)
- 1.145 METHOD AND CIRCUIT TO ISOLATE BODY CAPACITANCE IN SEMICONDUCTOR DEVICES (18513103)
- 1.146 POST-DRIVER WITH LOW VOLTAGE OPERATION AND ELECTROSTATIC DISCHARGE PROTECTION (18517024)
- 1.147 CMOS SCHMITT TRIGGER RECEIVER FOR THIN OXIDE TECHNOLOGY (18448008)
- 1.148 LOW POWER CLOCK NETWORK (18517017)
- 1.149 Device Signature Based On Trim And Redundancy Information (18515613)
- 1.150 PHYSICAL UNCLONABLE FUNCTION (PUF) SECURITY KEY GENERATION (18517801)
- 1.151 SEMICONDUCTOR DEVICE INCLUDING UNILATERALLY EXTENDING GATES AND METHOD OF FORMING SAME (18519559)
- 1.152 MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF (18514796)
- 1.153 SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPES (18518142)
- 1.154 METHOD FOR IMPROVING CONTROL GATE UNIFORMITY DURING MANUFACTURE OF PROCESSORS WITH EMBEDDED FLASH MEMORY (18515523)
- 1.155 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME (18515961)
- 1.156 SEMICONDUCTOR STRUCTURE (18518579)
- 1.157 GRID STRUCTURE TO REDUCE DOMAIN SIZE IN FERROELECTRIC MEMORY DEVICE (18510975)
- 1.158 MEMORY ARRAY AND OPERATION METHOD THEREOF (18151483)
- 1.159 INTEGRATED CIRCUIT INCLUDING THREE-DIMENSIONAL MEMORY DEVICE (18516908)
- 1.160 FERROELECTRIC MEMORY CELL (18511461)
- 1.161 MRAM DEVICE HAVING SELF-ALIGNED SHUNTING LAYER (18513968)
- 1.162 PIEZOELECTRIC DEVICE AND METHOD OF FORMING THE SAME (18513640)
- 1.163 METHOD OF FABRICATING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM) (18512515)
- 1.164 MEMORY CELL WITH TOP ELECTRODE VIA (18511133)
- 1.165 MAGNETIC TUNNEL JUNCTION STRUCTURES AND RELATED METHODS (18516751)
- 1.166 MEMORY CELL, METHOD OF FORMING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME (18515226)
Patent applications for Taiwan Semiconductor Manufacturing Company, Ltd. on March 14th, 2024
MICRO-ELECTRO MECHANICAL SYSTEM AND MANUFACTURING METHOD THEREOF (18510628)
Main Inventor
Ting-Li YANG
SEALING ARTICLE COMPRISING METAL COATING, METHOD OF MAKING AND METHOD OF USING THE SAME (18513448)
Main Inventor
Peng-Cheng Hong
SEMICONDUCTOR PROCESSING TOOL (18517387)
Main Inventor
Yung-Tsun LIU
SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION (18166196)
Main Inventor
Che Wei YANG
DISPLACEMENT CONTROL DEVICE FOR SEISMIC EVENTS (18511070)
Main Inventor
Chuan-Chieh Chiang
GALLIUM NITRIDE-BASED DEVICES AND METHODS OF TESTING THEREOF (18516106)
Main Inventor
Yi-An Lai
Photonic Package and Method of Manufacture (18153116)
Main Inventor
Chen-Hua Yu
SEMICONDUCTOR STRUCTURE (18513611)
Main Inventor
Hsien-Wei Chen
Signal Communication Through Optical-Engine Based Interconnect Component (18151033)
Main Inventor
Hsing-Kuo Hsia
FLAT OPTICS CAMERA MODULE FOR HIGH QUALITY IMAGING (18313459)
Main Inventor
Jung-Huei Peng
CLEANING METHOD FOR PHOTO MASKS AND APPARATUS THEREFOR (18517828)
Main Inventor
Hsin-Chang LEE
TARGET CONTROL IN EXTREME ULTRAVIOLET LITHOGRAPHY SYSTEMS USING ABERRATION OF REFLECTION IMAGE (18508195)
Main Inventor
Ting-Ya CHENG
LENS ADJUSTMENT FOR AN EDGE EXPOSURE TOOL (18517070)
Main Inventor
Yong-Ting WU
TECHNIQUES FOR CORRECTION OF ABERRATIONS (18517635)
Main Inventor
Min-Cheng WU
MULTI-METAL FILL WITH SELF-ALIGNED PATTERNING AND DIELECTRIC WITH VOIDS (18514254)
Main Inventor
Tai-I Yang
FREQUENCY-PICKED METHODOLOGY FOR DIFFRACTION-BASED OVERLAY MEASUREMENT (18517653)
Main Inventor
Hung-Chih HSIEH
PARTICLE REMOVAL METHOD (18513893)
Main Inventor
Chih-Yuan YAO
DIGITAL LOW-DROPOUT VOLTAGE REGULATOR (18452423)
Main Inventor
Po-Yu LAI
IMPEDANCE MEASUREMENT CIRCUIT AND IMPEDANCE MEASUREMENT METHOD THEREOF (18516954)
Main Inventor
Tsung-Che Lu
NEAR EYE DISPLAY APPARATUS (18518429)
Main Inventor
Jheng-Hong Jiang
COMPUTATION METHOD AND COMPUTATION APPARATUS WITH INPUT SWAPPING (18150810)
Main Inventor
Win-San Khwa
METHOD AND SYSTEM TO GENERATE PERFORMANCE-DATA-LIBRARY ASSOCIATED WITH STANDARD-CELL-LIBRARY (18158159)
Main Inventor
Johnny Chiahao LI
SYSTEMS AND METHODS FOR INTEGRATED CIRCUIT LAYOUT (18518167)
Main Inventor
Kenan Yu
INTEGRATED CIRCUIT DESIGN METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT (18170111)
Main Inventor
Cheng-YU LIN
BLOCK LEVEL DESIGN METHOD FOR HETEROGENEOUS PG-STRUCTURE CELLS (18513349)
Main Inventor
Yen-Hung LIN
BASE LAYOUT CELL (18514356)
Main Inventor
Shang-Hsuan Chiu
INTEGRATED CIRCUIT FIN STRUCTURE (18517400)
Main Inventor
Po-Hsiang HUANG
SYSTEM AND METHOD OF VERIFYING SLANTED LAYOUT COMPONENTS (18516499)
Main Inventor
Yuan-Te Hou
BACK END FLOATING GATE STRUCTURE IN A SEMICONDUCTOR DEVICE (18150410)
Main Inventor
Yun-Feng KAO
SRAM ARCHITECTURE FOR CONVOLUTIONAL NEURAL NETWORK APPLICATION (18518151)
Main Inventor
Jaw-Juinn Horng
MEMORY DEVICE, MEMORY CELL READ CIRCUIT, AND CONTROL METHOD FOR MISMATCH COMPENSATION (18518578)
Main Inventor
Ku-Feng Lin
LOW POWER WAKE UP FOR MEMORY (18518157)
Main Inventor
Sanjeev Kumar Jain
MEMORY DEVICE WITH SELECTIVE PRECHARGING (18362662)
Main Inventor
Ed McCombs
BUFFER CONTROL OF MULTIPLE MEMORY BANKS (18516143)
Main Inventor
Shih-Lien Linus Lu
MEMORY DEVICE WITH GLOBAL AND LOCAL LATCHES (18516641)
Main Inventor
Atul Katoch
STRESSING ALGORITHM FOR SOLVING CELL-TO-CELL VARIATIONS IN PHASE CHANGE MEMORY (18516733)
Main Inventor
Jau-Yi WU
MEMORY CELL (18167437)
Main Inventor
Jhon-Jhy Liaw
SYSTEMS AND METHODS TO DETECT CELL-INTERNAL DEFECTS (18512792)
Main Inventor
Ankita Patidar
MRAM STACKS, MRAM DEVICES AND METHODS OF FORMING THE SAME (18519085)
Main Inventor
Shy-Jay Lin
IN-SITU CLOSED-LOOP MANAGEMENT OF RADIO FREQUENCY POWER GENERATOR (18511845)
Main Inventor
Wei Ting LIU
PERMEANCE MAGNETIC ASSEMBLY (18513313)
Main Inventor
Tsung-Jen YANG
SEMICONDUCTOR WAFER CLEANING APPARATUS (18517194)
Main Inventor
Chia-Lun CHEN
INTEGRATE RINSE MODULE IN HYBRID BONDING PLATFORM (18509053)
Main Inventor
Xin-Hua Huang
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (17896726)
Main Inventor
Yu-Lien HUANG
LINE-END EXTENSION METHOD AND DEVICE (18516719)
Main Inventor
Chih-Min HSIAO
MULTIPLE DIE STRUCTURE AND METHOD OF FABRICATING THEREOF (18156960)
Main Inventor
Chieh-Lung LAI
PACKAGE STRUCTURE (18510646)
Main Inventor
Feng-Cheng Hsu
ANTI-OXIDATION LAYER TO PREVENT DIELECTRIC LOSS FROM PLANARIZATION PROCESS (18514010)
Main Inventor
Zhen Yu Guan
SEMICONDUCTOR SUBSTRATE BONDING TOOL AND METHODS OF OPERATION (18517457)
Main Inventor
Yen-Hao HUANG
SPACE FILLING DEVICE FOR WET BENCH (18514859)
Main Inventor
Yen-Ji CHEN
FRAME CASSETTE WITH INTERNAL COVER CASES (18171288)
Main Inventor
Jen-Yuan Chang
SEMICONDUCTOR DIE CARRIER STRUCTURE (18514268)
Main Inventor
Tzu-Chung TSAI
INTERFACE TOOL (18515616)
Main Inventor
Jyh-Shiou HSU
PICK-AND-PLACE TOOL WITH WARPAGE-CORRECTION MECHANISM (18171315)
Main Inventor
Jen-Yuan Chang
SEMICONDUCTOR PROCESSING APPARATUS AND METHOD UTILIZING ELECTROSTATIC DISCHARGE (ESD) PREVENTION LAYER (18516703)
Main Inventor
Tsai-Hao HUNG
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING (18152477)
Main Inventor
Chung-Ting Ko
ENLARGING CONTACT AREA AND PROCESS WINDOW FOR A CONTACT VIA (18511102)
Main Inventor
Li-Zhen Yu
Semiconductor Device Structure with Interconnect Structure and Method for Forming the Same (18512682)
Main Inventor
Chun-Hao Kung
Metal Contact Structure and Method of Forming the Same in a Semiconductor Device (18518081)
Main Inventor
Yu-Hung Lin
GAP PATTERNING FOR METAL-TO-SOURCE/DRAIN PLUGS IN A SEMICONDUCTOR DEVICE (18507138)
Main Inventor
Yu-Lien HUANG
Fin Loss Prevention (18516408)
Main Inventor
Hung-Ju CHOU
APPARATUS FOR DETECTING END POINT (18510693)
Main Inventor
Yi-Chao Mao
DISPLAY DEFECT MONITORING STRUCTURE (18171286)
Main Inventor
Chu Fu Chen
INTEGRATED CIRCUIT COMPONENT AND PACKAGE STRUCTURE HAVING THE SAME (18513649)
Main Inventor
Tzuan-Horng Liu
SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME (18515264)
Main Inventor
Yu-Sheng Lin
ETCHING-DAMAGE-FREE INTERMETAL DIELECTRIC LAYER WITH THERMAL DISSIPATION FEATURE (18170933)
Main Inventor
Kai-Fang CHENG
SEMICONDUCTOR DEVICE (18510599)
Main Inventor
Chen-Hua Yu
THROUGH-SUBSTRATE-VIA WITH REENTRANT PROFILE (18511016)
Main Inventor
Hung-Ling Shih
SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME (18516971)
Main Inventor
Shin-Yi YANG
Metal-Insulator-Metal Structure (18511438)
Main Inventor
Yuan-Yang Hsiao
SIDEWALL SPACER STRUCTURE ENCLOSING CONDUCTIVE WIRE SIDEWALLS TO INCREASE RELIABILITY (18512139)
Main Inventor
Yu-Teng Dai
SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME (18515130)
Main Inventor
Shao-Kuan LEE
SEMICONDUCTOR DEVICE INCLUDING DEEP VIAS (18517354)
Main Inventor
Ta-Pen GUO
SEMICONDUCTOR STRUCTURE AND METHOD MAKING THE SAME (18519516)
Main Inventor
Hsin-Yen Huang
PASSIVE DEVICES IN BONDING LAYERS (18155569)
Main Inventor
Yi Ching Ong
INTEGRATED CIRCUIT WITH GUARD RING (18508766)
Main Inventor
Chiao-Han LEE
SEMICONDUCTOR PACKAGES (18518448)
Main Inventor
Jie Chen
HYBRID CUT METAL GATE TO ACHIEVE MINIMUM CELL PITCHES, REDUCING ROUTING AND RISING THE YIELD (18158137)
Main Inventor
Chin-Liang CHEN
SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME (18186206)
Main Inventor
Chao-Kai Chan
CHIP STRUCTURE AND METHOD OF FABRICATING THE SAME (18152153)
Main Inventor
Kuo-Chiang Ting
Chamfered Die of Semiconductor Package and Method for Forming the Same (18514126)
Main Inventor
Chen-Hua Yu
METHOD OF FORMING SEMICONDUCTOR DEVICE (18510091)
Main Inventor
Jhih-Yu Wang
Stacking Via Structures for Stress Reduction (18517489)
Main Inventor
Shu-Shen Yeh
PACKAGE STRUCTURE (18518456)
Main Inventor
Hao-Jan Pei
SEMICONDUCTOR PACKAGE (18518466)
Main Inventor
Chin-Hua Wang
PACKAGE STRUCTURE (18516974)
Main Inventor
Chung-Yi Hsu
THICK REDISTRIBUTION LAYER FEATURES (18184480)
Main Inventor
Chia-Feng Cheng
Packaged Memory Device and Method (18150034)
Main Inventor
Chung-Hao Tsai
PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME (18516753)
Main Inventor
Tsung-Shu Lin
CHIP PACKAGE STRUCTURE (18518790)
Main Inventor
Ling-Wei LI
Integrated Circuit Packages and Methods of Forming the Same (18149793)
Main Inventor
Wensen Hung
FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE (18518794)
Main Inventor
Chin-Hua WANG
ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME (18163410)
Main Inventor
Yu-Lun Lu
3D TRENCH CAPACITOR FOR INTEGRATED PASSIVE DEVICES (18512092)
Main Inventor
Xin-Hua Huang
PACKAGES WITH METAL LINE CRACK PREVENTION DESIGN (18517232)
Main Inventor
Chen-Hua Yu
PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME (18515274)
Main Inventor
Wei-Hung Lin
BUFFER DESIGN FOR PACKAGE INTEGRATION (18517330)
Main Inventor
Jie Chen
Integrated Circuit Package and Method (18518187)
Main Inventor
Chen-Hua Yu
CELL STRUCTURE HAVING DIFFERENT POLY EXTENSION LENGTHS (18517276)
Main Inventor
Jian-Sing LI
STACK-GATE CIRCUIT (18517377)
Main Inventor
Yu-Tao YANG
SHARED WELL STRUCTURE MANUFACTURING METHOD (18518706)
Main Inventor
Yang ZHOU
INTEGRATED CIRCUIT DEVICE (18519460)
Main Inventor
Huaixin XIAN
HIGH ESD IMMUNITY FIELD-EFFECT DEVICE AND MANUFACTURING METHOD THEREOF (18513254)
Main Inventor
Yu-Hung YEH
ELECTROSTATIC DISCHARGE (ESD) ARRAY WITH BACK END OF LINE (BEOL) CONNECTION IN A CARRIER WAFER (18513544)
Main Inventor
Tao-Yi HUNG
POLYSILICON RESISTOR STRUCTURES (18516311)
Main Inventor
Meng-Han LIN
INTEGRATED CIRCUIT DEVICE INCLUDING A POWER SUPPLY LINE AND METHOD OF FORMING THE SAME (18511533)
Main Inventor
Yi-Hsiung Lin
GATE STRUCTURE, FIN FIELD-EFFECT TRANSISTOR, AND METHOD OF MANUFACTURING FIN-FIELD EFFECT TRANSISTOR (18518413)
Main Inventor
Ji-Cheng Chen
INTEGRATED CIRCUITS WITH GATE CUT FEATURES (18519263)
Main Inventor
Zhi-Chang Lin
INTEGRATED CIRCUIT HAVING TRANSISTORS WITH DIFFERENT WIDTH SOURCE AND DRAIN TERMINALS (18152007)
Main Inventor
XinYong WANG
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (18152775)
Main Inventor
Yi-Ren Chen
SEMICONDUCTOR STRUCTURE WITH HIGH INTEGRATION DENSITY AND METHOD FOR MANUFACTURING THE SAME (18169628)
Main Inventor
Ta-Chun LIN
BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY (18515912)
Main Inventor
Yi-Huan Chen
AIR GAP FORMATION BETWEEN GATE SPACER AND EPITAXY STRUCTURE (18510370)
Main Inventor
Bo-Yu LAI
SEMICONDUCTOR DEVICE (18518459)
Main Inventor
Cheng-I Lin
WAVE GUIDE FILTER FOR SEMICONDUCTOR IMAGING DEVICES (18515829)
Main Inventor
Cheng Yu Huang
DEEP TRENCH ISOLATION STRUCTURE FOR HIGH RESOLUTION CIS PIXEL (18149240)
Main Inventor
Chih Cheng Shih
IMAGE SENSOR DEVICE (18511731)
Main Inventor
Chia-Yu WEI
Metal-Insulator-Metal Capacitors And Methods Of Forming The Same (18188196)
Main Inventor
Li Chung Yu
CAPACITANCE STRUCTURE (18510787)
Main Inventor
Fu-Chiang Kuo
SEMICONDUCTOR DEVICE STRUCTURE WITH METAL OXIDE LAYER AND METHOD FOR FORMING THE SAME (18152950)
Main Inventor
Tzu-Ting LIU
TRENCH PATTERN FOR TRENCH CAPACITOR YIELD IMPROVEMENT (18512096)
Main Inventor
Yuan-Sheng Huang
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (18518797)
Main Inventor
Hsin-Fu LIN
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES (18126298)
Main Inventor
Shu-Wen SHEN
MELT ANNEAL SOURCE AND DRAIN REGIONS (18508788)
Main Inventor
Su-Hao Liu
Gate Structures For Semiconductor Devices (18516215)
Main Inventor
Chung-Liang CHENG
SEMICONDUCTOR DEVICE HAVING 2D CHANNEL LAYER (18515148)
Main Inventor
Yun-Yuan WANG
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE (18518170)
Main Inventor
Ming-Wen HSIAO
Contacts for Semiconductor Devices and Methods of Forming the Same (18517458)
Main Inventor
Meng-Han Lin
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18518585)
Main Inventor
Georgios Vellianitis
CONTROL GATE STRAP LAYOUT TO IMPROVE A WORD LINE ETCH PROCESS WINDOW (18510991)
Main Inventor
Yu-Ling Hsu
SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF (18507957)
Main Inventor
Miin-Jang CHEN
FIELD EFFECT TRANSISTORS WITH DUAL SILICIDE CONTACT STRUCTURES (18516410)
Main Inventor
Peng-Wei CHU
EPITAXIAL FIN STRUCTURES OF FINFET HAVING AN EPITAXIAL BUFFER REGION AND AN EPITAXIAL CAPPING REGION (18511711)
Main Inventor
Hsueh-Chang SUNG
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18518131)
Main Inventor
Cheng-Yi PENG
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18518190)
Main Inventor
Jiun Shiung WU
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME (18153646)
Main Inventor
Ta-Chun LIN
HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) WITH A BACK BARRIER LAYER (18513404)
Main Inventor
Chia-Ling YEH
ROUGH BUFFER LAYER FOR GROUP III-V DEVICES ON SILICON (18513942)
Main Inventor
Kuei-Ming Chen
LOW-FREQUENCY NOSIE TRANSISTORS WITH CURVED CHANNELS (18171362)
Main Inventor
Wen-Chao Shen
TRANSISTOR, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF TRANSISTOR (18510506)
Main Inventor
Hung-Chang Sun
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE (18515908)
Main Inventor
Shahaji B. MORE
A SEMICONDUCTOR DEVICE FOR RECESSED FIN STRUCTURE HAVING ROUNDED CORNERS (18517565)
Main Inventor
Cheng-Yen YU
SEMICONDUCTOR PACKAGE AND FORMING METHOD THEREOF (18513644)
Main Inventor
Chih-Hsuan Tai
Failsafe Input/Output Electrostatic Discharge Protection With Diodes (18515580)
Main Inventor
Tzu-Heng Chang
METHOD AND CIRCUIT TO ISOLATE BODY CAPACITANCE IN SEMICONDUCTOR DEVICES (18513103)
Main Inventor
Garming LIANG
POST-DRIVER WITH LOW VOLTAGE OPERATION AND ELECTROSTATIC DISCHARGE PROTECTION (18517024)
Main Inventor
Chin-Hua Wen
CMOS SCHMITT TRIGGER RECEIVER FOR THIN OXIDE TECHNOLOGY (18448008)
Main Inventor
Yung-Shun Chen
LOW POWER CLOCK NETWORK (18517017)
Main Inventor
PO CHUN LU
Device Signature Based On Trim And Redundancy Information (18515613)
Main Inventor
Katherine H. Chiang
PHYSICAL UNCLONABLE FUNCTION (PUF) SECURITY KEY GENERATION (18517801)
Main Inventor
Saman M.I. Adham
SEMICONDUCTOR DEVICE INCLUDING UNILATERALLY EXTENDING GATES AND METHOD OF FORMING SAME (18519559)
Main Inventor
Yu-Jen CHEN
MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF (18514796)
Main Inventor
Meng-Sheng Chang
SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT DOPING TYPES (18518142)
Main Inventor
Meng-Sheng Chang
METHOD FOR IMPROVING CONTROL GATE UNIFORMITY DURING MANUFACTURE OF PROCESSORS WITH EMBEDDED FLASH MEMORY (18515523)
Main Inventor
Meng-Han LIN
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME (18515961)
Main Inventor
Meng-Han LIN
SEMICONDUCTOR STRUCTURE (18518579)
Main Inventor
Sheng-Chih Lai
GRID STRUCTURE TO REDUCE DOMAIN SIZE IN FERROELECTRIC MEMORY DEVICE (18510975)
Main Inventor
Han-Jong Chia
MEMORY ARRAY AND OPERATION METHOD THEREOF (18151483)
Main Inventor
Wen-Ling Lu
INTEGRATED CIRCUIT INCLUDING THREE-DIMENSIONAL MEMORY DEVICE (18516908)
Main Inventor
Bo-Feng Young
FERROELECTRIC MEMORY CELL (18511461)
Main Inventor
Chung-Liang CHENG
MRAM DEVICE HAVING SELF-ALIGNED SHUNTING LAYER (18513968)
Main Inventor
William J. Gallagher
PIEZOELECTRIC DEVICE AND METHOD OF FORMING THE SAME (18513640)
Main Inventor
Chih-Ming Chen
METHOD OF FABRICATING MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM) (18512515)
Main Inventor
Chang-Lin YANG
MEMORY CELL WITH TOP ELECTRODE VIA (18511133)
Main Inventor
Ming-Che Ku
MAGNETIC TUNNEL JUNCTION STRUCTURES AND RELATED METHODS (18516751)
Main Inventor
Jun-Yao CHEN
MEMORY CELL, METHOD OF FORMING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME (18515226)
Main Inventor
Yu-Chao Lin