18170111. INTEGRATED CIRCUIT DESIGN METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
INTEGRATED CIRCUIT DESIGN METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Han-Chung Chang of Hsinchu (TW)
Chih-Liang Chen of Hsinchu (TW)
INTEGRATED CIRCUIT DESIGN METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18170111 titled 'INTEGRATED CIRCUIT DESIGN METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT
Simplified Explanation
The system described in the patent application involves a processor that generates different layout blocks, selects specific layout blocks corresponding to blocks in a circuit's floorplan, combines them into a circuit layout, and stores it in a cell library or uses it to generate a layout for an integrated circuit.
- The processor generates a variety of layout blocks.
- Specific layout blocks are chosen based on the circuit's floorplan.
- The selected layout blocks are combined to create the circuit layout.
- The resulting layout is stored in a cell library or used for generating an integrated circuit layout.
Potential Applications
- Semiconductor industry for designing integrated circuits.
- Electronic design automation tools for circuit layout.
Problems Solved
- Streamlining the process of circuit layout design.
- Ensuring compliance with design rules.
- Facilitating the creation of integrated circuit layouts.
Benefits
- Improved efficiency in circuit layout design.
- Enhanced accuracy in generating integrated circuit layouts.
- Simplified process for designing complex circuits.
Original Abstract Submitted
A system including a processor configured to perform generating a plurality of different layout blocks; selecting, among the plurality of layout blocks, layout blocks corresponding to a plurality of blocks in a floorplan of a circuit; combining the selected layout blocks in accordance with the floorplan into a layout of the circuit; and storing the layout of the circuit in a cell library or using the layout of the circuit to generate a layout for an integrated circuit (IC) containing the circuit. Each of the plurality of layout blocks satisfies predetermined design rules and includes at least one of a plurality of different first block options associated with a first layout feature, and at least one of a plurality of different second block options associated with a second layout feature different from the first layout feature.
