18156960. MULTIPLE DIE STRUCTURE AND METHOD OF FABRICATING THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
MULTIPLE DIE STRUCTURE AND METHOD OF FABRICATING THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Chieh-Lung Lai of Taichung City (TW)
Meng-Liang Lin of Hsinchu (TW)
Chun-Yueh Yang of Taipei City (TW)
Hsien-Wei Chen of Hsinchu City (TW)
MULTIPLE DIE STRUCTURE AND METHOD OF FABRICATING THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18156960 titled 'MULTIPLE DIE STRUCTURE AND METHOD OF FABRICATING THEREOF
Simplified Explanation
The present disclosure relates to methods and devices for devices with multiple die, where a dicing process is performed on a wafer containing a plurality of die and scribe lines. During the dicing process, a first scribe line is identified that separates a first die and a second die, and a partial cut is made on this scribe line. Other scribe lines on the wafer are fully cut during the process. After dicing, the first and second die are mounted on a substrate, with a portion of the first scribe line connecting them.
- Wafer contains multiple die and scribe lines
- Dicing process involves partial cut on specific scribe line separating two die
- Other scribe lines fully cut during dicing
- First and second die mounted on substrate with remaining portion of scribe line connecting them
Potential Applications
- Semiconductor manufacturing
- Electronics industry
- Microchip production
Problems Solved
- Efficient dicing process for multiple die on a wafer
- Improved connectivity between die on a substrate
Benefits
- Enhanced manufacturing process
- Better functionality of devices with multiple die
- Cost-effective production methods
Original Abstract Submitted
The present disclosure is directed to methods and devices for devices including multiple die. A wafer is received having a plurality of die and a plurality of scribe lines. A dicing process is performed on the wafer. The dicing process includes identifying a first scribe line of the plurality of scribe lines, the first scribe line interposing a first die and a second die of the plurality of die; and performing a partial cut on the first scribe line. In embodiments, other scribe lines of the wafer are, during the dicing process, fully cut. After the dicing, the first die and the second die are mounted on a substrate such as an interposer. The first die and the second die are connected by a portion of the first scribe line, e.g., remaining from the partial cut, during the mounting.