18515130. SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Shao-Kuan Lee of Kaohsiung (TW)

Kuang-Wei Yang of Hsinchu (TW)

Cherng-Shiaw Tsai of New Taipei (TW)

Cheng-Chin Lee of Taipei (TW)

Ting-Ya Lo of Hsinchu (TW)

Chi-Lin Teng of Taichung (TW)

Hsin-Yen Huang of New Taipei (TW)

Hsiao-Kang Chang of Hsinchu (TW)

Shau-Lin Shue of Hsinchu (TW)

SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18515130 titled 'SEMICONDUCTOR INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME

Simplified Explanation

The interconnect structure in this patent application includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is within the dielectric layer, the hard mask layer is on top of the first conductive feature, and the conductive layer consists of a first portion over the hard mask layer and a second portion over the dielectric layer. The hard mask layer and the conductive layer are made of different materials, and the capping layer is on top of the dielectric layer and the conductive layer.

• Dielectric layer
• First conductive feature
• Hard mask layer
• Conductive layer with first and second portions
• Capping layer

Potential Applications

- Semiconductor manufacturing - Microelectronics industry - Integrated circuit fabrication

Problems Solved

- Improving interconnect structure reliability - Enhancing signal transmission efficiency - Reducing signal interference

Benefits

- Increased performance of electronic devices - Enhanced durability of interconnect structures - Improved overall functionality of integrated circuits

Original Abstract Submitted

An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.