18515912. BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Yi-Huan Chen of Hsin Chu City (TW)

Chien-Chih Chou of New Taipei City (TW)

Alexander Kalnitsky of San Francisco CA (US)

Kong-Beng Thei of Pao-Shan Village (TW)

Ming Chyi Liu of Hsinchu City (TW)

Shih-Chung Hsiao of New Taipei City (TW)

Jhih-Bin Chen of Hsinchu (TW)

BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY - A simplified explanation of the abstract

This abstract first appeared for US patent application 18515912 titled 'BOUNDARY DESIGN FOR HIGH-VOLTAGE INTEGRATION ON HKMG TECHNOLOGY

Simplified Explanation

The abstract describes an integrated circuit (IC) with a boundary region between low and high voltage regions, along with a method of formation. The IC includes an isolation structure, polysilicon components, and dielectric layers.

• The integrated circuit features a boundary region separating low and high voltage regions.
• An isolation structure is present in the boundary region of the substrate.
• A first polysilicon component is directly on the substrate alongside the isolation structure.
• A boundary dielectric layer is placed on the isolation structure.
• A second polysilicon component is on the dielectric layer.

Potential Applications

• Semiconductor manufacturing
• Electronics industry
• Integrated circuit design

Problems Solved

• Efficient voltage regulation
• Improved circuit performance
• Enhanced reliability of integrated circuits

Benefits

• Better isolation between voltage regions
• Enhanced overall circuit functionality
• Increased durability and longevity of integrated circuits

Original Abstract Submitted

The present disclosure relates to an integrated circuit (IC) that includes a boundary region defined between a low voltage region and a high voltage region, and a method of formation. In some embodiments, the integrated circuit comprises an isolation structure disposed in the boundary region of the substrate. A first polysilicon component is disposed directly on an upper surface of the substrate alongside the isolation structure. A boundary dielectric layer is disposed on the isolation structure. A second polysilicon component is disposed on the sacrifice dielectric layer.