18158159. METHOD AND SYSTEM TO GENERATE PERFORMANCE-DATA-LIBRARY ASSOCIATED WITH STANDARD-CELL-LIBRARY simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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METHOD AND SYSTEM TO GENERATE PERFORMANCE-DATA-LIBRARY ASSOCIATED WITH STANDARD-CELL-LIBRARY

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Johnny Chiahao Li of Hsinchu (TW)

Tzu-Hsuan Ho of Hsinchu (TW)

Pei-Wei Lao of Hsinchu (TW)

Bing-Hsiu Wu of Hsinchu (TW)

Jerry Chang Jui Kao of Hsinchu (TW)

METHOD AND SYSTEM TO GENERATE PERFORMANCE-DATA-LIBRARY ASSOCIATED WITH STANDARD-CELL-LIBRARY - A simplified explanation of the abstract

This abstract first appeared for US patent application 18158159 titled 'METHOD AND SYSTEM TO GENERATE PERFORMANCE-DATA-LIBRARY ASSOCIATED WITH STANDARD-CELL-LIBRARY

Simplified Explanation

The method described in the patent application involves generating a performance-data library for a standard-cell library by sorting gates into groups, calculating performance data for each group, and mapping the data to the corresponding gates.

  • Gates in standard cells are sorted into groups based on matched and unmatched gates.
  • Matched gates are grouped together into multiple member-gates, while unmatched gates are grouped into single-member groups.
  • Performance data is discretely calculated for each group and mapped to the gates within the group.
  • For multimember groups, performance data is also mapped to non-subject gates to exploit redundancies and reduce computational burden.

Potential Applications

  • Semiconductor industry for optimizing standard-cell libraries.
  • Electronic design automation for improving performance analysis of integrated circuits.

Problems Solved

  • Efficient organization and utilization of performance data for standard-cell libraries.
  • Reduction of computational burden in performance analysis of multiple gates within standard cells.

Benefits

  • Improved performance analysis accuracy for standard-cell libraries.
  • Enhanced efficiency in generating and utilizing performance data for integrated circuits.


Original Abstract Submitted

A method of generating a first performance-data-library (for a standard-cell-library) includes: for each standard cell that includes multiple gates, sorting the gates into groups including searching for matched ones amongst the gates (matched gates), grouping corresponding matched gates into corresponding multiple member-gates, and (for unmatched ones of the gates having no other matched gate (unmatched gates)), grouping the unmatched gates into corresponding single-member groups; for each standard cell, generating a corresponding first volume of performance data including, for each group, discretely calculating the first volume of performance data, mapping the volume of performance data to the subject gate in the group, and, for each multimember group, mapping the volume of performance data to non-subject gates; and basing the first performance-data-library at least in part on the first volumes of performance data. Such mapping is an example of exploiting redundancies in the performance-data to reduce computational burden.