18516311. POLYSILICON RESISTOR STRUCTURES simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
POLYSILICON RESISTOR STRUCTURES
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Wen-Tuo Huang of Tainan City (TW)
Yong-Shiuan Tsair of Tainan (TW)
POLYSILICON RESISTOR STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18516311 titled 'POLYSILICON RESISTOR STRUCTURES
Simplified Explanation
The present disclosure describes a method for forming polysilicon resistors with high-k dielectrics and polysilicon gate electrodes. The method includes depositing a resistor stack on a substrate having spaced apart first and second isolation regions. Further, the method includes patterning the resistor stack to form a polysilicon resistor structure on the first isolation region and a gate structure between the first and second isolation regions, and doping the polysilicon resistor structure to form a doped layer in the polysilicon layer of the polysilicon resistor structure and source-drain regions in the substrate adjacent to the gate structure. Also, the method includes replacing the polysilicon layer in the gate structure with a metal gate electrode to form a transistor structure.
- Deposit resistor stack on substrate with isolation regions
- Pattern resistor stack to form polysilicon resistor and gate structures
- Dope polysilicon resistor structure and source-drain regions
- Replace polysilicon layer in gate structure with metal gate electrode
Potential Applications
- Semiconductor manufacturing
- Integrated circuit fabrication
- Transistor technology
Problems Solved
- Improving performance of resistors and transistors
- Enhancing conductivity and efficiency in electronic devices
Benefits
- Higher performance and efficiency in electronic devices
- Improved reliability and durability of resistors and transistors
Original Abstract Submitted
The present disclosure describes a method for forming polysilicon resistors with high-k dielectrics and polysilicon gate electrodes. The method includes depositing a resistor stack on a substrate having spaced apart first and second isolation regions. Further the method includes patterning the resistor stack to form a polysilicon resistor structure on the first isolation region and a gate structure between the first and second isolation regions, and doping the polysilicon resistor structure to form a doped layer in the polysilicon layer of the polysilicon resistor structure and source-drain regions in the substrate adjacent to the gate structure. Also, the method includes replacing the polysilicon layer in the gate structure with a metal gate electrode to form a transistor structure.
