18169628. SEMICONDUCTOR STRUCTURE WITH HIGH INTEGRATION DENSITY AND METHOD FOR MANUFACTURING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDUCTOR STRUCTURE WITH HIGH INTEGRATION DENSITY AND METHOD FOR MANUFACTURING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Ta-Chun Lin of Hsinchu (TW)

Ming-Heng Tsai of Hsinchu (TW)

Huang-Chao Chang of Hsinchu (TW)

Chun-Sheng Liang of Hsinchu (TW)

Chih-Hao Chang of Hsinchu (TW)

Jhon Jhy Liaw of Hsinchu (TW)

SEMICONDUCTOR STRUCTURE WITH HIGH INTEGRATION DENSITY AND METHOD FOR MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18169628 titled 'SEMICONDUCTOR STRUCTURE WITH HIGH INTEGRATION DENSITY AND METHOD FOR MANUFACTURING THE SAME

Simplified Explanation

The semiconductor structure described in the abstract includes a substrate with multiple fins, dielectric walls, and various devices for electrical isolation and channel features.

  • Substrate with first and second fins spaced apart
  • Dielectric wall with first and second wall surfaces
  • Third fin in direct contact with first and second fins
  • First device on first fin with first channel features
  • Second device on second fin with second channel features
  • Third device on third fin with third channel features
  • Isolation feature for electrical isolation

Potential Applications

  • Advanced semiconductor devices
  • High-performance electronics
  • Integrated circuits

Problems Solved

  • Improved electrical isolation
  • Enhanced device performance
  • Efficient semiconductor manufacturing

Benefits

  • Increased device integration
  • Enhanced device functionality
  • Improved overall performance


Original Abstract Submitted

A semiconductor structure includes: a substrate; a first fin and a second fin disposed on the substrate and spaced apart from each other; a dielectric wall disposed on the substrate and having first and second wall surfaces; a third fin disposed on the substrate to be in direct contact with at least one of the first and second fins; a first device disposed on the first fin and including first channel features extending away from the first wall surface; a second device disposed on the second fin and including second channel features extending away from the second wall surface; at least one third device disposed on the third fin and including third channel features; and an isolation feature disposed on the substrate to permit the third device to be electrically isolated from the first and second devices. A method for manufacturing the semiconductor structure is also disclosed.