18514796. MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Meng-Sheng Chang of Chu-bei City (TW)
Chia-En Huang of Xinfeng Township (TW)
Yi-Hsun Chiu of Zhubei City (TW)
MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18514796 titled 'MEMORY DEVICES AND METHODS OF MANUFACTURING THEREOF
Simplified Explanation
The memory device described in the patent application consists of a programming transistor and a reading transistor for an anti-fuse memory cell. The programming transistor has vertically spaced first semiconductor nanostructures with a certain width, while the reading transistor has vertically spaced second semiconductor nanostructures with a different width.
- The programming transistor includes first semiconductor nanostructures with a specific width along a lateral direction.
- The reading transistor includes second semiconductor nanostructures with a width different from the first along another direction.
- The memory device has first and second gate metals that wrap around the respective semiconductor nanostructures with gate dielectrics.
Potential Applications
- Non-volatile memory storage
- Integrated circuits
- Semiconductor devices
Problems Solved
- Data retention in memory cells
- Efficient programming and reading of memory cells
- Miniaturization of memory devices
Benefits
- Faster data access
- Higher data storage capacity
- Improved reliability and durability of memory cells
Original Abstract Submitted
A memory device includes a programming transistor and a reading transistor of an anti-fuse memory cell. The programming transistor includes first semiconductor nanostructures vertically spaced apart from one another, each of the first semiconductor nanostructures having a first width along a first lateral direction. The reading transistor includes second semiconductor nanostructures vertically spaced apart from one another, each of the second semiconductor nanostructures having a second width different from the first width along the second direction. The memory device also includes a first and a second gate metals. The first gate metal wraps around each of the first semiconductor nanostructures with a first gate dielectric disposed therein. The second gate metal wraps around each of the second semiconductor nanostructures with a second gate dielectric disposed therein.
