18171286. DISPLAY DEFECT MONITORING STRUCTURE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
Contents
DISPLAY DEFECT MONITORING STRUCTURE
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
DISPLAY DEFECT MONITORING STRUCTURE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18171286 titled 'DISPLAY DEFECT MONITORING STRUCTURE
Simplified Explanation
The abstract describes a driver structure for an organic light-emitting diode (OLED) device, which includes various layers and structures for electrical checking and anomaly detection.
- Front-end-of-line (FEOL) layer
- Back-end-of-line (BEOL) layer on top of the FEOL layer
- Customer BEOL layer on top of the BEOL layer
- BEOL layer includes a customer BEOL electrical checking structure
- Customer BEOL electrical checking structure has memory cells aligned with pixel regions
- Six bottom structures in the BEOL layer corresponding to pixel regions
- Bottom structures connected in series to form electrical paths
- First memory cell detects anomalies in electrical resistance of the electrical paths
Potential Applications
- OLED devices
- Display technology
- Semiconductor manufacturing
Problems Solved
- Detecting anomalies in electrical resistance
- Ensuring proper functioning of OLED devices
- Improving reliability of electronic components
Benefits
- Enhanced performance of OLED devices
- Increased reliability and longevity
- Efficient detection of electrical anomalies
Original Abstract Submitted
A driver structure for an organic light-emitting diode (OLED) device is provided. The driver structure includes a front-end-of-line (FEOL) layer; a back-end-of-line (BEOL) layer disposed on the FEOL layer; and a customer BEOL layer disposed on the BEOL layer. The BEOL layer includes a customer BEOL electrical checking structure. The customer BEOL electrical checking structure has a plurality of memory cells that include a first memory cell vertically aligned with and corresponds to two adjacent pixel regions. The customer BEOL layer includes six bottom structures corresponding to the two adjacent pixel regions and connected in series to form a first electrical path and a second electrical path each electrically connected to the first memory cell. The first memory cell is configured to detect an anomaly of electrical resistance of the first and second electrical path.
