Micron Technology, Inc. patent applications published on December 7th, 2023

Summary of the patent applications from Micron Technology, Inc. on December 7th, 2023

Micron Technology, Inc. has recently filed several patents related to memory architecture and memory devices. These patents aim to improve the performance, efficiency, and reliability of memory devices by reducing capacitance, increasing memory capacity, and enhancing data storage and retrieval capabilities.

Some notable applications of these patents include:

• Memory devices in electronic devices such as smartphones, tablets, and computers.
• Data storage systems in servers and data centers.
• Embedded memory in integrated circuits for various applications.

Summary of recent patents filed by Micron Technology, Inc.:

1. Patent: Ferroelectric Memory Architecture with Gap Region

  * Describes a memory architecture with a gap region between memory cells to reduce capacitance and eliminate undesirable coupling during memory operations.
  * The gap region contains a fluid with a low dielectric constant to further reduce capacitance and improve memory device speed and resource consumption.

2. Patent: Integrated Assemblies and Memory Devices

  * Describes integrated assemblies and memory devices with specific components and arrangements, including leaker devices and conductive contact regions.
  * These structures improve the performance and reliability of memory devices and can be used in various electronic systems.

3. Patent: Memory Device with Transistor and Capacitor

  * Describes a memory device with an array of memory cells, each consisting of a transistor and a capacitor.
  * The memory cell design includes specific arrangements of electrodes, insulators, and conductive contact regions to enhance functionality and increase memory capacity.

4. Patent: Memory Cells with Conductive Pillars and Dielectric Barriers

  * Describes memory cells with conductive pillars and low permittivity dielectric barriers to improve performance and reliability.
  * The manufacturing process involves depositing and removing dielectric material to create the desired barriers between memory cells.

5. Patent: Microelectronic Device with Stack Structure and Memory Pillar

  * Describes a microelectronic device with a stack structure, memory pillar, and boron-containing material.
  * The device design enhances memory capacity, data storage, and overall performance of microelectronic devices.

6. Patent: Method of Forming Microelectronic Device

  * Describes a method for forming a microelectronic device with conductive interconnect structures and additional isolation material.
  * The method improves conductivity, isolation, and overall efficiency of the device manufacturing process.

7. Patent: Merged Cavities and Buried Etch Stops for Memory Arrays

  * Describes a method for forming memory arrays with merged cavities and etch stops.
  * The technology improves memory array performance, manufacturing efficiency, and reliability.

Notable Applications:

• Memory devices for electronic devices, data storage systems, and integrated circuits.
• Improved data storage and retrieval capabilities.
• Increased memory capacity and speed.
• Enhanced performance, reliability, and durability of electronic devices.
• Reduced power consumption and improved energy efficiency.

Patent applications for Micron Technology, Inc. on December 7th, 2023

PERFORMING SECURITY FUNCTIONS USING DEVICES HAVING EMBEDDED HARDWARE SECURITY MODULES (17858568)

Main Inventor

Sourin SARKAR

GERMANIUM PRECURSORS, METHODS OF FORMING THE GERMANIUM PRECURSORS, AND PRECURSOR COMPOSITIONS COMPRISING THE GERMANIUM PRECURSORS (18327840)

Main Inventor

Gurtej S. Sandhu

VEHICLE COMMUNICATION AND NAVIGATION SYSTEMS FOR ROAD SAFETY (17859045)

Main Inventor

Aysha Shanta

AUTOMATED RENDERING OF DATA FLOW ARCHITECTURE FOR NETWORKED COMPUTER SYSTEMS (17830780)

Main Inventor

Jonathan Blaine Nielsen

VOLTAGE FREQUENCY SCALING BASED ON ERROR RATE (17893850)

Main Inventor

Leon Zlotnik

APPARATUSES AND METHODS FOR PROVIDING INTERNAL POWER VOLTAGES (17893946)

Main Inventor

Ki-Jun Nam

MANAGING QUAD-LEVEL CELL COMPACTION STRATEGY OF A MEMORY DEVICE (17830166)

Main Inventor

Vamsi Pavan Rayaprolu

BIT ERROR MANAGEMENT IN MEMORY DEVICES (18049121)

Main Inventor

Jeremy BINFET

PREDICTIVE DATA PRE-FETCHING IN A DATA STORAGE DEVICE (18454743)

Main Inventor

Alex Frolikov

ACCESS HEATMAP IMPLEMENTATIONS AT A HOST DEVICE (17831242)

Main Inventor

Nabeel Meeramohideen Mohamed

DIE FAMILY MANAGEMENT ON A MEMORY DEVICE USING BLOCK FAMILY ERROR AVOIDANCE (17856771)

Main Inventor

Steven Michael Kientz

CONTROLLER FOR A MEMORY DEVICE AND A STORAGE DEVICE (18199422)

Main Inventor

Venkata Kiran Kumar Matturi

MEMORY SYSTEM REFRESH MANAGEMENT (17965957)

Main Inventor

Yang Lu

APPARATUS WITH RESPONSE COMPLETION PACING (18049973)

Main Inventor

Ying Huang

VOLTAGE WINDOW ADJUSTMENT (17887244)

Main Inventor

Zhenming Zhou

WEAR LEVELING IN SOLID STATE DRIVES (18452020)

Main Inventor

Zoltan Szubbocsev

FIFO MEMORY ERROR CONDITION DETECTION (17831344)

Main Inventor

Lance P. Johnson

MANAGING ERROR COMPENSATION USING CHARGE COUPLING AND LATERAL MIGRATION SENSITIVITY (17860701)

Main Inventor

Mustafa N. Kaynak

MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM (17863000)

Main Inventor

Kishore Kumar Muchherla

STORING NON-VOLATILE MEMORY INITIALIZATION FAILURES (17889810)

Main Inventor

Qi Dong

APPARATUS WITH READ LEVEL MANAGEMENT AND METHODS FOR OPERATING THE SAME (17938307)

Main Inventor

Murong Lang

SAFE AREA FOR CRITICAL CONTROL DATA (18205036)

Main Inventor

Aleksei Vlasov

VERIFIED KEY REPLACEMENT IN SECURE MEMORY DEVICES (17831370)

Main Inventor

Zhan Liu

PROTECTION AGAINST INVALID MEMORY COMMANDS (17834547)

Main Inventor

Sourin SARKAR

POWER EFFICIENT CODEWORD SCRAMBLING IN A NON-VOLATILE MEMORY DEVICE (17829920)

Main Inventor

Eyal En Gad

TRANSISTOR CONFIGURATIONS FOR VERTICAL MEMORY ARRAYS (17823371)

Main Inventor

Ferdinando Bedeschi

MEMORY DEVICE SECURITY AND ROW HAMMER MITIGATION (17946518)

Main Inventor

Yang Lu

TEST MODE STATE MACHINE FOR A MEMORY DEVICE (17830169)

Main Inventor

Rucha Deepak Geedh

ADAPTIVE ENHANCED CORRECTIVE READ BASED ON WRITE AND READ TEMPERATURE (17830625)

Main Inventor

Zhenming Zhou

DYNAMIC READ LEVEL TRIM SELECTION FOR SCAN OPERATIONS OF MEMORY DEVICES (17830802)

Main Inventor

Yu-Chung Lien

PLANE BALANCING IN A MEMORY SYSTEM (17864192)

Main Inventor

John J. Kane

MEMORY CONTROLLER FIRMWARE VIRTUALIZATION (17899900)

Main Inventor

Niccolò Izzo

ACCESS HEATMAP GENERATION AT A MEMORY DEVICE (17831270)

Main Inventor

Nabeel Meeramohideen Mohamed

DATA PATH SEQUENCING IN MEMORY SYSTEMS (17832068)

Main Inventor

Rohitkumar Makhija

APPARATUSES AND METHODS FOR IN-MEMORY OPERATIONS (18331746)

Main Inventor

Perry V. Lea

DATA PROTECTION FOR STACKS OF MEMORY DICE (17831263)

Main Inventor

Marco Sforzin

APPARATUS WITH DYNAMIC ARBITRATION MECHANISM AND METHODS FOR OPERATING THE SAME (17937358)

Main Inventor

John E. Maroney

PRIORITIZATION OF SUCCESSFUL READ RECOVERY OPERATIONS FOR A MEMORY DEVICE (17809731)

Main Inventor

Naveen BOLISETTY

ADAPTIVE WEAR LEVELING FOR ENDURANCE COMPENSATION (17858731)

Main Inventor

Charles See Yeung Kwong

ERROR HANDLING (17965909)

Main Inventor

Sampath K. Ratnam

System And Method To Control Memory Error Detection With Automatic Disabling (17829576)

Main Inventor

Thanh K. Mai

MEMORY SUB-SYSTEM ADDRESSING FOR DATA AND ADDITIONAL DATA PORTIONS (17831436)

Main Inventor

Daniele Balluchi

Error Detection in Communications over Serial Peripheral Interfaces (17834414)

Main Inventor

Minjian Wu

MANAGING DATA INTEGRITY USING A CHANGE IN A NUMBER OF DATA ERRORS AND AN AMOUNT OF TIME IN WHICH THE CHANGE OCCURRED (17831086)

Main Inventor

Ryan G. Fisher

DETERMINING LOCATIONS IN NAND MEMORY FOR BOOT-UP CODE (17804826)

Main Inventor

Nitul Gohain

EVALUATION OF MEMORY DEVICE HEALTH MONITORING LOGIC (17807813)

Main Inventor

Scott E. Schaefer

CROSS-TEMPERATURE COMPENSATION IN NON-VOLATILE MEMORY DEVICES (17830800)

Main Inventor

Andrea Giovanni Xotta

MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES (17859468)

Main Inventor

Vamsi Pavan Rayaprolu

MEMORY ADDRESS TRANSLATION FOR DATA PROTECTION AND RECOVERY (18204821)

Main Inventor

Daniele Balluchi

WRITE COMMAND EXECUTION FOR DATA PROTECTION AND RECOVERY SCHEMES (17831433)

Main Inventor

Nicola Del Gatto

MEMORY SYSTEM FAILURE DETECTION AND SELF RECOVERY OF MEMORY DICE (17877779)

Main Inventor

Robert Mason

CONTROLLING VARIATION OF VALID DATA COUNTS IN GARBAGE COLLECTION SOURCE BLOCKS (17830047)

Main Inventor

Xiangyu Tang

LBAT BULK UPDATE (17946960)

Main Inventor

Steven R. Narum

ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE (17842278)

Main Inventor

Li-Te Chang

ROW HAMMER MITIGATION USING A VICTIM CACHE (17945702)

Main Inventor

Ameen D. Akel

NAND PAGE BUFFER BASED SECURITY OPERATIONS (17814395)

Main Inventor

Jeremy BINFET

CLASSIFICATION AND MITIGATION OF COMPUTE EXPRESS LINK SECURITY THREATS (17811770)

Main Inventor

Alessandro ORLANDO

ESTABLISHING A CHAIN OF OWNERSHIP OF A DEVICE (17858560)

Main Inventor

Sourin SARKAR

FIELD FIRMWARE UPDATE (17969916)

Main Inventor

Angelo Alberto Rovelli

SECURING ELECTRONIC BALLOT SYSTEMS VIA SECURE MEMORY DEVICES WITH EMBEDDED HARDWARE SECURITY MODULES (17859892)

Main Inventor

Sourin Sarkar

SYSTEMS AND METHODS FOR EVALUATING AND SHARING HUMAN DRIVING STYLE INFORMATION WITH PROXIMATE VEHICLES (18448860)

Main Inventor

Robert Richard Noel Bielby

TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE USING AN INTERNAL OSCILLATOR (17831114)

Main Inventor

Keun soo Song

ADAPTIVE TEMPERATURE COMPENSATION FOR A MEMORY DEVICE (17856691)

Main Inventor

Vamsi Pavan Rayaprolu

MULTI-LEVEL CELLS, AND RELATED ARRAYS, DEVICES, SYSTEMS, AND METHODS (17805090)

Main Inventor

Jiyun Li

PRE-DECODER CIRCUITY (17831290)

Main Inventor

Byung S. Moon

SYNCHRONOUS INPUT BUFFER ENABLE FOR DFE OPERATION (17831251)

Main Inventor

William C. Waldrop

MINIMUM MEMORY CLOCK ESTIMATION PROCEDURES (18201089)

Main Inventor

Erik V. Pohlmann

TECHNIQUES TO MANUFACTURE FERROELECTRIC MEMORY DEVICES (18203877)

Main Inventor

Giorgio Servalli

SWITCH AND HOLD BIASING FOR MEMORY CELL IMPRINT RECOVERY (17830100)

Main Inventor

Angelo Visconti

ROBUST FUNCTIONALITY FOR MEMORY MANAGEMENT ASSOCIATED WITH HIGH-TEMPERATURE STORAGE AND OTHER CONDITIONS (17831368)

Main Inventor

Angelo Visconti

TECHNIQUES FOR FLEXIBLE SELF-REFRESH OF MEMORY ARRAYS (18202149)

Main Inventor

Anthony D. Veches

SIGNALING MEMORY ZONE RANKING INFORMATION (18204202)

Main Inventor

Giuseppe Cariello

DYNAMIC ROW HAMMERING THRESHOLD FOR MEMORY (17809144)

Main Inventor

Sujeet V. Ayyapureddi

ROW HAMMER REFRESH OPERATION (17959664)

Main Inventor

John Christopher M. Sancon

TECHNIQUES FOR MEMORY CELL RESET USING DUMMY WORD LINES (18310715)

Main Inventor

Yuan He

TIMING ADJUSTMENT FOR DATA INPUT/OUTPUT BUFFER CIRCUITS (17834754)

Main Inventor

NORIAKI MOCHIDA

MAXIMUM MEMORY CLOCK ESTIMATION PROCEDURES (17929970)

Main Inventor

Erik V. Pohlmann

ROW HAMMER MITIGATION USING HIERARCHICAL DETECTORS (18204786)

Main Inventor

Edmund J. Gieske

DECODER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY DEVICES (17830042)

Main Inventor

Lorenzo Fratin

PRE-DECODER CIRCUITY (17831332)

Main Inventor

Jin Seung Son

Pre-Sense Gut Node Amplification in Sense Amplifier (17829737)

Main Inventor

Huy T. Vo

Sense Amplifier Reference Voltage Through Sense Amplifier Latch Devices (17860470)

Main Inventor

Eric Carman

TIMING FOR OPERATIONS IN MEMORY DEVICE STORING BITS IN MEMORY CELL PAIRS (17864046)

Main Inventor

Ferdinando Bedeschi

MEMORY ARRAY SEASONING (18196268)

Main Inventor

Andrea Martinelli

PRE-DECODER CIRCUITRY (17831311)

Main Inventor

Vijayakrishna J. Vankayala

INTERNAL REFERENCE RESISTOR FOR NON-VOLATILE MEMORY (17831414)

Main Inventor

Neil Petrie

FORWARD-LOOKING DETERMINATION OF READ VOLTAGE USING MEMORY CELL PATTERNS (17855483)

Main Inventor

Umberto di Vincenzo

Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells (17851865)

Main Inventor

Jordan D. Greenlee

METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS (18327846)

Main Inventor

Rui Zhang

INTERLEAVED STRING DRIVERS, STRING DRIVER WITH NARROW ACTIVE REGION, AND GATED LDD STRING DRIVER (18237070)

Main Inventor

Michael A. Smith

MEMORY CELL VOLTAGE LEVEL SELECTION (17876346)

Main Inventor

Tingjun Xie

WRITE-ONCE MEMORY ENCODED DATA (17944692)

Main Inventor

Xiangyu Tang

MEMORY BLOCK CHARACTERISTIC DETERMINATION (17831350)

Main Inventor

Zhongyuan Lu

INTERFACES BETWEEN HIGHER VOLTAGE AND LOWER VOLTAGE WAFERS AND RELATED APPARATUSES AND METHODS (18315311)

Main Inventor

Michael A. Smith

MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES (17860690)

Main Inventor

Mustafa N. Kaynak

APPARATUS WITH READ LEVEL MANAGEMENT AND METHODS FOR OPERATING THE SAME (17938153)

Main Inventor

Murong Lang

CELL VOLTAGE DROP COMPENSATION CIRCUIT (17831266)

Main Inventor

Kijun Nam

MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES (17860711)

Main Inventor

Mustafa N. Kaynak

ADAPTIVE CALIBRATION FOR THRESHOLD VOLTAGE OFFSET BINS (18204189)

Main Inventor

Vamsi Pavan Rayaprolu

MEMORY SECTION SELECTION FOR A MEMORY BUILT-IN SELF-TEST (17807303)

Main Inventor

Scott E. SCHAEFER

REFRESH RATE SELECTION FOR A MEMORY BUILT-IN SELF-TEST (17807307)

Main Inventor

Scott E. SCHAEFER

LOOPBACK DATAPATH FOR CLOCK QUALITY DETECTION (18312280)

Main Inventor

Matthew Alan Prather

MEMORY SUB-SYSTEM THRESHOLD VOLTAGE MODIFICATION OPERATIONS (18205083)

Main Inventor

Jian Huang

ENABLING OR DISABLING ON-DIE ERROR-CORRECTING CODE FOR A MEMORY BUILT-IN SELF-TEST (17807314)

Main Inventor

Scott E. SCHAEFER

INTERRUPTING A MEMORY BUILT-IN SELF-TEST (17808043)

Main Inventor

Scott E. SCHAEFER

GLITCH DETECTION REDUNDANCY (17831329)

Main Inventor

Angelo Alberto Rovelli

DIFFERENTIAL STROBE FAULT INDICATION (17862082)

Main Inventor

Scott E. Schaefer

ERROR DETECTION FOR A SEMICONDUCTOR DEVICE (17889369)

Main Inventor

Matthew Young

POST PACKAGE REPAIR MANAGEMENT (17959191)

Main Inventor

Danilo Caraccio

MULTI-COIL INDUCTION APPARATUS (18203735)

Main Inventor

Timothy Hollis

SELECTIVE CAVITY MERGING FOR ISOLATION REGIONS IN A MEMORY DIE (17863317)

Main Inventor

Yoshiaki Fukuzumi

SINGULATED SEMICONDUCTOR DEVICES AND ASSOCIATED METHODS (18140523)

Main Inventor

Marc Anthony Romana de Guzman

METHODS OF MANUFACTURING STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH HIGH EFFICIENCY THERMAL PATHS (18454703)

Main Inventor

Sameer S. Vadhavkar

Memory Circuitry And Method Used In Forming Memory Circuitry (17851393)

Main Inventor

Jivaan Kishore Jhothiraman

MEMORY DEVICE INCLUDING SOURCE STRUCTURE HAVING CONDUCTIVE ISLANDS OF DIFFERENT WIDTHS (18202061)

Main Inventor

Shuangqiang Luo

MICROELECTRONIC DEVICES COMPRISING A BORON-CONTAINING MATERIAL, AND RELATED ELECTRONIC SYSTEMS AND METHODS (17822726)

Main Inventor

Xiao Li

MICROELECTRONIC DEVICES, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS (17805221)

Main Inventor

Shuangqiang Luo

MICROELECTRONIC DEVICES WITH CONTACTS EXTENDING THROUGH METAL OXIDE REGIONS OF STEP TREADS, AND RELATED SYSTEMS AND METHODS (17812141)

Main Inventor

Mithun Kumar Ramasahayam

TECHNIQUES FOR CONCURRENTLY-FORMED CAVITIES IN THREE-DIMENSIONAL MEMORY ARRAYS (17816505)

Main Inventor

Yoshiaki Fukuzumi

MEMORY DEVICE INCLUDING HIGH-ASPECT-RATIO CONDUCTIVE CONTACTS (17848021)

Main Inventor

Shuangqiang Luo

Memory Circuitry And Method Used In Forming Memory Circuitry (17865565)

Main Inventor

Harsh Narendrakumar Jain

SEMICONDUCTOR MEMORY STACKS CONNECTED TO PROCESSING UNITS AND ASSOCIATED SYSTEMS AND METHODS (18452695)

Main Inventor

Kyle K. Kirby

METHODS OF FORMING MICROELECTRONIC DEVICES INCLUDING SUPPORT CONTACT STRUCTURES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS (17805009)

Main Inventor

Yiping Wang

PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH TWO STRIPE TECHNIQUE (17860021)

Main Inventor

Shruti Jain

PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THREE STRIPE TECHNIQUE (17860027)

Main Inventor

Anton P. Eppich

MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS (17830224)

Main Inventor

Bharat Bhushan

INTER-DIE SIGNAL LOAD REDUCTION TECHNIQUE IN MULTI-DIE PACKAGE (17887362)

Main Inventor

Vijayakrishna J. Vankayala

REPEATER SCHEME FOR INTER-DIE SIGNALS IN MULTI-DIE PACKAGE (17887372)

Main Inventor

Vijayakrishna J. Vankayala

SEMICONDUCTOR DEVICES HAVING ALIGNED FRONT-END INTERFACE CONTACTS AND BACK-END INTERFACE CONTACTS, AND ASSOCIATED SYSTEMS AND METHODS (18202249)

Main Inventor

Chin Hui Chong

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (17833749)

Main Inventor

Takuya Imamoto

DIELECTRIC ENGINEERED TUNNEL REGION IN MEMORY CELLS (17830013)

Main Inventor

Jae Young Ahn

Ferroelectric Assemblies and Methods of Forming Ferroelectric Assemblies (18235740)

Main Inventor

Albert Liao

Integrated Circuitry, Method Used In The Fabrication Of A Vertical Transistor, And Method Used In The Fabrication Of Integrated Circuitry (18236056)

Main Inventor

Masihhur R. Laskar

SELF-ALIGNED ETCHING TECHNIQUES FOR MEMORY FORMATION (17804997)

Main Inventor

John Hopkins

Integrated Assemblies and Methods of Forming Integrated Assemblies (18236265)

Main Inventor

David K. Hwang

CONROL LOOP CIRCUITRY (17892760)

Main Inventor

Steven J. Baumgartner

SCALED BIT FLIP THRESHOLDS ACROSS COLUMNS FOR IRREGULAR LOW DENSITY PARITY CHECK DECODING (17829924)

Main Inventor

Eyal En Gad

DYNAMIC DECODING FOR MEMORY SYSTEMS (17833371)

Main Inventor

Curtis W. Egan

EARLY STOPPING OF BIT-FLIP LOW DENSITY PARITY CHECK DECODING BASED ON SYNDROME WEIGHT (17829913)

Main Inventor

Eyal En Gad

ERROR CORRECTION (17969856)

Main Inventor

Marco Sforzin

ERROR REDUCTION DURING CRYPTOGRAPHIC KEY UPDATES IN SECURE MEMORY DEVICES (17831364)

Main Inventor

Zhan Liu

DEVICE IDENTIFIER COMPOSITION ENGINE 3-LAYER ARCHITECTURE (17810952)

Main Inventor

Alessandro ORLANDO

METHODS TO SECURE ACCESS TO AN AUTOMOBILE AND AN AUTHENTICATED IGNITION SYSTEM (17831353)

Main Inventor

Sourin Sarkar

APPARATUS INCLUDING THERMAL MANAGEMENT MECHANISM AND METHODS OF MANUFACTURING THE SAME (18236146)

Main Inventor

Suresh Reddy Yarragunta

MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL THREE DIMENSIONAL (3D) MEMORY (17888460)

Main Inventor

David K. Hwang

SUPPORT STRUCTURE FOR MULTIPLE, ALTERNATING EPITAXIAL SILICON (17888467)

Main Inventor

Si-Woo Lee

MULTIPLE, ALTERNATING EPITAXIAL SILICON (17888472)

Main Inventor

John F. Kaeding

MICROELECTRONIC DEVICES, RELATED ELECTRONIC SYSTEMS, AND METHODS OF FORMING MICROELECTRONIC DEVICES (17805201)

Main Inventor

Fatma Arzum Simsek-Ege

MEMORY CELL CAPACITOR STRUCTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17830145)

Main Inventor

Sheyang Ning

MICROELECTRONIC DEVICES, AND RELATED METHODS OF FORMING MICROELECTRONIC DEVICES (18054316)

Main Inventor

Si-Woo Lee

APPARATUSES INCLUDING SEMICONDUCTIVE PILLAR STRUCTURES, AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS (17813420)

Main Inventor

Mitsunari Sukekawa

MICROELECTRONIC DEVICES INCLUDING IMPLANT REGIONS, AND RELATED MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS (17805167)

Main Inventor

Zhiqiang Teo

VERTICAL NON-VOLATILE MEMORY WITH LOW RESISTANCE SOURCE CONTACT (17816651)

Main Inventor

Darwin A. Clampitt

Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells (17830108)

Main Inventor

John D. Hopkins

MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES (17876271)

Main Inventor

Mallesh Rajashekharaiah

MERGED CAVITIES AND BURIED ETCH STOPS FOR THREE-DIMENSIONAL MEMORY ARRAYS (17884299)

Main Inventor

Yoshiaki Fukuzumi

METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS (18307698)

Main Inventor

Pengyuan Zheng

MICROELECTRONIC DEVICES COMPRISING A BORON-CONTAINING MATERIAL, AND RELATED ELECTRONIC SYSTEMS AND METHODS (18324084)

Main Inventor

Jordan D. Greenlee

FERROELECTRIC MEMORY ARRAYS WITH LOW PERMITTIVITY DIELECTRIC BARRIERS (18203886)

Main Inventor

Giorgio Servalli

FORMATION FOR MEMORY CELLS (18204773)

Main Inventor

Giorgio Servalli

MEMORY DEVICE ASSEMBLY WITH A LEAKER DEVICE (17805586)

Main Inventor

Fatma Arzum SIMSEK-EGE

MEMORY DEVICE ASSEMBLY WITH REDISTRIBUTION LAYER BETWEEN TRANSISTORS AND CAPACITORS (17812233)

Main Inventor

Marcello MARIANI

MEMORY DEVICE ASSEMBLY WITH NON-IMPINGED LEAKER DEVICES (17815420)

Main Inventor

Beth R. COOK

FERROELECTRIC MEMORY ARCHITECTURE WITH GAP REGION (18204077)

Main Inventor

Giorgio Servalli