17860690. MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES
Organization Name
Inventor(s)
Mustafa N. Kaynak of San Diego CA (US)
Patrick R. Khayat of San Diego CA (US)
Sivagnanam Parthasarathy of Carlsbad CA (US)
MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17860690 titled 'MANAGING COMPENSATION FOR CHARGE COUPLING AND LATERAL MIGRATION IN MEMORY DEVICES
Simplified Explanation
The abstract of this patent application describes a method for increasing the read window budget (RWB) in a memory access operation. The method involves selecting a target RWB increase and identifying a set of aggressor memory cells. A list of programming level states for the aggressor memory cells is generated, and an entry associated with a maximum RWB increase that meets or exceeds the target RWB increase is identified in the list. The method further involves modifying a parameter of the memory access operation based on the adjustment associated with the identified entry.
- Method for increasing the read window budget (RWB) in a memory access operation
- Selecting a target RWB increase
- Identifying a set of aggressor memory cells
- Generating a list of programming level states for the aggressor memory cells
- Identifying an entry in the list with a maximum RWB increase that meets or exceeds the target RWB increase
- Modifying a parameter of the memory access operation based on the adjustment associated with the identified entry
Potential applications of this technology:
- Memory access operations in computer systems
- Data storage and retrieval in electronic devices
- Improving the performance and efficiency of memory operations
Problems solved by this technology:
- Limited read window budget in memory access operations
- Difficulty in optimizing memory access performance
- Inefficient use of memory resources
Benefits of this technology:
- Increased read window budget for improved memory access performance
- Optimization of memory operations for better efficiency
- Enhanced utilization of memory resources
Original Abstract Submitted
Embodiments disclosed can include selecting a target read window budget (RWB) increase and identifying a set of aggressor memory cells. They can also include generating a list of programming level states for the set of aggressor memory cells and identifying, in the list, an entry associated with a maximum RWB increase that is greater than or equal to the target RWB increase. They can further include responsive to identifying the entry with the total number of bits associated with a maximum RWB increase that is greater than or equal to the target RWB increase, modifying a parameter of the memory access operation with the adjustment associated with the identified entry.
