18203886. FERROELECTRIC MEMORY ARRAYS WITH LOW PERMITTIVITY DIELECTRIC BARRIERS simplified abstract (Micron Technology, Inc.)
FERROELECTRIC MEMORY ARRAYS WITH LOW PERMITTIVITY DIELECTRIC BARRIERS
Organization Name
Inventor(s)
Giorgio Servalli of Fara Gera d'Adda (IT)
Marcello Mariani of Milano (IT)
FERROELECTRIC MEMORY ARRAYS WITH LOW PERMITTIVITY DIELECTRIC BARRIERS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18203886 titled 'FERROELECTRIC MEMORY ARRAYS WITH LOW PERMITTIVITY DIELECTRIC BARRIERS
Simplified Explanation
The patent application describes methods, systems, and devices for ferroelectric memory arrays with low permittivity dielectric barriers. These memory arrays are manufactured using a process that involves depositing a dielectric barrier between adjacent memory cells.
- The manufacturing process includes depositing a film of dielectric material over rows of bottom electrodes formed on dielectric walls, filling the space between adjacent bottom electrodes.
- Alternatively, the process involves depositing a film of dielectric material into cavities of the memory array, where each cavity has bottom electrodes formed on its sidewalls.
- After deposition, a portion of the dielectric material is removed to expose the surfaces of the bottom electrodes, leaving behind dielectric barriers between adjacent bottom electrodes.
Potential Applications
This technology can be applied in various fields, including:
- Memory devices: The ferroelectric memory arrays with low permittivity dielectric barriers can be used in various memory devices, such as computer systems, smartphones, and other electronic devices.
- Data storage: The improved memory arrays can enhance data storage capabilities, allowing for faster and more efficient data access and retrieval.
- Integrated circuits: The technology can be integrated into various integrated circuits, enabling higher performance and improved functionality.
Problems Solved
The patent application addresses several problems in the field of ferroelectric memory arrays:
- Permittivity issues: The use of low permittivity dielectric barriers helps to reduce the permittivity mismatch between the ferroelectric material and the dielectric material, improving the overall performance of the memory arrays.
- Manufacturing challenges: The described manufacturing process provides a solution for depositing and removing dielectric material to create the desired dielectric barriers between adjacent bottom electrodes.
- Memory cell interference: The dielectric barriers help to minimize interference between adjacent memory cells, improving the reliability and stability of the memory arrays.
Benefits
The technology offers several benefits:
- Improved performance: The use of low permittivity dielectric barriers enhances the performance of ferroelectric memory arrays, resulting in faster and more efficient data storage and retrieval.
- Enhanced reliability: The dielectric barriers reduce interference between memory cells, improving the reliability and stability of the memory arrays.
- Manufacturing efficiency: The described manufacturing process provides an efficient and effective way to deposit and remove dielectric material, simplifying the production of the memory arrays.
Original Abstract Submitted
Methods, systems, and devices for ferroelectric memory arrays with low permittivity dielectric barriers are described. In some cases, a manufacturing process to manufacture a memory array may include depositing a dielectric barrier between respective bottom electrodes of a pair of adjacent memory cells of the array. For example, the manufacturing process may include depositing a film of dielectric material over rows of bottom electrodes formed on a set of dielectric walls to at least partially fill space between adjacent bottom electrodes. Alternatively, the manufacturing process may include depositing a film of dielectric material into a set of cavities of the memory array, each cavity having a set of bottom electrodes formed on sidewalls of the cavity. Subsequently, a portion of the dielectric material may be removed to expose surfaces of the bottom electrodes, leaving behind a set of dielectric barriers between adjacent bottom electrodes.
