18204821. MEMORY ADDRESS TRANSLATION FOR DATA PROTECTION AND RECOVERY simplified abstract (Micron Technology, Inc.)

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MEMORY ADDRESS TRANSLATION FOR DATA PROTECTION AND RECOVERY

Organization Name

Micron Technology, Inc.

Inventor(s)

Daniele Balluchi of Cernusco Sul Naviglio (IT)

MEMORY ADDRESS TRANSLATION FOR DATA PROTECTION AND RECOVERY - A simplified explanation of the abstract

This abstract first appeared for US patent application 18204821 titled 'MEMORY ADDRESS TRANSLATION FOR DATA PROTECTION AND RECOVERY

Simplified Explanation

The abstract of the patent application describes a method for translating host commands to access data stored in memory devices with chip kill capability. This involves locating the host data as well as the parity data that is striped with the host data. The address translation process includes logical operations to determine the location of the parity data.

  • The patent application focuses on address translation of host commands for accessing data stored in memory devices with chip kill capability.
  • The method involves locating both the host data and the parity data that is striped with the host data.
  • Logical operations, such as arithmetic operations, are used for locating the parity data during the address translation process.

Potential Applications

  • This technology can be applied in various memory devices with chip kill capability, such as solid-state drives (SSDs) and RAID systems.
  • It can be used in data centers, servers, and other computing systems that rely on memory devices for data storage and retrieval.

Problems Solved

  • The technology solves the problem of efficiently locating both the host data and the parity data in memory devices with chip kill capability.
  • It addresses the challenge of performing address translation for accessing data stored in memory devices with striped parity data.

Benefits

  • The method provides an efficient and reliable way to translate host commands for accessing data in memory devices.
  • By locating both the host data and the parity data, it ensures the integrity and availability of the stored data.
  • The use of logical operations in the address translation process simplifies the overall system design and implementation.


Original Abstract Submitted

Address translation of host commands to access host data stored in memory devices that provides a chip kill capability not only involves locating where the host data is stored, but also involves locating where parity data striped with the host data is stored. In locating where the parity data is stored, the address translation can be performed with logical (e.g., arithmetic) operations.

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