17863000. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)
MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM
Organization Name
Inventor(s)
Kishore Kumar Muchherla of Fremont CA (US)
Jonathan S. Parry of Boise ID (US)
Nicola Ciocchini of Boise ID (US)
Animesh Roy Chowdhury of Boise ID (US)
Jung Sheng Hoei of Newark CA (US)
Niccolo' Righetti of Boise ID (US)
MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 17863000 titled 'MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM
Simplified Explanation
The patent application describes a system that includes a memory device and a processing device. The processing device receives read commands for a set of memory cells and increments a read counter based on the time difference between the commands. When the read counter reaches a certain threshold, a data integrity scan is performed on the memory cells.
- Memory device with multiple memory cells
- Processing device receives read commands for a set of memory cells
- Read counter is incremented based on the time difference between commands
- Data integrity scan is performed when the read counter reaches a threshold
Potential Applications
- Data storage systems
- Computer memory devices
- Solid-state drives
Problems Solved
- Ensures data integrity in memory cells
- Detects potential errors or corruption in memory cells
Benefits
- Improved reliability of memory devices
- Early detection of data corruption
- Prevents data loss or errors in memory cells
Original Abstract Submitted
A system includes a memory device including multiple memory cells and a processing device operatively coupled to the memory device. The processing device is to receive a first read command at a first time. The first read command is with respect to a set of memory cells of the memory device. The processing device is further to receive a second read command at a second time. The second read command is with respect to the set of memory cells of the memory device. The processing device is further to increment a read counter for the memory device by a value reflecting a difference between the first time and the second time. The processing device is further to determine that a value of the read counter satisfies a threshold criterion. The processing device is further to perform a data integrity scan with respect to the set of memory cells.
