18049121. BIT ERROR MANAGEMENT IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)

BIT ERROR MANAGEMENT IN MEMORY DEVICES

Organization Name

Micron Technology, Inc.

Inventor(s)

Jeremy Binfet of Boise ID (US)

Tommaso Vali of Sezze (IT)

Walter Di Francesco of Avezzano (IT)

Luigi Pilolli of L'Aquila (IT)

Angelo Covello of Avezzano (IT)

Andrea D'alessandro of Avezzano (IT)

Agostino Macerola of San Benedetto dei Marsi (IT)

Cristina Lattaro of Rieti (IT)

Claudia Ciaschi of Latina (IT)

BIT ERROR MANAGEMENT IN MEMORY DEVICES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18049121 titled 'BIT ERROR MANAGEMENT IN MEMORY DEVICES

Simplified Explanation

The patent application describes a memory device that can read data stored in a non-volatile memory in a specific format. Here are the key points:

• The memory device receives a command to read data in a first format from non-volatile memory.
• The data is actually stored in a second format in the non-volatile memory, which includes multiple copies of the data in the first format.
• An error correction circuit in the memory device compares the multiple copies of the data to determine the dominant bit state for each bit of the data.
• The memory device then stores the dominant bit state for each bit of the data in the non-volatile memory as error-corrected data in the first format.
• When the memory device receives a command to read the data in the first format, it retrieves and provides the error-corrected data from the non-volatile memory.

Potential applications of this technology could include:

• Improving the reliability and accuracy of data read from non-volatile memory.
• Enhancing error correction capabilities in memory devices.
• Increasing the efficiency of data storage and retrieval processes.

Original Abstract Submitted

In some implementations, a memory device may receive a command to read data in a first format from non-volatile memory, the data being stored in a second format in the non-volatile memory, the second format comprising a plurality of copies of the data in the first format. The memory device may compare, using an error correction circuit, the plurality of copies of the data to determine a dominant bit state for bits of the data. The memory device may store the dominant bit state for bits of the data in the non-volatile memory as error-corrected data in the first format. The memory device may cause the error-corrected data to be read from the non-volatile memory in the first format as a response to the command to read the data in the first format.