17830013. DIELECTRIC ENGINEERED TUNNEL REGION IN MEMORY CELLS simplified abstract (Micron Technology, Inc.)
DIELECTRIC ENGINEERED TUNNEL REGION IN MEMORY CELLS
Organization Name
Inventor(s)
Jae Young Ahn of Boise ID (US)
Terry Hyunsik Kim of Boise ID (US)
Manzar Siddik of Boise ID (US)
DIELECTRIC ENGINEERED TUNNEL REGION IN MEMORY CELLS - A simplified explanation of the abstract
This abstract first appeared for US patent application 17830013 titled 'DIELECTRIC ENGINEERED TUNNEL REGION IN MEMORY CELLS
Simplified Explanation
Abstract
The patent application describes memory devices with memory cells that have an engineered tunnel region between a channel structure and a charge storage region. The engineered tunnel region improves the read, program, and retention operations of the memory.
- The engineered tunnel region consists of multiple dielectric regions with a modulation of dielectric constant.
- The dielectric regions include materials with low and high dielectric constants relative to silicon nitride.
- Some dielectric regions have deep traps near the charge storage region.
Potential Applications
- Memory devices in various electronic devices such as smartphones, tablets, and computers.
- Data storage in cloud computing systems.
- Solid-state drives (SSDs) for faster and more reliable data storage.
Problems Solved
- Improved read, program, and retention operations of memory cells.
- Enhanced performance and reliability of memory devices.
- Increased data storage capacity and efficiency.
Benefits
- Faster and more efficient data access and retrieval.
- Higher data storage capacity.
- Improved reliability and durability of memory devices.
Original Abstract Submitted
A variety of applications can include memory devices having memory cells, where each memory cell can have an engineered tunnel region between a channel structure of the memory cell and a charge storage region of the memory cell. The engineered tunnel region can be directed to improved read, program, and retention operations of the memory region. In various embodiments, the engineered tunnel region can have multiple dielectric regions with a dielectric constant modulation by inserting material having a dielectric constant that is low relative to silicon nitride and material having a dielectric constant that is high relative to silicon nitride. In various embodiments, the engineered tunnel region of a memory cell can have multiple dielectric regions with material having deep traps near the charge storage region of the memory cell. Other engineered tunnel regions are disclosed.
