17830224. MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS simplified abstract (Micron Technology, Inc.)

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MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS

Organization Name

Micron Technology, Inc.

Inventor(s)

Bharat Bhushan of Taichung (TW)

Akshay N. Singh of Boise ID (US)

Bret K. Street of Meridian ID (US)

Debjit Datta of Taichung (TW)

Eiichi Nakano of Boise ID (US)

MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17830224 titled 'MODULAR CONSTRUCTION OF HYBRID-BONDED SEMICONDUCTOR DIE ASSEMBLIES AND RELATED SYSTEMS AND METHODS

Simplified Explanation

The abstract describes a patent application for stacked semiconductor assemblies, which involve multiple modules stacked on top of each other. Each module consists of a base die and one or more upper dies, with hybrid bonds connecting the dies together. The lowermost module is also connected to a lowermost die through hybrid bonds. The sizes of the dies decrease as you move up the stack.

  • Stacked semiconductor assemblies with multiple modules
  • Each module consists of a base die and one or more upper dies
  • Hybrid bonds are used to connect the dies within each module
  • Hybrid bonds also connect the lowermost module to the lowermost die
  • Sizes of the dies decrease as you move up the stack

Potential Applications

  • High-performance computing systems
  • Data centers
  • Artificial intelligence applications
  • Internet of Things devices
  • Mobile devices

Problems Solved

  • Efficient use of space in semiconductor assemblies
  • Improved performance and functionality in stacked modules
  • Enhanced connectivity between dies within each module

Benefits

  • Increased computing power and speed
  • Reduced footprint and size of semiconductor assemblies
  • Improved thermal management
  • Enhanced scalability and flexibility in system design


Original Abstract Submitted

Stacked semiconductor assemblies, and related systems and methods, are disclosed herein. A representative stacked semiconductor assembly can include a lowermost die and two or more modules carried by an upper surface of the lowermost die. Each of the module(s) can include a base die and one or more upper dies and/or an uppermost die carried by the base die. Each of the dies in the module is coupled via hybrid bonds between adjacent dies. Further, the base die in a lowermost module is coupled to the lowermost die by hybrid bonds. As a result of the modular construction, the lowermost die can have a first longitudinal footprint, the base die in each of the module(s) can have a second longitudinal footprint smaller than the first longitudinal footprint, and each of the upper die(s) and/or the uppermost die can have a third longitudinal footprint smaller than the second longitudinal footprint.