17860711. MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
Contents
- 1 MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES
Organization Name
Inventor(s)
Mustafa N. Kaynak of San Diego CA (US)
Patrick R. Khayat of San Diego CA (US)
Sivagnanam Parthasarathy of Carlsbad CA (US)
MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17860711 titled 'MANAGING PROGRAM VERIFY VOLTAGE OFFSETS FOR CHARGE COUPLING AND LATERAL MIGRATION COMPENSATION IN MEMORY DEVICES
Simplified Explanation
The abstract of this patent application describes a method for improving the read window budget (RWB) of memory cells in a computer system. The method involves identifying groups of wordlines, determining the maximum increase in RWB for each group, and calculating a target aggregate RWB increase. The method also involves determining the minimum number of memory cell programming level groups needed to reach the target RWB increase, and applying voltage offsets during memory cell access operations based on the specific programming level group containing the target programming level.
- Identifying wordline groups and corresponding default program verify (PV) voltages
- Determining maximum RWB increase for each wordline group
- Calculating a target aggregate RWB increase
- Determining minimum number of programming level groups needed to reach the target RWB increase
- Applying voltage offsets during memory cell access operations based on the specific programming level group containing the target programming level
Potential Applications
- This technology can be applied in computer systems that use memory cells, such as solid-state drives (SSDs) and random-access memory (RAM).
- It can improve the performance and reliability of memory cells by optimizing the read window budget.
Problems Solved
- Memory cells in computer systems often have limited read window budgets, which can lead to errors and reduced performance.
- This technology solves the problem by dynamically adjusting the programming levels and voltages of memory cells to increase the read window budget.
Benefits
- Improved performance and reliability of memory cells in computer systems.
- Increased read window budget allows for more accurate and efficient reading of data from memory cells.
- Dynamic adjustment of programming levels and voltages optimizes the read window budget, leading to better overall system performance.
Original Abstract Submitted
Embodiments disclosed can include identifying wordline groups where each wordline group is associated with a corresponding default program verify (PV) voltage for each programming level, and determining, for each wordline group, a maximum read window budget (RWB) increase. They can further include defining a target aggregate RWB increase amount based on the maximum RWB increase, and determining, for each wordline group, a minimum number of memory cell programming level groups with corresponding PV voltage offsets sufficient to reach the target aggregate RWB increase amount. The embodiments can also include grouping the programming levels of a specified memory cell into the minimum number of programming level, and applying, based on the specific programming level group containing a target programming level, a corresponding PV voltage offset during a memory cell access operation.
