17888460. MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL THREE DIMENSIONAL (3D) MEMORY simplified abstract (Micron Technology, Inc.)
MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL THREE DIMENSIONAL (3D) MEMORY
Organization Name
Inventor(s)
David K. Hwang of Boise ID (US)
John F. Kaeding of Boise ID (US)
Matthew S. Thorum of Boise ID (US)
Scott E. Sills of Boise ID (US)
Yoshitaka Nakamura of Boise ID (US)
Glen H. Walters of Boise ID (US)
MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL THREE DIMENSIONAL (3D) MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 17888460 titled 'MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL THREE DIMENSIONAL (3D) MEMORY
Simplified Explanation
The patent application describes a system for vertically stacked memory cells with horizontally oriented access devices and storage nodes formed in tiers. The system uses alternating layers of silicon germanium (SiGe) and single crystalline silicon (Si) to form the tiers.
- The memory cells are arranged in a vertical three-dimensional (3D) structure.
- The access devices have horizontally oriented first and second source/drain regions separated by a single crystalline silicon channel region.
- Gate all around (GAA) structures connect to horizontally oriented access lines opposing the channel regions.
- Vertical digit lines are coupled to the first source/drain regions.
Potential applications of this technology:
- Memory devices in computers, smartphones, and other electronic devices.
- Data storage in cloud computing and data centers.
- High-performance computing systems.
Problems solved by this technology:
- Increased memory density and capacity in a smaller footprint.
- Improved performance and speed of memory access.
- Enhanced reliability and durability of memory cells.
Benefits of this technology:
- Higher memory density allows for more data storage in a smaller space.
- Faster access to stored data improves overall system performance.
- Improved reliability ensures data integrity and reduces the risk of data loss.
Original Abstract Submitted
Systems, methods and apparatus are provided for an array of vertically stacked memory cells having horizontally oriented access devices and storage nodes formed in tiers. And, more particularly, to multiple, alternating epitaxially grown silicon germanium (SiGe) and single crystalline silicon (Si) in different thicknesses to form tiers in which to form the horizontal access devices in vertical three dimensional (3D) memory. The horizontally oriented access devices can have a first source/drain regions and a second source drain regions separated by epitaxially grown, single crystalline silicon (Si) channel regions. Horizontally oriented access lines can connect to gate all around (GAA) structures opposing the channel regions. Vertical digit lines coupled to the first source/drain regions.
