17876271. MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES simplified abstract (Micron Technology, Inc.)
MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES
Organization Name
Inventor(s)
Mallesh Rajashekharaiah of Boise ID (US)
Nancy M. Lomeli of Boise ID (US)
MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17876271 titled 'MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES
Simplified Explanation
The abstract describes an apparatus and method for forming memory cells in a device. The apparatus includes tiers with conductive materials forming control gates for the memory cells. A staircase structure is formed in the tiers, with the conductive materials forming part of the structure. A dielectric liner is formed on the sidewall of the staircase structure, with recesses in the tiers adjacent to the sidewall. A contact structure extends through the dielectric liner, with the liner located between the contact structure and the conductive materials.
- Tiers with conductive materials form control gates for memory cells
- Staircase structure formed in the tiers, with conductive materials forming part of the structure
- Dielectric liner formed on the sidewall of the staircase structure
- Recesses in the tiers adjacent to the sidewall for the dielectric liner
- Contact structure extends through the dielectric liner, with the liner located between the contact structure and the conductive materials
Potential Applications
- Memory cell formation in electronic devices
- Semiconductor manufacturing
Problems Solved
- Efficient formation of memory cells
- Improved control gate structure
Benefits
- Enhanced memory cell performance
- Increased device functionality
- Improved manufacturing process efficiency
Original Abstract Submitted
Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes tiers located one over another, the tiers including conductive materials that form part of respective control gates for memory cells of the apparatus; a staircase structure formed in the tiers, the conductive materials including respective portions that collectively form a part of the staircase structure, the staircase structure including a sidewall on a side of the staircase structure; a dielectric liner formed on the sidewall; recesses formed in respective tiers and adjacent the sidewall such that respective portions of the dielectric liner are located in the recesses; and a contact structure extending through a portion of the dielectric liner, wherein the portions of the dielectric liner are between the contract structure and the conductive materials.
