17929970. MAXIMUM MEMORY CLOCK ESTIMATION PROCEDURES simplified abstract (Micron Technology, Inc.)

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MAXIMUM MEMORY CLOCK ESTIMATION PROCEDURES

Organization Name

Micron Technology, Inc.

Inventor(s)

Erik V. Pohlmann of Boise ID (US)

MAXIMUM MEMORY CLOCK ESTIMATION PROCEDURES - A simplified explanation of the abstract

This abstract first appeared for US patent application 17929970 titled 'MAXIMUM MEMORY CLOCK ESTIMATION PROCEDURES

Simplified Explanation

The patent application describes methods, systems, and devices for estimating the maximum memory clock speed. Here is a simplified explanation of the abstract:

  • The device truncates a value of a first parameter associated with the duration of a clock cycle for a memory array.
  • It then estimates a value of a second parameter that is inversely proportional to the truncated value of the first parameter.
  • The device determines the number of clock cycles required to access the memory cells of the memory array based on the adjusted second parameter.
  • Finally, the device accesses the memory cells of the memory array using the determined number of clock cycles.

Potential applications of this technology:

  • This technology can be used in host devices to optimize the memory clock speed for efficient memory access.
  • It can be implemented in various electronic devices that use memory arrays, such as computers, smartphones, and gaming consoles.

Problems solved by this technology:

  • The technology solves the problem of determining the maximum memory clock speed for accessing memory cells without causing errors or inefficiencies.
  • It provides a method to estimate the number of clock cycles required for accessing memory cells based on the duration of the clock cycle.

Benefits of this technology:

  • By estimating the maximum memory clock speed, this technology allows for efficient memory access, improving overall system performance.
  • It helps in avoiding errors and inefficiencies that can occur when accessing memory cells at a clock speed that exceeds the maximum limit.


Original Abstract Submitted

Methods, systems, and devices for maximum memory clock estimation procedures are described. For instance, a device, such as a host device, may truncate a value of a first parameter associated with a first duration for a clock coupled with a memory array to perform a clock cycle and may estimate a value of a second parameter that is inversely proportional to the truncated value of the first parameter. The device may determine a quantity of clock cycles associated with a maximum duration for accessing one or more memory cells of the memory array based on adjusting the second parameter. The device may access the one or more memory cells of the memory array based on the determined quantity of clock cycles associated with the maximum duration.

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