17813420. APPARATUSES INCLUDING SEMICONDUCTIVE PILLAR STRUCTURES, AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS simplified abstract (Micron Technology, Inc.)

From WikiPatents
Jump to navigation Jump to search

APPARATUSES INCLUDING SEMICONDUCTIVE PILLAR STRUCTURES, AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS

Organization Name

Micron Technology, Inc.

Inventor(s)

Mitsunari Sukekawa of Hiroshima -shi (JP)

APPARATUSES INCLUDING SEMICONDUCTIVE PILLAR STRUCTURES, AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17813420 titled 'APPARATUSES INCLUDING SEMICONDUCTIVE PILLAR STRUCTURES, AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS

Simplified Explanation

The abstract describes an apparatus that includes semiconductive pillar structures, each consisting of a digit line contact region between two storage node contact regions. One of the semiconductive pillar structures has a first end portion with a first storage node contact region, a second end portion with a second storage node contact region, and a central portion with the digit line contact region. There are also two intervening portions between the end portions and the central portion, with each having a different orientation than the central portion.

  • The apparatus includes semiconductive pillar structures with specific regions for digit line and storage node contacts.
  • One of the semiconductive pillar structures has a unique design with angled intervening portions.
  • The angled intervening portions have a different orientation than the central portion.
  • The apparatus can be used in memory devices and electronic systems.
  • The invention also includes methods of forming the apparatus.

Potential Applications

  • Memory devices
  • Electronic systems

Problems Solved

  • Efficient contact arrangement in semiconductive pillar structures
  • Improved performance and functionality of memory devices

Benefits

  • Enhanced memory device performance
  • Increased storage capacity
  • Improved reliability and durability


Original Abstract Submitted

An apparatus comprises semiconductive pillar structures each individually comprising a digit line contact region disposed laterally between two storage node contact regions. At least one semiconductive pillar structure of the semiconductive pillar structures comprises a first end portion comprising a first storage node contact region, a second end portion comprising a second storage node contact region, a central portion between the first end portion and the second end portion and comprising the digit line contact region, a first intervening portion between the first end portion and the central portion, and a second intervening portion between the second end portion and the central portion. A longitudinal axis of each of the first intervening portion and the second intervening portion is oriented at an angle with respect to a longitudinal axis of the central portion. Related memory devices, electronic systems, and methods of forming the apparatus are also described.