17807307. REFRESH RATE SELECTION FOR A MEMORY BUILT-IN SELF-TEST simplified abstract (Micron Technology, Inc.)
REFRESH RATE SELECTION FOR A MEMORY BUILT-IN SELF-TEST
Organization Name
Inventor(s)
Scott E. Schaefer of Boise ID (US)
REFRESH RATE SELECTION FOR A MEMORY BUILT-IN SELF-TEST - A simplified explanation of the abstract
This abstract first appeared for US patent application 17807307 titled 'REFRESH RATE SELECTION FOR A MEMORY BUILT-IN SELF-TEST
Simplified Explanation
The patent application describes a method for selecting a refresh rate for a memory built-in self-test (BIST) in a memory device.
- The memory device reads one or more bits stored in a mode register to determine the refresh rate for the memory BIST.
- The refresh rate indicates how often the memory cells to be tested by the BIST should be refreshed during the test.
- The memory device performs the memory BIST while refreshing the memory cells according to the selected refresh rate.
Potential Applications
- This technology can be applied in various memory devices, such as computer RAM, to improve the efficiency and accuracy of built-in self-tests.
- It can be used in manufacturing processes to ensure the quality and reliability of memory devices before they are shipped to customers.
Problems Solved
- Traditional memory BIST methods may not consider the impact of refresh rates on the accuracy of the test results.
- Inadequate refresh rates during memory BIST can lead to errors or false positives/negatives, affecting the reliability of the memory device.
Benefits
- By dynamically selecting the refresh rate based on the mode register bits, the memory BIST can be optimized for accuracy and efficiency.
- The technology ensures that the memory cells being tested are refreshed at an appropriate rate, minimizing the risk of errors during the test.
- It improves the overall quality and reliability of memory devices, leading to better performance and customer satisfaction.
Original Abstract Submitted
Implementations described herein relate to refresh rate selection for a memory built-in self-test. A memory device may read one or more bits, associated with the memory built-in self-test, that are stored in a mode register of the memory device. The memory device may identify, based on the one or more bits, a refresh rate to be used while performing the memory built-in self-test. The refresh rate may indicate a rate at which memory cells, to be tested by the memory built-in self-test, are to be refreshed while the memory built-in self-test is being performed. The memory device may perform the memory built-in self-test while refreshing the memory cells according to the refresh rate.
