17860027. PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THREE STRIPE TECHNIQUE simplified abstract (Micron Technology, Inc.)

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PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THREE STRIPE TECHNIQUE

Organization Name

Micron Technology, Inc.

Inventor(s)

Anton P. Eppich of Boise ID (US)

Shruti Jain of Boise ID (US)

PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THREE STRIPE TECHNIQUE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17860027 titled 'PATTERNING OF 3D NAND PILLARS AND FLYING BUTTRESS SUPPORTS WITH THREE STRIPE TECHNIQUE

Simplified Explanation

The patent application describes a 3D memory device that consists of a stack of supporting lattice layers and dielectric layers on a substrate. The device includes memory pillars that vertically penetrate the stack and are made up of vertically connected replacement gate (RG) memory cells. The memory pillars have a polygon shape with at least six sides in a horizontal plane parallel to the supporting lattice layers. Additionally, there are supporting buttress (SBT) pillars located at the outside ends of the memory pillars that vertically penetrate the stack. The memory pillars and SBT pillars are connected laterally by the supporting lattice layers.

  • The 3D memory device consists of a stack of supporting lattice layers and dielectric layers on a substrate.
  • Memory pillars, made up of vertically connected RG memory cells, vertically penetrate the stack.
  • Memory pillars have a polygon shape with at least six sides in a horizontal plane parallel to the supporting lattice layers.
  • Supporting buttress (SBT) pillars, exclusive of any memory cells, are located at the outside ends of the memory pillars and vertically penetrate the stack.
  • The memory pillars and SBT pillars are laterally connected by the supporting lattice layers.

Potential Applications

  • High-density memory storage devices
  • Data centers and cloud computing infrastructure
  • Mobile devices and smartphones
  • Artificial intelligence and machine learning systems

Problems Solved

  • Increased memory density and storage capacity
  • Improved performance and speed of memory devices
  • Enhanced reliability and durability of memory cells
  • Efficient use of space in memory devices

Benefits

  • Higher memory density allows for more data storage in a smaller footprint
  • Faster data access and retrieval due to improved performance
  • Increased reliability and durability of memory cells
  • Optimal utilization of space in memory devices


Original Abstract Submitted

A three-dimensional (3D) memory device including a stack of alternating supporting lattice layers and dielectric layers on a substrate, a plurality of memory pillars vertically penetrating the stack, each of the plurality of memory pillars including a plurality of vertically connected replacement gate (RG) memory cells that correspond to the supporting lattice layers, each of the memory pillars having a first polygon shape having at least six sides in a horizontal plane parallel to the supporting lattice layers, and a plurality of supporting buttress (SBT) pillars exclusive of any memory cells that are located at outside ends of the plurality of memory pillars and that vertically penetrate the stack, wherein the plurality of memory pillars and the plurality of SBT pillars are laterally connected by the supporting lattice layers.