17842278. ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)

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ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE

Organization Name

Micron Technology, Inc.

Inventor(s)

Li-Te Chang of San Jose CA (US)

Murong Lang of San Jose CA (US)

Zhenming Zhou of San Jose CA (US)

ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 17842278 titled 'ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE

Simplified Explanation

Explanation of the Abstract: A processing device receives a read command for a specific logical address in a memory device. The processing device translates this logical address into a physical address, which specifies a wordline and a memory device die. If the physical block associated with the physical address is partially programmed, the processing device identifies a threshold voltage offset for the wordline. It then computes a modified threshold voltage by applying this offset to a read level associated with the memory device die. Finally, the processing device reads the data from the physical block using the modified threshold voltage.

  • The patent application describes a method for reading data from a memory device using a modified threshold voltage.
  • The processing device translates a logical address into a physical address, specifying a wordline and a memory device die.
  • If the physical block is partially programmed, a threshold voltage offset associated with the wordline is identified.
  • A modified threshold voltage is computed by applying the threshold voltage offset to a read level associated with the memory device die.
  • The data from the physical block is then read using the modified threshold voltage.

Potential Applications:

  • This technology can be applied in various memory devices, such as flash memory or non-volatile memory, to improve read operations.
  • It can be used in electronic devices like smartphones, tablets, and computers to enhance memory performance and efficiency.
  • The method can be implemented in data centers and servers to optimize data retrieval from memory devices.

Problems Solved by this Technology:

  • Partially programmed physical blocks in memory devices can cause read errors or inefficiencies.
  • Traditional read methods may not account for variations in threshold voltage, leading to inaccurate data retrieval.
  • This technology addresses these issues by identifying threshold voltage offsets and computing a modified threshold voltage for more reliable and accurate data reading.

Benefits of this Technology:

  • Improved read accuracy and efficiency by considering threshold voltage offsets.
  • Enhanced performance of memory devices by optimizing data retrieval.
  • Reduced read errors and improved reliability in partially programmed physical blocks.
  • Increased overall efficiency and speed of electronic devices utilizing this technology.


Original Abstract Submitted

A read command is received by a processing device coupled to a memory device. The read command specified a logical address. The processing device translates the logical address into a physical address of a physical block of the memory device, wherein the physical address specifies a wordline and a memory device die. Responsive to determining that the physical block is partially programmed, the processing device identifies a threshold voltage offset associated with the wordline. The processing device computes a modified threshold voltage by applying the threshold voltage offset to a read level associated with the memory device die. The processing device reads the data from the physical block using the modified threshold voltage.