17816505. TECHNIQUES FOR CONCURRENTLY-FORMED CAVITIES IN THREE-DIMENSIONAL MEMORY ARRAYS simplified abstract (Micron Technology, Inc.)

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TECHNIQUES FOR CONCURRENTLY-FORMED CAVITIES IN THREE-DIMENSIONAL MEMORY ARRAYS

Organization Name

Micron Technology, Inc.

Inventor(s)

Yoshiaki Fukuzumi of Yokohama (JP)

David H. Wells of Boise ID (US)

TECHNIQUES FOR CONCURRENTLY-FORMED CAVITIES IN THREE-DIMENSIONAL MEMORY ARRAYS - A simplified explanation of the abstract

This abstract first appeared for US patent application 17816505 titled 'TECHNIQUES FOR CONCURRENTLY-FORMED CAVITIES IN THREE-DIMENSIONAL MEMORY ARRAYS

Simplified Explanation

The patent application describes methods, systems, and devices for creating cavities in three-dimensional memory arrays. These cavities are formed during the manufacturing process of a memory die and are used to create different features of the memory device.

  • The cavities are formed through material removal operations, allowing for the creation of various structures within the memory die.
  • A sacrificial region is formed using material addition or removal operations, which includes openings that support the formation of different memory device structures.
  • Once the structures are formed, the sacrificial region is isolated from the active region by merging a subset of the previously-formed cavities.

Potential Applications

  • This technology can be applied in the manufacturing of three-dimensional memory arrays.
  • It can be used to create complex memory device structures with multiple features.

Problems Solved

  • This technology solves the problem of efficiently forming cavities in three-dimensional memory arrays.
  • It allows for the creation of different memory device structures using a single set of cavities.

Benefits

  • The concurrent formation of cavities simplifies the manufacturing process of memory dies.
  • It enables the creation of complex memory device structures with improved efficiency.
  • The ability to isolate the sacrificial region from the active region improves the overall performance and reliability of the memory device.


Original Abstract Submitted

Methods, systems, and devices for techniques for concurrently-formed cavities in three-dimensional memory arrays are described. As part of forming a memory die, a plurality of cavities may be formed by a set of one or more material removal operations, and different subsets of the plurality of cavities may be used to form different features of the memory die. In some examples, a sacrificial region may be formed in accordance with one or more material addition or removal operations, and such a sacrificial region may include openings that support the formation of various structures of a memory device. After the formation of such structures, the sacrificial region may be isolated from an active region by merging a subset of the previously-formed plurality of cavities.