Taiwan Semiconductor Manufacturing Company, Ltd. patent applications published on November 9th, 2023
Summary of the patent applications from Taiwan Semiconductor Manufacturing Company, Ltd. on November 9th, 2023
Taiwan Semiconductor Manufacturing Company, Ltd. has recently filed several patents related to memory devices and semiconductor structures. These patents cover various aspects such as memory stack formation, semiconductor structure design, memory cell fabrication, and ferroelectric memory devices.
Summary: - The patents describe memory stacks consisting of bottom and top electrode layers, a phase change layer, and a rough portion on the top electrode layer. - A semiconductor structure is disclosed, featuring a storage element layer and a selector with multiple insulating and conductive layers. - A memory device is described, comprising a substrate, a spin-orbit torque layer, and a magnetic tunneling junction (MTJ) with a synthetic free layer, barrier layer, and reference layer. - A method for forming a memory cell involves depositing a memory film, a hard mask film, and performing trimming and etching processes. - A bipolar selector with independently tunable threshold voltages is introduced, along with a memory cell and memory array comprising the selector. - An integrated chip is disclosed, including a magnetic tunnel junction, two unipolar selectors, and their electrical connections. - A ferroelectric random-access memory (FeRAM) cell is presented, featuring a bottom electrode, switching layer, and top electrode with an interface structure to prevent diffusion. - A semiconductor device is described, consisting of a semiconductor substrate, memory gate, and data storage element made of a ferroelectric material. - A semiconductor structure is disclosed, comprising a substrate, stacked structure with insulating layers and gate members, and a core structure with memory layer, channel member, contact member, and liner member. - A method of forming a ferroelectric memory device involves atomic layer deposition (ALD) to create a ferroelectric layer with an orthorhombic phase (O-phase).
Notable Applications:
- Memory stack formation and semiconductor structure design for improved memory devices.
- Ferroelectric memory cell fabrication with enhanced endurance and prevention of leakage current.
- Tunable threshold voltages in bipolar selectors for improved performance in memory cells and arrays.
- Integration of magnetic tunnel junctions and unipolar selectors in an integrated chip for magnetic memory storage.
- Atomic layer deposition for the formation of ferroelectric memory devices with enhanced ferroelectric polarization.
Contents
- 1 Patent applications for Taiwan Semiconductor Manufacturing Company, Ltd. on November 9th, 2023
- 1.1 OPTICAL DETECTION FOR BIO-ENTITIES (18353603)
- 1.2 THERMAL SENSOR USING INVERSION DIFFUSIVITY RESISTANCE (17735887)
- 1.3 CONCENTRATION DETERMINATION METHOD (17736105)
- 1.4 PROBE CARD SUBSTRATE, SUBSTRATE STRUCTURE AND METHOD OF FABRICATING THE SAME (17738023)
- 1.5 APPARATUS, PROCESSING CIRCUITRY AND METHOD FOR MEASURING DISTANCE FROM DIRECT TIME OF FLIGHT SENSOR ARRAY TO AN OBJECT (17737030)
- 1.6 PACKAGE, OPTICAL DEVICE, AND MANUFACTURING METHOD OF PACKAGE (18354662)
- 1.7 SUBSTRATE STAGE AND SUBSTRATE PROCESSING SYSTEM USING THE SAME (18351571)
- 1.8 METHOD, SYSTEM AND NON-TRANSITORY COMPUTER-READABLE MEDIUM FOR REDUCING WORK-IN-PROCESS (18337021)
- 1.9 INTEGRATED CIRCUIT DESIGN METHOD AND SYSTEM (18347928)
- 1.10 CIRCUIT ARRANGEMENTS HAVING REDUCED DEPENDENCY ON LAYOUT ENVIRONMENT (18347947)
- 1.11 LEAKAGE REDUCTION BETWEEN TWO TRANSISTOR DEVICES ON A SAME CONTINUOUS FIN (18355501)
- 1.12 INTEGRATED CIRCUIT, SYSTEM FOR AND METHOD OF FORMING AN INTEGRATED CIRCUIT (18354423)
- 1.13 INTEGRATED CIRCUIT DESIGN USING FUZZY MACHINE LEARNING (18225020)
- 1.14 NEW WAS CELL FOR SRAM HIGH-R ISSUE IN ADVANCED TECHNOLOGY NODE (18354824)
- 1.15 CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHOD (18354631)
- 1.16 PROBE CARD DEVICE AND CIRCUIT PROTECTION ASSEMBLY THEREOF (17809901)
- 1.17 REFLECTION MODE PHOTOMASK (18356366)
- 1.18 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME (17736186)
- 1.19 WAFER THINNING METHOD HAVING FEEDBACK CONTROL (18356388)
- 1.20 WAFER CLEANING METHOD (18351566)
- 1.21 SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION (17661838)
- 1.22 METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (17738182)
- 1.23 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF (18356212)
- 1.24 ISOLATION WITH MULTI-STEP STRUCTURE (18343947)
- 1.25 Middle-Of-Line Interconnect Structure Having Air Gap And Method Of Fabrication Thereof (18356911)
- 1.26 METHOD OF FABRICATING CONTACT STRUCTURE (17738009)
- 1.27 SYSTEM AND METHOD FOR HIGH SPEED INSPECTION OF SEMICONDUCTOR SUBSTRATES (18223498)
- 1.28 METHOD FOR NON-DESTRUCTIVE INSPECTION OF CELL ETCH REDEPOSITION (18352382)
- 1.29 PACKAGE AND MANUFACTURING METHOD THEREOF (18355379)
- 1.30 SEMICONDUCTOR STRUCTURE HAVING AN ANTI-ARCING PATTERN DISPOSED ON A PASSIVATION LAYER (18352271)
- 1.31 DIE STACKING STRUCTURE, SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE DIE STACKING STRUCTURE (17738032)
- 1.32 METHOD OF FABRICATING PACKAGE STRUCTURE (18356227)
- 1.33 OVERSIZED VIA AS THROUGH-SUBSTRATE-VIA (TSV) STOP LAYER (18355463)
- 1.34 SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING (17662366)
- 1.35 VIA LANDING ON FIRST AND SECOND BARRIER LAYERS TO REDUCE CLEANING TIME OF CONDUCTIVE STRUCTURE (18353997)
- 1.36 PACKAGE HAVING DIFFERENT METAL DENSITIES IN DIFFERENT REGIONS AND MANUFACTURING METHOD THEREOF (18356224)
- 1.37 SEMICONDUCTOR DEVICE INCLUDING BACK SIDE POWER SUPPLY CIRCUIT (18221787)
- 1.38 INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME (18224209)
- 1.39 RUTHENIUM OXIDE FILM AND RUTHENIUM LINER FOR LOW-RESISTANCE COPPER INTERCONNECTS IN A DEVICE (18352299)
- 1.40 INTEGRATED CHIP HAVING A BURIED POWER RAIL (18347775)
- 1.41 SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING (17661858)
- 1.42 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE (17737998)
- 1.43 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF (18354633)
- 1.44 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (17738016)
- 1.45 METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE (18354668)
- 1.46 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (18352270)
- 1.47 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME (18354614)
- 1.48 SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME (18224065)
- 1.49 IN-MEMORY COMPUTING CIRCUIT AND FABRICATION METHOD THEREOF (17736971)
- 1.50 HYBRID BOND PAD STRUCTURE (18355524)
- 1.51 STACKING STRUCTURE, PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME (18357137)
- 1.52 INTEGRATED CIRCUIT DEVICE AND METHOD (18355273)
- 1.53 SEMICONDUCTOR STRUCTURE AND METHODS OF FORMING THE SAME (18225114)
- 1.54 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18224000)
- 1.55 SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME (18224487)
- 1.56 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18348531)
- 1.57 IMAGE SENSOR WITH SHALLOW TRENCH EDGE DOPING (18342877)
- 1.58 IMAGE SENSOR AND METHOD OF FORMING THE SAME (17738031)
- 1.59 IMAGE SENSOR WITH OVERLAP OF BACKSIDE TRENCH ISOLATION STRUCTURE AND VERTICAL TRANSFER GATE (18355481)
- 1.60 BAND-PASS FILTER FOR STACKED SENSOR (18353266)
- 1.61 CAPPING STRUCTURE TO REDUCE DARK CURRENT IN IMAGE SENSORS (18356694)
- 1.62 BACKSIDE DEEP TRENCH ISOLATION (BDTI) STRUCTURE FOR CMOS IMAGE SENSOR (17882869)
- 1.63 SEMICONDUCTOR DEVICE STRUCTURE WITH MAGNETIC ELEMENT (18353307)
- 1.64 INTEGRATED CHIP INDUCTOR STRUCTURE (18354842)
- 1.65 METAL-INSULATOR-METAL CAPACITOR AND METHODS OF MANUFACTURING (17662571)
- 1.66 GATE AIR SPACER PROTECTION DURING SOURCE/DRAIN VIA HOLE ETCHING (18355796)
- 1.67 SOURCE/DRAIN LEAKAGE PREVENTION (17848701)
- 1.68 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE (18352249)
- 1.69 SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME (17739149)
- 1.70 ETCH PROFILE CONTROL OF VIA OPENING (18352640)
- 1.71 THICKER CORNER OF A GATE DIELECTRIC STRUCTURE AROUND A RECESSED GATE ELECTRODE FOR AN MV DEVICE (18355549)
- 1.72 SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (18357163)
- 1.73 SEMICONDUCTOR DEVICE AND METHODS OF FORMATION (17662185)
- 1.74 REPLACEMENT SIDEWALL SPACERS (17662126)
- 1.75 SEMICONDUCTOR DEVICE HAVING NANOSTRUCTURE TRANSISTOR AND METHODS OF FABRICATION THEREOF (17739078)
- 1.76 BIPOLAR JUNCTION TRANSISTORS AND METHODS OF FORMING THE SAME (17737003)
- 1.77 CAP STRUCTURE COUPLED TO SOURCE TO REDUCE SATURATION CURRENT IN HEMT DEVICE (18348421)
- 1.78 TRANSISTOR STRUCTURE HAVING IMPROVED ELECTRODE CONDUCTANCE AND METHOD FOR MANUFACTURING THE SAME (17737504)
- 1.79 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME (18352230)
- 1.80 DOUBLE-SIDED STACKED DTC STRUCTURE (18353246)
- 1.81 CALIBRATION SYSTEM OF CANCELING EFFECT OF PHASE NOISE AND ANALOG-TO-DIGITAL CONVERTING DEVICE COMPRISING THE SAME (18052204)
- 1.82 PHOTOSENSING PIXEL INCLUDING SELF-ALIGNED LIGHT SHIELDING LAYER (17739387)
- 1.83 APPARATUS AND METHOD FOR GENERATING EXTREME ULTRAVIOLET RADIATION (18224005)
- 1.84 SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD OF MANUFACTURING THE SAME (18352267)
- 1.85 VARYING THE PO SPACE IN SEMICONDUCTOR LAYOUTS (17661795)
- 1.86 METHOD AND STRUCTURE FOR REDUCE OTP CELL AREA AND LEAKAGE (18353351)
- 1.87 ETCH METHOD FOR OPENING A SOURCE LINE IN FLASH MEMORY (18353308)
- 1.88 STRAP-CELL ARCHITECTURE FOR EMBEDDED MEMORY (18354881)
- 1.89 MEMORY DEVICE AND METHOD FOR FORMING THE SAME (17739871)
- 1.90 3D FERROELECTRIC MEMORY (18353954)
- 1.91 MEMORY DEVICE AND MANUFACTURING METHOD THEREOF (18354667)
- 1.92 METHOD OF FORMING FERROELECTRIC MEMORY DEVICE (17740331)
- 1.93 SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THEREOF (18353972)
- 1.94 INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME (18354768)
- 1.95 BOTTOM-ELECTRODE INTERFACE STRUCTURE FOR MEMORY (18353988)
- 1.96 MEMORY CELL WITH UNIPOLAR SELECTORS (18353290)
- 1.97 BIPOLAR SELECTOR WITH INDEPENDENTLY TUNABLE THRESHOLD VOLTAGES (18356585)
- 1.98 METHOD FOR FORMING A HARD MASK WITH A TAPERED PROFILE (18353254)
- 1.99 MEMORY DEVICE (18355385)
- 1.100 SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME (18356168)
- 1.101 MEMORY STACKS AND METHODS OF FORMING THE SAME (18356180)
Patent applications for Taiwan Semiconductor Manufacturing Company, Ltd. on November 9th, 2023
OPTICAL DETECTION FOR BIO-ENTITIES (18353603)
Main Inventor
Allen Timothy Chang
THERMAL SENSOR USING INVERSION DIFFUSIVITY RESISTANCE (17735887)
Main Inventor
Jaw-Juinn Horng
CONCENTRATION DETERMINATION METHOD (17736105)
Main Inventor
Tung-Tsun Chen
PROBE CARD SUBSTRATE, SUBSTRATE STRUCTURE AND METHOD OF FABRICATING THE SAME (17738023)
Main Inventor
Wei-Yu Chen
APPARATUS, PROCESSING CIRCUITRY AND METHOD FOR MEASURING DISTANCE FROM DIRECT TIME OF FLIGHT SENSOR ARRAY TO AN OBJECT (17737030)
Main Inventor
Chin Yin
PACKAGE, OPTICAL DEVICE, AND MANUFACTURING METHOD OF PACKAGE (18354662)
Main Inventor
Hsien-Wei Chen
SUBSTRATE STAGE AND SUBSTRATE PROCESSING SYSTEM USING THE SAME (18351571)
Main Inventor
Yu-Huan CHEN
METHOD, SYSTEM AND NON-TRANSITORY COMPUTER-READABLE MEDIUM FOR REDUCING WORK-IN-PROCESS (18337021)
Main Inventor
Po-Yi Wang
INTEGRATED CIRCUIT DESIGN METHOD AND SYSTEM (18347928)
Main Inventor
Tien-Chien HUANG
CIRCUIT ARRANGEMENTS HAVING REDUCED DEPENDENCY ON LAYOUT ENVIRONMENT (18347947)
Main Inventor
Huaixin XIAN
LEAKAGE REDUCTION BETWEEN TWO TRANSISTOR DEVICES ON A SAME CONTINUOUS FIN (18355501)
Main Inventor
Chun-Yen Lin
INTEGRATED CIRCUIT, SYSTEM FOR AND METHOD OF FORMING AN INTEGRATED CIRCUIT (18354423)
Main Inventor
Jung-Chan YANG
INTEGRATED CIRCUIT DESIGN USING FUZZY MACHINE LEARNING (18225020)
Main Inventor
Chao Tong
NEW WAS CELL FOR SRAM HIGH-R ISSUE IN ADVANCED TECHNOLOGY NODE (18354824)
Main Inventor
Yangsyu Lin
CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHOD (18354631)
Main Inventor
Win-San Khwa
PROBE CARD DEVICE AND CIRCUIT PROTECTION ASSEMBLY THEREOF (17809901)
Main Inventor
Chih-Chieh LIAO
REFLECTION MODE PHOTOMASK (18356366)
Main Inventor
Chun-Lang CHEN
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME (17736186)
Main Inventor
Meng-Hsiu HSIEH
WAFER THINNING METHOD HAVING FEEDBACK CONTROL (18356388)
Main Inventor
Yuan-Hsuan CHEN
WAFER CLEANING METHOD (18351566)
Main Inventor
Kuo-Shu TSENG
SEMICONDUCTOR PROCESSING TOOL AND METHODS OF OPERATION (17661838)
Main Inventor
Hsuan-Ying PENG
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE (17738182)
Main Inventor
Chih-Hsin YANG
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF (18356212)
Main Inventor
Sheng-Chieh Yang
ISOLATION WITH MULTI-STEP STRUCTURE (18343947)
Main Inventor
Ta-Chun LIN
Middle-Of-Line Interconnect Structure Having Air Gap And Method Of Fabrication Thereof (18356911)
Main Inventor
Yi-Nien Su
METHOD OF FABRICATING CONTACT STRUCTURE (17738009)
Main Inventor
Chang-Ting Chung
SYSTEM AND METHOD FOR HIGH SPEED INSPECTION OF SEMICONDUCTOR SUBSTRATES (18223498)
Main Inventor
Sheng He HUANG
METHOD FOR NON-DESTRUCTIVE INSPECTION OF CELL ETCH REDEPOSITION (18352382)
Main Inventor
I-Che Lee
PACKAGE AND MANUFACTURING METHOD THEREOF (18355379)
Main Inventor
Yung-Chi Chu
SEMICONDUCTOR STRUCTURE HAVING AN ANTI-ARCING PATTERN DISPOSED ON A PASSIVATION LAYER (18352271)
Main Inventor
Sheng-An Kuo
DIE STACKING STRUCTURE, SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD OF THE DIE STACKING STRUCTURE (17738032)
Main Inventor
Su-Chun Yang
METHOD OF FABRICATING PACKAGE STRUCTURE (18356227)
Main Inventor
Chih-Hao Chen
OVERSIZED VIA AS THROUGH-SUBSTRATE-VIA (TSV) STOP LAYER (18355463)
Main Inventor
Min-Feng Kao
SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING (17662366)
Main Inventor
Hsien-Wei CHEN
VIA LANDING ON FIRST AND SECOND BARRIER LAYERS TO REDUCE CLEANING TIME OF CONDUCTIVE STRUCTURE (18353997)
Main Inventor
Te-Hsien Hsieh
PACKAGE HAVING DIFFERENT METAL DENSITIES IN DIFFERENT REGIONS AND MANUFACTURING METHOD THEREOF (18356224)
Main Inventor
Hsien-Wei Chen
SEMICONDUCTOR DEVICE INCLUDING BACK SIDE POWER SUPPLY CIRCUIT (18221787)
Main Inventor
Gerben DOORNBOS
INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME (18224209)
Main Inventor
Wei-Hao Liao
RUTHENIUM OXIDE FILM AND RUTHENIUM LINER FOR LOW-RESISTANCE COPPER INTERCONNECTS IN A DEVICE (18352299)
Main Inventor
Shu-Cheng CHIN
INTEGRATED CHIP HAVING A BURIED POWER RAIL (18347775)
Main Inventor
Marcus Johannes Henricus Van Dal
SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING (17661858)
Main Inventor
Hsien-Wei CHEN
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE (17737998)
Main Inventor
Wei-Ming Wang
PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF (18354633)
Main Inventor
Tsung-Fu Tsai
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (17738016)
Main Inventor
Wei-Huan Fu
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE (18354668)
Main Inventor
Chia-Kuei Hsu
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF (18352270)
Main Inventor
Min-Feng Kao
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME (18354614)
Main Inventor
Shih-Wei Chen
SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING THE SAME (18224065)
Main Inventor
Shin-Yi YANG
IN-MEMORY COMPUTING CIRCUIT AND FABRICATION METHOD THEREOF (17736971)
Main Inventor
Hidehiro Fujiwara
HYBRID BOND PAD STRUCTURE (18355524)
Main Inventor
Sin-Yao Huang
STACKING STRUCTURE, PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME (18357137)
Main Inventor
Ming-Fa Chen
INTEGRATED CIRCUIT DEVICE AND METHOD (18355273)
Main Inventor
Wei-Ren CHEN
SEMICONDUCTOR STRUCTURE AND METHODS OF FORMING THE SAME (18225114)
Main Inventor
Ta-Chun LIN
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18224000)
Main Inventor
Wei-Yuan LU
SEMICONDUCTOR DEVICE AND A METHOD FOR FABRICATING THE SAME (18224487)
Main Inventor
Shun-Jang LIAO
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF (18348531)
Main Inventor
Kuo-Pi TSENG
IMAGE SENSOR WITH SHALLOW TRENCH EDGE DOPING (18342877)
Main Inventor
Yueh-Chuan Lee
IMAGE SENSOR AND METHOD OF FORMING THE SAME (17738031)
Main Inventor
Chun-Liang Lu
IMAGE SENSOR WITH OVERLAP OF BACKSIDE TRENCH ISOLATION STRUCTURE AND VERTICAL TRANSFER GATE (18355481)
Main Inventor
Feng-Chi Hung
BAND-PASS FILTER FOR STACKED SENSOR (18353266)
Main Inventor
Cheng Yu Huang
CAPPING STRUCTURE TO REDUCE DARK CURRENT IN IMAGE SENSORS (18356694)
Main Inventor
Po-Chun Liu
BACKSIDE DEEP TRENCH ISOLATION (BDTI) STRUCTURE FOR CMOS IMAGE SENSOR (17882869)
Main Inventor
Hsin-Hung Chen
SEMICONDUCTOR DEVICE STRUCTURE WITH MAGNETIC ELEMENT (18353307)
Main Inventor
Chi-Cheng CHEN
INTEGRATED CHIP INDUCTOR STRUCTURE (18354842)
Main Inventor
Hung-Wen Hsu
METAL-INSULATOR-METAL CAPACITOR AND METHODS OF MANUFACTURING (17662571)
Main Inventor
Min-Ying TSAI
GATE AIR SPACER PROTECTION DURING SOURCE/DRAIN VIA HOLE ETCHING (18355796)
Main Inventor
Kuo-Chiang Tsai
SOURCE/DRAIN LEAKAGE PREVENTION (17848701)
Main Inventor
Che-Lun Chang
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE (18352249)
Main Inventor
Yi-Tse Hung
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME (17739149)
Main Inventor
Chih-Teng LIAO
ETCH PROFILE CONTROL OF VIA OPENING (18352640)
Main Inventor
Te-Chih HSIUNG
THICKER CORNER OF A GATE DIELECTRIC STRUCTURE AROUND A RECESSED GATE ELECTRODE FOR AN MV DEVICE (18355549)
Main Inventor
Yi-Huan Chen
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (18357163)
Main Inventor
Bo-Feng Young
SEMICONDUCTOR DEVICE AND METHODS OF FORMATION (17662185)
Main Inventor
Hsu Ming HSIAO
REPLACEMENT SIDEWALL SPACERS (17662126)
Main Inventor
Chang-Ta Chen
SEMICONDUCTOR DEVICE HAVING NANOSTRUCTURE TRANSISTOR AND METHODS OF FABRICATION THEREOF (17739078)
Main Inventor
Wen-Kai LIN
BIPOLAR JUNCTION TRANSISTORS AND METHODS OF FORMING THE SAME (17737003)
Main Inventor
Chun-Tsung KUO
CAP STRUCTURE COUPLED TO SOURCE TO REDUCE SATURATION CURRENT IN HEMT DEVICE (18348421)
Main Inventor
Ming-Cheng Lin
TRANSISTOR STRUCTURE HAVING IMPROVED ELECTRODE CONDUCTANCE AND METHOD FOR MANUFACTURING THE SAME (17737504)
Main Inventor
Ming-Yen CHUANG
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME (18352230)
Main Inventor
Chao-Ching Cheng
DOUBLE-SIDED STACKED DTC STRUCTURE (18353246)
Main Inventor
Ming Chyi Liu
CALIBRATION SYSTEM OF CANCELING EFFECT OF PHASE NOISE AND ANALOG-TO-DIGITAL CONVERTING DEVICE COMPRISING THE SAME (18052204)
Main Inventor
Ting-Hao WANG
PHOTOSENSING PIXEL INCLUDING SELF-ALIGNED LIGHT SHIELDING LAYER (17739387)
Main Inventor
Yueh-Chuan LEE
APPARATUS AND METHOD FOR GENERATING EXTREME ULTRAVIOLET RADIATION (18224005)
Main Inventor
Wei-Chih LAI
SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD OF MANUFACTURING THE SAME (18352267)
Main Inventor
Jian-Ting Chen
VARYING THE PO SPACE IN SEMICONDUCTOR LAYOUTS (17661795)
Main Inventor
Feng-Ming Chang
METHOD AND STRUCTURE FOR REDUCE OTP CELL AREA AND LEAKAGE (18353351)
Main Inventor
Meng-Sheng Chang
ETCH METHOD FOR OPENING A SOURCE LINE IN FLASH MEMORY (18353308)
Main Inventor
Yong-Sheng Huang
STRAP-CELL ARCHITECTURE FOR EMBEDDED MEMORY (18354881)
Main Inventor
Wen-Tuo Huang
MEMORY DEVICE AND METHOD FOR FORMING THE SAME (17739871)
Main Inventor
Kuan-Ting CHEN
3D FERROELECTRIC MEMORY (18353954)
Main Inventor
Sheng-Chih Lai
MEMORY DEVICE AND MANUFACTURING METHOD THEREOF (18354667)
Main Inventor
Meng-Han Lin
METHOD OF FORMING FERROELECTRIC MEMORY DEVICE (17740331)
Main Inventor
Rainer Yen-Chieh Huang
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THEREOF (18353972)
Main Inventor
Yu-Wei Jiang
INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME (18354768)
Main Inventor
Tzu-Yu CHEN
BOTTOM-ELECTRODE INTERFACE STRUCTURE FOR MEMORY (18353988)
Main Inventor
Tzu-Yu Lin
MEMORY CELL WITH UNIPOLAR SELECTORS (18353290)
Main Inventor
Katherine H. Chiang
BIPOLAR SELECTOR WITH INDEPENDENTLY TUNABLE THRESHOLD VOLTAGES (18356585)
Main Inventor
Sheng-Chih Lai
METHOD FOR FORMING A HARD MASK WITH A TAPERED PROFILE (18353254)
Main Inventor
Min-Yung Ko
MEMORY DEVICE (18355385)
Main Inventor
Yen-Lin Huang
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME (18356168)
Main Inventor
Georgios Vellianitis
MEMORY STACKS AND METHODS OF FORMING THE SAME (18356180)
Main Inventor
Tung-Ying Lee
