US Patent Application 18224209. INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME simplified abstract

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INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Wei-Hao Liao of Taichung (TW)

Hsi-Wen Tien of Hsinchu (TW)

Yu-Teng Dai of New Taipei (TW)

Chih Wei Lu of Hsinchu (TW)

Hsin-Chieh Yao of Hsinchu (TW)

Chung-Ju Lee of Hsinchu (TW)

INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18224209 titled 'INTERCONNECTION STRUCTURE AND METHODS OF FORMING THE SAME

Simplified Explanation

The patent application describes an interconnect structure used in electronic devices.

  • The structure includes a dielectric layer, three conductive features, and a dielectric fill.
  • The first conductive feature is located within the dielectric layer.
  • The second conductive feature is positioned above the first conductive feature and consists of three layers of conductive material.
  • The third conductive feature is located above the dielectric layer.
  • The dielectric fill is placed between the second and third conductive features.
  • The conductive layers in the second feature have the same width.
  • This interconnect structure improves the efficiency and performance of electronic devices.


Original Abstract Submitted

An interconnect structure includes a dielectric layer, a first conductive feature, a second conductive feature, a third conductive feature, and a dielectric fill. The first conductive feature is disposed in the dielectric layer. The second conductive feature is disposed over the first conductive feature. The second conductive feature includes a first conductive layer disposed over the first conductive feature, a second conductive layer disposed on the first conductive layer, and a third conductive layer disposed on the second conductive layer. The first conductive layer, the second conductive layer and the third conductive layer have substantially the same width. The third conductive feature is disposed over the dielectric layer. The dielectric fill is disposed over the dielectric layer between the second conductive feature and the third conductive feature.

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