US Patent Application 17736971. IN-MEMORY COMPUTING CIRCUIT AND FABRICATION METHOD THEREOF simplified abstract
Contents
IN-MEMORY COMPUTING CIRCUIT AND FABRICATION METHOD THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Hidehiro Fujiwara of Hsin-Chu (TW)
Wei-Chang Zhao of Hsinchu (TW)
IN-MEMORY COMPUTING CIRCUIT AND FABRICATION METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 17736971 titled 'IN-MEMORY COMPUTING CIRCUIT AND FABRICATION METHOD THEREOF
Simplified Explanation
The patent application describes an in-memory computing circuit that includes a core die, conductive pillars, and memory dies.
- The circuit is designed to perform computing operations using memory dies that are connected to the core die through conductive pillars.
- The memory dies are capable of implementing computing operations.
- At least one of the memory dies is located on the bottommost memory die.
- The core die sends input data to the memory dies through a common input terminal.
Original Abstract Submitted
An in-memory computing circuit is provided. The in-memory computing circuit includes a core die, a plurality of conductive pillars, and a plurality of memory dies. The plurality of memory dies are coupled to the core die through the plurality of conductive pillars and are configured to implement computing operation. The plurality of memory dies includes at least one of the memory dies disposed on a bottommost memory die of the plurality of memory dies. The plurality of memory dies receives an input data from the core die through a common input terminal of the core die.
