US Patent Application 17848701. SOURCE/DRAIN LEAKAGE PREVENTION simplified abstract

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SOURCE/DRAIN LEAKAGE PREVENTION

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Che-Lun Chang of Hsinchu (TW)

Wei-Yang Lee of Taipei City (TW)

Chia-Pin Lin of Hsinchu County (TW)

SOURCE/DRAIN LEAKAGE PREVENTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 17848701 titled 'SOURCE/DRAIN LEAKAGE PREVENTION

Simplified Explanation

The patent application describes a method for forming multi-gate transistor structures. Here are the key points:

  • The method involves creating a fin-shaped structure on a substrate, consisting of channel layers separated by sacrificial layers.
  • The fin-shaped structure is recessed to create a source/drain recess.
  • The sidewalls of the sacrificial layers are further recessed to form inner spacer recesses.
  • A dielectric layer is deposited over the substrate and inner spacer recesses, followed by a polymer layer.
  • The polymer and dielectric layers are etched back to form inner spacer features in the recesses and an inner spacer layer on the substrate.
  • Multiple epitaxial layers are then deposited from the sidewalls of the channel layers to create a source/drain feature in the recess.
  • The source/drain feature and inner spacer layer together define a gap.

Overall, this method allows for the formation of multi-gate transistor structures with improved performance and efficiency.


Original Abstract Submitted

Multi-gate transistor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a fin-shaped structure over a substrate and including channel layers interleaved by sacrificial layers, recessing the fin-shaped structure to form a source/drain recess, recessing the sidewalls of the sacrificial layers to form inner spacer recesses, depositing a dielectric layer over the substrate and the inner spacer recesses, depositing a polymer layer over the dielectric layer, etching back the polymer layer and the dielectric layer to form inner spacer features in the inner spacer recesses and an inner spacer layer over the portion of the substrate, and epitaxially depositing more than one epitaxial layer from the sidewalls of the plurality of channel layers to form a source/drain feature in the source/drain recess. The source/drain feature and the inner spacer layer define a gap.

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