US Patent Application 17739078. SEMICONDUCTOR DEVICE HAVING NANOSTRUCTURE TRANSISTOR AND METHODS OF FABRICATION THEREOF simplified abstract
SEMICONDUCTOR DEVICE HAVING NANOSTRUCTURE TRANSISTOR AND METHODS OF FABRICATION THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Zhen-Cheng Wu of Taichung (TW)
SEMICONDUCTOR DEVICE HAVING NANOSTRUCTURE TRANSISTOR AND METHODS OF FABRICATION THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 17739078 titled 'SEMICONDUCTOR DEVICE HAVING NANOSTRUCTURE TRANSISTOR AND METHODS OF FABRICATION THEREOF
Simplified Explanation
- The patent application describes a method for forming a semiconductor device structure. - The method involves creating a fin structure by stacking alternating layers of first and second semiconductors. - Edge portions of the second semiconductor layers are removed to create cavities between the first semiconductor layers. - A passivation layer is selectively formed on the sidewalls of the first semiconductor layers. - A dielectric spacer is formed on the sidewalls of the second semiconductor layers and fills in the cavities, exposing the passivation layer. - The passivation layer is then removed. - An epitaxial source/drain feature is formed, making contact with both the first semiconductor layers and the dielectric spacers.
Original Abstract Submitted
Embodiments of the present disclosure provide a method for forming a semiconductor device structure. In one embodiment, the method includes forming a fin structure having first semiconductor layers and second semiconductor layers alternatingly stacked, removing edge portions of the second semiconductor layers to form cavities between adjacent first semiconductor layers, selectively forming a passivation layer on sidewalls of the first semiconductor layers, forming a dielectric spacer on sidewalls of the second semiconductor layers and filling in the cavities, wherein the passivation layer is exposed. The method also includes removing the passivation layer, and forming an epitaxial source/drain feature so that the epitaxial source/drain feature is in contact with the first semiconductor layers and the dielectric spacers.
