US Patent Application 18347928. INTEGRATED CIRCUIT DESIGN METHOD AND SYSTEM simplified abstract

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INTEGRATED CIRCUIT DESIGN METHOD AND SYSTEM

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.


Inventor(s)

Tien-Chien Huang of Hsinchu (TW)

INTEGRATED CIRCUIT DESIGN METHOD AND SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 18347928 titled 'INTEGRATED CIRCUIT DESIGN METHOD AND SYSTEM

Simplified Explanation

The patent application describes a system for generating layout diagrams of integrated circuit (IC) devices.

  • The system includes a processor and computer code stored in a storage medium.
  • The processor uses the computer code to perform various tasks.
  • The processor first extracts a netlist, which is a representation of the IC layout diagram focusing on capacitance.
  • It then obtains a simulation result based on the extracted netlist.
  • The netlist is revised by removing a dummy gate region.
  • Another simulation result is obtained based on the revised netlist.
  • The first simulation result is compared to the second simulation result.
  • The purpose of the comparison is to determine the impact of leakage on the design of the IC device.


Original Abstract Submitted

An integrated circuit (IC) layout diagram generation system includes a processor and a non-transitory, computer readable storage medium including computer code for one or more programs. The non-transitory, computer readable storage medium and the computer program code are configured to, with the processor, cause the processor to generate a layout diagram of an IC device by performing a capacitance-only netlist extraction on an IC layout diagram, obtaining a first simulation result based on the extracted netlist, revising the extracted netlist by removing the dummy gate region, obtaining a second simulation result based on the revised netlist, and comparing the first simulation result to the second simulation result to determine a leakage-based design impact.