US Patent Application 18352640. ETCH PROFILE CONTROL OF VIA OPENING simplified abstract
Contents
ETCH PROFILE CONTROL OF VIA OPENING
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Te-Chih Hsiung of Taipei City (TW)
Yi-Chun Chang of Hsinchu City (TW)
Yi-Chen Wang of Hsinchu County (TW)
Yuan-Tien Tu of Chiayi County (TW)
Huan-Just Lin of Hsinchu City (TW)
Jyun-De Wu of New Taipei City (TW)
ETCH PROFILE CONTROL OF VIA OPENING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18352640 titled 'ETCH PROFILE CONTROL OF VIA OPENING
Simplified Explanation
The patent application describes a device that includes a transistor with a source/drain contact, an etch stop layer, an interlayer dielectric (ILD) layer, and a source/drain via.
- The device has a source/drain contact that is located over a source/drain region of a transistor.
- An etch stop layer is positioned above the source/drain contact.
- An interlayer dielectric (ILD) layer is placed above the etch stop layer.
- A source/drain via extends through the ILD layer and the etch stop layer to connect with the source/drain contact.
- The etch stop layer has an oxidized region that is in contact with the source/drain via.
- The oxidized region is separated from the source/drain contact.
Original Abstract Submitted
A device comprises a source/drain contact over a source/drain region of a transistor, an etch stop layer above the source/drain contact, an interlayer dielectric (ILD) layer above the etch stop layer, and a source/drain via extending through the ILD layer and the etch stop layer to the source/drain contact. The etch stop layer has an oxidized region in contact with the source/drain via and separated from the source/drain contact.
