US Patent Application 18342877. IMAGE SENSOR WITH SHALLOW TRENCH EDGE DOPING simplified abstract
Contents
IMAGE SENSOR WITH SHALLOW TRENCH EDGE DOPING
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Yueh-Chuan Lee of Hsinchu City (TW)
Chia-Chan Chen of Zhubei City (TW)
IMAGE SENSOR WITH SHALLOW TRENCH EDGE DOPING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18342877 titled 'IMAGE SENSOR WITH SHALLOW TRENCH EDGE DOPING
Simplified Explanation
The present disclosure is about an integrated chip that has a gate structure on a substrate.
- Integrated chip with gate structure on a substrate
The substrate contains a doped region.
- Substrate with doped region
One or more dielectric materials are present within a recess formed by the substrate's surfaces.
- Dielectric materials within a recess formed by the substrate
The doped region is located laterally between the gate structure and the recess.
- Doped region between gate structure and recess
Within the recess, there is a doped epitaxial material that is asymmetric about a vertical line passing through its lateral center.
- Asymmetric doped epitaxial material within the recess
Original Abstract Submitted
The present disclosure relates to an integrated chip. The integrated chip includes a gate structure on a substrate. A doped region is within the substrate. One or more dielectric materials are within a recess formed by one or more surfaces of the substrate. The doped region is laterally between the gate structure and the recess. A doped epitaxial material is within the recess and between the one or more dielectric materials and the doped region. The doped epitaxial material is asymmetric about a vertical line that extends through a lateral center of the doped epitaxial material.
