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| | + | '''Summary of the patent applications from Samsung Electronics Co., Ltd. on October 12th, 2023''' |
| | + | |
| | + | * Samsung Electronics Co., Ltd. has recently filed patents for various semiconductor devices and materials. |
| | + | * One patent describes a semiconductor device with two substrate structures, including bonding layers and a channel structure with a semiconductor layer. |
| | + | * Another patent focuses on a chalcogenide material with specific composition ranges for elements like germanium, arsenic, sulfur, selenium, and a group III metal. |
| | + | * A patent discusses an electronic device with two separate regions, each containing a different device, and ferroelectric domain layers with different polarization change characteristics. |
| | + | * Another patent describes a semiconductor device with multiple stacked layers, including electrode layers and insulating layers. |
| | + | * A patent focuses on a nonvolatile memory device with a cell array region, gate electrodes, and convex portions on the second gate electrodes. |
| | + | * Another patent discusses a vertical semiconductor device with insulation patterns, gate structures, and a channel structure with a cylindrical shape. |
| | + | * A patent describes a semiconductor device with stacked gate electrodes, insulating layers, channel structures, and conductive patterns with connection portions. |
| | + | * Another patent focuses on a semiconductor device with source structures, stack structures, dummy structures, separation regions, channel structures, and source contact structures. |
| | + | * A patent discusses a semiconductor device with a peripheral circuit structure and a memory cell structure, including circuit devices, wiring structures, gate electrodes, and diffusion barrier layers. |
| | + | |
| | + | Notable applications: |
| | + | * Semiconductor devices with improved substrate structures and bonding layers. |
| | + | * Chalcogenide materials with specific composition ranges for enhanced performance. |
| | + | * Electronic devices with ferroelectric domain layers exhibiting different polarization change characteristics. |
| | + | * Semiconductor devices with multiple stacked layers and electrode thickness variations. |
| | + | * Nonvolatile memory devices with convex portions on gate electrodes for improved performance. |
| | + | * Vertical semiconductor devices with insulation patterns and cylindrical channel structures. |
| | + | * Semiconductor devices with stacked gate electrodes and conductive patterns for efficient connections. |
| | + | * Semiconductor devices with source structures, stack structures, and dummy structures for improved functionality. |
| | + | * Semiconductor devices with peripheral circuit structures and memory cell structures for integrated functionality. |
| | + | |
| | + | |
| | + | |
| | + | |
| | ==Patent applications for Samsung Electronics Co., Ltd. on October 12th, 2023== | | ==Patent applications for Samsung Electronics Co., Ltd. on October 12th, 2023== |
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| − | ===SHOE CARE APPARATUS (18327452)=== | + | ===SHOE CARE APPARATUS ([[US Patent Application 18327452. SHOE CARE APPARATUS simplified abstract|18327452]])=== |
| | + | |
| | + | |
| | + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Daegeon KIM | | Daegeon KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a shoe care apparatus that includes a cabinet with a care chamber inside. The apparatus also has a machine room that supplies air to the care chamber through an inlet and discharges air through an outlet, allowing air to circulate through the care chamber and machine room. A recovery chamber is designed to guide air from the care chamber to the inlet of the machine room. Inside the recovery chamber, there is a fragrance emitter holder that can hold a fragrance emitter. This fragrance emitter adds fragrance to the air from the care chamber as it passes through the recovery chamber. The scented air is then supplied back to the care chamber through the flow path.
| |
| | | | |
| − | '''Abstract'''
| + | ===SHOE CARE APPARATUS ([[US Patent Application 18207353. SHOE CARE APPARATUS simplified abstract|18207353]])=== |
| − | A shoe care apparatus may include a cabinet; a care chamber inside the cabinet; a machine room to supply air to the care chamber and including an inlet through which air is introducible and an outlet through which air is dischargeable, so as to allow air to circulate the care chamber and the machine room through a flow path. A recovery chamber may be configured to allow air from the care chamber to be guided to the inlet of the machine room and be introduced into the machine room. A fragrance emitter holder in the recover chamber may accommodate a fragrance emitter configured to add fragrance to the air from the care chamber that is guided through the recovery chamber, so that the air to which the fragrance is added by the fragrance emitter is supplied to the care chamber through the flow path.
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| | | | |
| − | ===SHOE CARE APPARATUS (18207353)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Dongpil SEO | | Dongpil SEO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a shoe care apparatus that includes a cabinet with a shoe care compartment inside. The cabinet has a door that opens and closes the compartment. There is a supply duct on one wall of the cabinet that supplies air to the compartment. A shoe support device protrudes from the inner surface of the wall and receives the air from the supply duct, allowing shoes to be placed in the compartment. Additionally, there is a sterilizer installed on either the second wall of the cabinet or the door. The sterilizer includes an ultraviolet (UV) lamp that sterilizes shoes placed in the compartment.
| |
| | | | |
| − | '''Abstract'''
| + | ===WATER DISCHARGE UNIT AND WATER PURIFIER INCLUDING SAME ([[US Patent Application 18208972. WATER DISCHARGE UNIT AND WATER PURIFIER INCLUDING SAME simplified abstract|18208972]])=== |
| − | A shoe care apparatus including a cabinet, a shoe care compartment inside the cabinet, a door coupled to the cabinet and configured to open and close the shoe care compartment, a supply duct formed on a first wall of the cabinet to supply air to the shoe care compartment, a shoe support device configured to communicate with the supply duct to receive the air from the supply duct and protruding from an inner surface of the first wall of the cabinet so that shoes are placeable in the shoe care compartment, and a sterilizer installed on a second wall of the cabinet or on the door and including an ultraviolet (UV) lamp to sterilize shoes placed in the shoe care compartment.
| |
| | | | |
| − | ===WATER DISCHARGE UNIT AND WATER PURIFIER INCLUDING SAME (18208972)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Wanku KANG | | Wanku KANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a water purifier that has a water discharge unit capable of dispensing purified, cold, and hot water. The water discharge unit includes a rotating body and a water discharge tube that can change its position based on the rotation of the body. The purifier also has a display device with two light sources, a light guide cover, and a guide case. These components work together to guide and separate the light emitted from the two light sources. The light guide cover projects the light from the first light source towards the water discharge tube, indicating the direction of water flow. The light from the second light source is projected onto the outer surface of the display device to indicate which type of water (purified, cold, or hot) has been selected.
| |
| | | | |
| − | '''Abstract'''
| + | ===WATER PURIFIER AND CONTROL METHOD OF SAME ([[US Patent Application 18206172. WATER PURIFIER AND CONTROL METHOD OF SAME simplified abstract|18206172]])=== |
| − | A water purifier including a water discharge unit configured so that purified, cold, and hot water are selectably dischargeable therethrough, the water discharge unit including a rotatable body, a water discharge tube having a changeable position according to rotation of the body, and a display device including a first and a second light source, a light guide cover, and a guide case to guide light emitted from the first and second light source so as to be incident on the light guide cover, and to prevent mixing of the light from the first and the second light sources. The light guide cover projects the light from the first light source in a direction of water discharge from the water discharge tube, and projects the light from the second light source toward an outer peripheral surface of the display device to indicate which of purified, cold, and hot water is selected.
| + | |
| | | | |
| − | ===WATER PURIFIER AND CONTROL METHOD OF SAME (18206172)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Jungha PARK | | Jungha PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a water purifier system that includes multiple filters and an electrolysis module. The system has a pre-treatment filter connected to an inlet flow path, an auxiliary filter connected to a first connection flow path, a membrane filter connected to a second connection flow path, and a post-treatment filter connected to a third connection flow path. There is also a branch flow path that splits off from the first connection flow path and merges back in downstream. An electrolysis module can be placed along the branch flow path. Additionally, there is an opening/closing valve that allows water to flow either to the first connection flow path or the branch flow path.
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| | | | |
| − | '''Abstract'''
| + | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND DIAGNOSTIC COMPOSITION INCLUDING ORGANOMETALLIC COMPOUND ([[US Patent Application 18210212. ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND DIAGNOSTIC COMPOSITION INCLUDING ORGANOMETALLIC COMPOUND simplified abstract|18210212]])=== |
| − | A water purifier comprising a pre-treatment filter connectable to an inlet flow path; an auxiliary filter including a filter cap and a filter body, connectable to a first connection flow path; a membrane filter including a filter cap and a filter body, so that water discharged from the auxiliary filter is introduced through a second connection flow path; a post-treatment filter including a filter cap and a filter body, so that water discharged from the membrane filter is introduced through a third connection flow path; a branch flow path that branches off from an upstream side of the first connection flow path and merges on a downstream side of the first connection flow path; an electrolysis module arrangeable along the branch flow path; and an opening/closing valve arrangeable along the first connection flow path so that water flows to the first connection flow path or the branch flow path.
| + | |
| | | | |
| − | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND DIAGNOSTIC COMPOSITION INCLUDING ORGANOMETALLIC COMPOUND (18210212)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Yongsuk CHO | | Yongsuk CHO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an organometallic compound, represented by Formula 1, which is used in various applications. One application is in an organic light-emitting device, where the compound is utilized. Another application is in a diagnostic composition, where the compound is included. The abstract does not provide any further details or claims about the compound or its performance.
| |
| | | | |
| − | '''Abstract'''
| + | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND ELECTRONIC APPARATUS INCLUDING ORGANIC LIGHT-EMITTING DEVICE ([[US Patent Application 18298802. ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND ELECTRONIC APPARATUS INCLUDING ORGANIC LIGHT-EMITTING DEVICE simplified abstract|18298802]])=== |
| − | An organometallic compound represented by Formula 1, an organic light-emitting device including the organometallic compound, and a diagnostic composition including the organometallic compound:
| |
| | | | |
| − | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING ORGANOMETALLIC COMPOUND, AND ELECTRONIC APPARATUS INCLUDING ORGANIC LIGHT-EMITTING DEVICE (18298802)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Bumwoo Park | | Bumwoo Park |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an organometallic compound, which is represented by a specific chemical formula (referred to as Formula 1). The abstract does not provide any additional details about the compound or its properties.
| |
| | | | |
| − | '''Abstract'''
| + | ===QUANTUM DOTS AND DEVICE INCLUDING THE SAME ([[US Patent Application 18209563. QUANTUM DOTS AND DEVICE INCLUDING THE SAME simplified abstract|18209563]])=== |
| − | An organometallic compound represented by Formula 1:
| + | |
| | | | |
| − | ===QUANTUM DOTS AND DEVICE INCLUDING THE SAME (18209563)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Seon-Yeong KIM | | Seon-Yeong KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a cadmium-free quantum dot, which is a tiny particle made of a specific combination of semiconductor materials. The quantum dot has a core made of a certain type of compound and a shell or coating made of another type of compound. This quantum dot has a high quantum efficiency, which means it can efficiently emit light or absorb light with minimal energy loss. The abstract does not provide any additional information or details about the specific applications or uses of this cadmium-free quantum dot.
| |
| | | | |
| − | '''Abstract'''
| + | ===WASHING MACHINE FOR CONTROLLING DRYER, AND DRYER CONTROLLING METHOD PERFORMED BY WASHING MACHINE ([[US Patent Application 18108197. WASHING MACHINE FOR CONTROLLING DRYER, AND DRYER CONTROLLING METHOD PERFORMED BY WASHING MACHINE simplified abstract|18108197]])=== |
| − | A cadmium free quantum dot or a population thereof or a device including the same, wherein the cadmium free quantum dot includes a core (or a semiconductor nanocrystal particle) including a first semiconductor including a Group IIB-VI compound and a shell (or a coating) disposed on the core (or the semiconductor nanocrystal particle) including a Group IIB-V compound and exhibits a quantum efficiency of about 60% or higher.
| + | |
| | | | |
| − | ===WASHING MACHINE FOR CONTROLLING DRYER, AND DRYER CONTROLLING METHOD PERFORMED BY WASHING MACHINE (18108197)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Hyojeong LEE | | Hyojeong LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a washing machine that has a wireless communication interface with a dryer. The washing machine has a user interface that allows the user to control the dryer and receive information about it. The machine has a processor that can determine if the front surface of the dryer is facing the same direction as the washing machine. If they are facing the same direction, the processor can receive the user's control input for the dryer through the user interface and send the corresponding control command to the dryer through the communication interface.
| |
| | | | |
| − | '''Abstract'''
| + | ===WASHING MACHINE AND CONTROLLING METHOD FOR SAME ([[US Patent Application 18189953. WASHING MACHINE AND CONTROLLING METHOD FOR SAME simplified abstract|18189953]])=== |
| − | A washing machine includes a communication interface for wireless communication with a dryer; a user interface configured to receive a user’s control input related to the dryer, and to output information related to the dryer; and at least one processor configured to determine whether a front surface of the dryer faces in a same direction as a front surface of the washing machine, and when it is determined that the front surface of the dryer faces in the same direction as the front surface of the washing machine, receive the user’s control input related to the dryer through the user interface and transmit, to the dryer, a control command corresponding to the user’s control input related to the dryer through the communication interface.
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| | | | |
| − | ===WASHING MACHINE AND CONTROLLING METHOD FOR SAME (18189953)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jungchul CHOI | | Jungchul CHOI |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a washing machine that includes a body with a laundry input port, a water tank for storing water, a rotatable drum inside the water tank, a pulsator inside the drum that rotates in the opposite direction of the drum, a first motor that drives the pulsator, a second motor that drives the drum, a first inverter that controls the current to the first motor, a second inverter that controls the current to the second motor and also has a temperature sensing function, and a control unit that reduces the rotational speed or rotation time of the first motor if the temperature of the second inverter reaches a certain threshold.
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| | | | |
| − | '''Abstract'''
| + | ===WASHING MACHINE ([[US Patent Application 18209591. WASHING MACHINE simplified abstract|18209591]])=== |
| − | A washing machine according to one aspect of the disclosure comprises: a body having a laundry input port; a water tank provided inside the body and for storing water; a drum rotatably provided inside the water tank; a pulsator provided inside the drum and rotating in the direction opposite from the rotational direction of the drum; a first motor providing a driving force to the pulsator; a second motor providing a driving force to the drum; a first inverter controlling a current applied to the first motor; a second inverter controlling a current applied to the second motor and having a temperature sensing function; and a control unit controlling the first inverter such that the rotational speed of the first motor and/or the rotation time per period of the first motor is reduced if the temperature of the second inverter reaches a predetermined first temperature.
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| | | | |
| − | ===WASHING MACHINE (18209591)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hyun Dong JUNG | | Hyun Dong JUNG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a washing machine that has two separate tubs for washing clothes. The first tub is covered by a housing, and the second tub is covered by another housing that is arranged above the first housing. The machine also includes two detergent suppliers. The first detergent supplier supplies detergent to the first tub, while the second detergent supplier supplies detergent to the second tub using a siphonage system when water is being supplied for laundry. The second detergent supplier has a valve device in the detergent supply path to prevent the laundry water from flowing backwards due to buoyancy.
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| | | | |
| − | '''Abstract'''
| + | ===OVEN ([[US Patent Application 18203779. OVEN simplified abstract|18203779]])=== |
| − | A washing machine is disclosed. The washing machine include a first housing, a second housing arranged above the first housing, a first tub covered by the first housing, a second tub covered by the second housing, and a first detergent supplier arranged to supply a detergent to the first tub, a second detergent supplier having a first supply assembly arranged to supply a detergent to the second tub by siphonage when water for laundry is being supplied, wherein the first supply assembly comprises a first valve device arranged in a detergent supply path, in which a detergent is moved to the second tub, for preventing water for laundry from flowing backwards by buoyancy.
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| | | | |
| − | ===OVEN (18203779)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hyoseon KWAK | | Hyoseon KWAK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an oven with a cooking chamber and a heat source. It also includes a drawer device located underneath the oven, which has holes on its upper surface. A plate covers these holes, creating a gap between the plate and the surface. This gap allows air inside the drawer to flow through the holes and supply the heat source with air.
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| | | | |
| − | '''Abstract'''
| + | ===REFRIGERATOR ([[US Patent Application 18209984. REFRIGERATOR simplified abstract|18209984]])=== |
| − | An oven according to the present invention includes: a body having a cooking chamber provided in the body; a heat source in the cooking chamber to heat the cooking chamber; and a drawer device under the body, and including: a drawer case having one or more holes in the upper surface of the drawer case; and a plate covering the one or more holes and forming a gap between the plate and the upper surface, wherein the gap is configured to allow a flow path through the gap for air in the drawer case to be supplied to the heat source through the one or more holes.
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| | | | |
| − | ===REFRIGERATOR (18209984)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Youngmin YOU | | Youngmin YOU |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a refrigerator that has a storage compartment and a cold air outlet. The refrigerator also includes a purifier assembly located at the top of the storage compartment. The purifier assembly consists of an air purifier that removes odors or sterilizes the cold air. The assembly is housed in a structure that has an inlet facing the cold air outlet, allowing it to receive the cold air. The purifier assembly is designed to penetrate the inner case of the refrigerator, with part of the housing inside the storage compartment and the rest outside.
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| | | | |
| − | '''Abstract'''
| + | ===REFRIGERATOR AND METHOD OF CONTROLLING THE SAME ([[US Patent Application 18209602. REFRIGERATOR AND METHOD OF CONTROLLING THE SAME simplified abstract|18209602]])=== |
| − | A refrigerator includes: an inner case defining a storage compartment; a cold air outlet provided on one side of the storage compartment and configured to discharge cold air; and a purifier assembly provided at an upper surface of the storage compartment and configured to purify a portion of the cold air discharged from the cold air outlet, wherein the purifier assembly includes: an air purifier configured to deodorize or sterilize the cold air; and a housing including the air purifier and an inlet facing the cold air outlet, wherein the inlet is configured to receive the cold air discharged from the cold air outlet, the purifier assembly penetrates the inner case, and a portion of the housing is provided inside the storage compartment and a remaining portion of the housing is provided outside the storage compartment.
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| | | | |
| − | ===REFRIGERATOR AND METHOD OF CONTROLLING THE SAME (18209602)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Daewhan KIM | | Daewhan KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a refrigerator and a method of controlling it. The refrigerator has a main body with a storage compartment and a door to open and close the compartment. It also includes a beverage provider, which can be placed on the main body or the door. The beverage provider has a water supplying unit, a storage to store the supplied water, a filter inside the storage that can hold beverage powder, and a sensor to measure the concentration of the beverage produced by mixing the powder with water. The refrigerator also has a processor that can determine the concentration of the beverage based on the sensor readings and adjust the amount of water supplied by the water supplying unit accordingly.
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| | | | |
| − | '''Abstract'''
| + | ===APPARATUS AND METHOD FOR ESTIMATING BODY WATER STATUS ([[US Patent Application 17877277. APPARATUS AND METHOD FOR ESTIMATING BODY WATER STATUS simplified abstract|17877277]])=== |
| − | A refrigerator and a method of controlling the same, the refrigerator including: a main body including a storage compartment; a door to open and close the storage compartment; and a beverage provider arrangeable with respect to the main body or the door. The beverage provider including: a water supplying unit; a storage to store water supplied by the water supplying unit; a filter, arrangeable inside the storage, and accommodate beverage powder so that ingredients from the beverage powder accommodated in filter are leached into the water; a sensor to obtain information related to a concentration of a beverage produced to contain the ingredients of the beverage powder in the water; and a processor configured to identify the concentration of the beverage based on the obtained information, and control the water supplying unit to supply the water in an amount which is adjusted based on the identified concentration.
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| | | | |
| − | ===APPARATUS AND METHOD FOR ESTIMATING BODY WATER STATUS (17877277)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | JUNE YOUNG LEE | | JUNE YOUNG LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an apparatus that can estimate the body water status of an object. The apparatus includes a spectrometer with a light source and a detector. The light source emits light onto the object, and the detector measures the near-infrared absorption spectrum by detecting the light scattered or reflected from the object. The apparatus also includes a processor that uses the measured absorption spectrum to estimate the albumin concentration in the object. Based on this estimated albumin concentration, the processor then estimates a body water index using a model that represents the relationship between changes in albumin concentration and changes in the amount of body water in the object.
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| | | | |
| − | '''Abstract'''
| + | ===MULTI-DEVICE BISTATIC SENSING ([[US Patent Application 18160920. MULTI-DEVICE BISTATIC SENSING simplified abstract|18160920]])=== |
| − | An apparatus for estimating body water status includes a spectrometer having a light source configured to emit light onto an object, and a detector configured to measure a near-infrared (NIR) absorption spectrum by detecting light scattered or reflected from the object; and a processor configured to estimate an albumin concentration in the object based on the measured NIR absorption spectrum, and to estimate a body water index based on the estimated albumin concentration by using a body water index estimation model that represents a relationship between a change in the albumin concentration and a change in an amount of body water present in the object.
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| | | | |
| − | ===MULTI-DEVICE BISTATIC SENSING (18160920)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jeongho Jeon | | Jeongho Jeon |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for combining cellular communication and object sensing in a mobile device. The mobile device, also known as a UE (User Equipment), can be configured to either receive a sensing signal from a base station or transmit the sensing signal for the base station to receive. The configuration includes information about the power, waveform, and resources needed for the sensing signal, as well as how often it should be transmitted. Additionally, the configuration can specify whether the UE should receive or transmit an object detection report.
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| | | | |
| − | '''Abstract'''
| + | ===IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR ([[US Patent Application 18208566. IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR simplified abstract|18208566]])=== |
| − | Joint configuration of cellular communication and bistatic object sensing involves transmitting, to a UE, a bistatic object sensing configuration. The bistatic object sensing configuration configures the UE to one of receive a sensing signal transmitted by a base station or transmit the sensing signal for reception by the base station. The bistatic object sensing configuration indicates sensing transmission power, waveform, and sensing resources and periodicity for the sensing signal, and may configure the UE to one of receive or transmit an object detection report.
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| | | | |
| − | ===IMAGE SENSOR INCLUDING COLOR SEPARATING LENS ARRAY AND ELECTRONIC APPARATUS INCLUDING THE IMAGE SENSOR (18208566)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | SEOKHO YUN | | SEOKHO YUN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that has a color separating lens array. The image sensor has a sensor substrate with two pixels, one for sensing light of a certain wavelength and the other for sensing light of a different wavelength. The color separating lens array has a region that condenses the first wavelength light onto the first pixel. The area of this condensing region is larger than the area of the first pixel, and the distance between the sensor substrate and the lens array is shorter than the focal distance of the condensing region for the first wavelength light.
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| | | | |
| − | '''Abstract'''
| + | ===LIGHT MODULATOR, OPTICAL DEVICE INCLUDING LIGHT MODULATOR, AND ELECTRONIC APPARATUS INCLUDING OPTICAL DEVICE ([[US Patent Application 18334838. LIGHT MODULATOR, OPTICAL DEVICE INCLUDING LIGHT MODULATOR, AND ELECTRONIC APPARATUS INCLUDING OPTICAL DEVICE simplified abstract|18334838]])=== |
| − | Provided is an image sensor including a color separating lens array. The image sensor includes a sensor substrate including a first pixel configured to sense first wavelength light, and a second pixel configured to sense second wavelength light; and a color separating lens array including a first wavelength light condensing region in which the first wavelength light is condensed onto the first pixel, wherein an area of the first wavelength light condensing region is greater than an area of the first pixel, and a distance between the sensor substrate and the color separating lens array is less than a focal distance of the first wavelength light condensing region with respect to the first wavelength light.
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| | | | |
| − | ===LIGHT MODULATOR, OPTICAL DEVICE INCLUDING LIGHT MODULATOR, AND ELECTRONIC APPARATUS INCLUDING OPTICAL DEVICE (18334838)===
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| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Junghyun PARK | | Junghyun PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a light modulator that can change the phase of light by adjusting its refractive index. The modulator consists of a substrate and a resonator. The resonator has a first reflective structure on the substrate, a cavity layer on top of the first reflective structure, and a second reflective structure on the cavity layer. The first and second reflective structures are made up of alternating layers of different materials, while the cavity layer has a different material altogether. Each material layer has a different refractive index. Overall, this light modulator can manipulate the phase of light using an external stimulus.
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| | | | |
| − | '''Abstract'''
| + | ===PHOTOACID GENERATOR, PHOTORESIST COMPOSITION INCLUDING THE SAME, AND METHOD OF PREPARING THE PHOTOACID GENERATOR ([[US Patent Application 18313555. PHOTOACID GENERATOR, PHOTORESIST COMPOSITION INCLUDING THE SAME, AND METHOD OF PREPARING THE PHOTOACID GENERATOR simplified abstract|18313555]])=== |
| − | Provided is a light modulator including a substrate, and a resonator configured to modulate a phase of incident light by modulating a refractive index based on an external stimulus, the resonator comprising a first reflective structure provided on the substrate, a cavity layer provided on the first reflective structure, and a second reflective structure provided on the cavity layer, wherein at least one of the first reflective structure or the second reflective structure comprises first material layers, second material layers that are alternately stacked with the first material layers, and a third material layer, and wherein each of the first material layers has a first refractive index, each of the second material layers has a second refractive index that is different from the first refractive index, and the third material layer has a third refractive index that is different from the first refractive index
| + | |
| | | | |
| − | ===PHOTOACID GENERATOR, PHOTORESIST COMPOSITION INCLUDING THE SAME, AND METHOD OF PREPARING THE PHOTOACID GENERATOR (18313555)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Eunkyung LEE | | Eunkyung LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a photoacid generator, which is a chemical compound used in photoresist compositions. The photoresist composition is a material used in the manufacturing of electronic devices. The abstract also mentions a method of preparing the photoacid generator. The photoacid generator is represented by a specific chemical formula (Formula 1), although the formula itself is not provided in the abstract.
| |
| | | | |
| − | '''Abstract'''
| + | ===MACHINE LEARNING (ML)-BASED PROCESS PROXIMITY CORRECTION (PPC) METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD INCLUDING THE SAME ([[US Patent Application 17990900. MACHINE LEARNING (ML)-BASED PROCESS PROXIMITY CORRECTION (PPC) METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD INCLUDING THE SAME simplified abstract|17990900]])=== |
| − | Disclosed are a photoacid generator, a photoresist composition including the same, and a method of preparing the photoacid generator. The photoacid generator may include a compound represented by Formula 1:
| + | |
| | | | |
| − | ===MACHINE LEARNING (ML)-BASED PROCESS PROXIMITY CORRECTION (PPC) METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD INCLUDING THE SAME (17990900)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Sooyong Lee | | Sooyong Lee |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a machine learning-based method for correcting patterns in the manufacturing of semiconductor devices. The method involves analyzing a layout of the device, extracting features from a specific pattern, and using machine learning to create a prediction model. The model is then used to generate a target layout that maximizes the process margin. The original layout is corrected to match the target, and the prediction model is used to predict the outcome of the manufacturing process based on the corrected layout.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHODS AND SYSTEMS FOR SELECTING VOLTAGE FOR A SUBSTRATE CONNECTION OF A BYPASS SWITCH ([[US Patent Application 17829690. METHODS AND SYSTEMS FOR SELECTING VOLTAGE FOR A SUBSTRATE CONNECTION OF A BYPASS SWITCH simplified abstract|17829690]])=== |
| − | A machine learning (ML)-based process proximity correction (PPC) method includes receiving a first layout of an after clean inspection (ACI) including patterns for manufacturing a semiconductor device, extracting features of a first pattern from the first layout, generating a prediction model through ML based on the features of the first pattern, generating an ACI target having a maximum process margin by comparing an upper limit value and a lower limit value of the ACI for at least one condition, generating a second layout of an after development inspection (ADI) by correcting the first layout to correspond to the ACI target, and predicting the ACI through the prediction model, based on the second layout of the ADI.
| |
| | | | |
| − | ===METHODS AND SYSTEMS FOR SELECTING VOLTAGE FOR A SUBSTRATE CONNECTION OF A BYPASS SWITCH (17829690)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Ankur Ghosh | | Ankur Ghosh |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method and system for selecting the voltage for a substrate connection of a bypass switch in a regulator. This is achieved through a bulk voltage generation circuit that is connected externally to the regulator. The bulk voltage generation circuit has the ability to choose between an Input/Output (I/O) supply voltage and a core supply voltage for the substrate connection of the bypass switch. The selection of the voltage is based on the mode of operation of the regulator and the presence or arrival sequence of the I/O supply voltage and the core supply voltage.
| |
| | | | |
| − | '''Abstract'''
| + | ===FLEXIBLE ELECTRONIC DEVICE AND METHOD FOR CONTROLLING DISPLAY OF APPLICATION EXECUTION SCREEN ([[US Patent Application 18209749. FLEXIBLE ELECTRONIC DEVICE AND METHOD FOR CONTROLLING DISPLAY OF APPLICATION EXECUTION SCREEN simplified abstract|18209749]])=== |
| − | Methods and systems for selecting voltage for a substrate connection of a bypass switch include a bulk voltage generation circuit coupled externally to the regulator. The bulk voltage generation circuit is configured to control selection of a voltage from among an Input/Output (I/O) supply voltage and a core supply voltage for a substrate connection of a bypass switch of the regulator. The bulk voltage generation circuit is configured to select the voltage for the substrate connection of the bypass switch based on a mode of operation of the regulator and at least one of a presence or an arrival sequence of the I/O supply voltage and the core supply voltage.
| |
| | | | |
| − | ===FLEXIBLE ELECTRONIC DEVICE AND METHOD FOR CONTROLLING DISPLAY OF APPLICATION EXECUTION SCREEN (18209749)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Byungwoo MIN | | Byungwoo MIN |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has two housings that can slide with respect to each other. The device also has a display that can change in size based on the sliding distance of the housings. The device has a memory and a processor that can execute instructions stored in the memory. When a user requests a recent task list of applications being used, the device will display the list on the screen. The aspect ratio of the screen will change depending on the size of the viewable area.
| |
| | | | |
| − | '''Abstract'''
| + | ===WEARABLE DEVICE AND METHOD FOR DETECTING MOTION GESTURE OF WEARABLE DEVICE ([[US Patent Application 18333950. WEARABLE DEVICE AND METHOD FOR DETECTING MOTION GESTURE OF WEARABLE DEVICE simplified abstract|18333950]])=== |
| − | According to certain embodiments, an electronic device further comprises: a first housing; a second housing slidably coupled with respect to the first housing; a display in which an viewable area to an outside of the electronic device is changeable from a first size to a second size according to a sliding distance of the second housing with respect to the first housing; a memory storing computer-executable instructions; and a processor configured to access the memory and execute the computer-executable instructions, wherein execution of the computer-executable instructions by the processor causes the processor to perform a plurality of operations, the plurality of operations comprising: in response to receiving a first input requesting a recent task list of at least one application being serviced when the viewable area has the first size, display at least one execution screen image having a first aspect ratio for the first size corresponding to the at least one application; and when the viewable area has the second size, displaying the at least one execution screen image having a second aspect ratio for the second size.
| |
| | | | |
| − | ===WEARABLE DEVICE AND METHOD FOR DETECTING MOTION GESTURE OF WEARABLE DEVICE (18333950)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jinik KIM | | Jinik KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and device that includes a touch sensor, an inertial sensor, a biometric sensor, a communication module, a memory, and a processor. The touch sensor is located on the outside of a housing and has touch interfaces for different areas. The inertial sensor has a set sensor axis. The biometric sensor is located inside the housing. The communication module includes communication circuitry. The memory stores the angle corresponding to the touch detection range for each touch interface. The processor is connected to all the components and performs various functions. It can detect if a wearable device is being worn using the biometric sensor or the inertial sensor. It can receive touch information from the touch interfaces, calibrate the sensor axis of the inertial sensor based on the touch information, obtain sensing information from the inertial sensor, and calculate position information based on the calibrated sensor axis.
| |
| | | | |
| − | '''Abstract'''
| + | ===STORAGE DEVICE REORGANIZING DATA AND RELATED OPERATING METHOD ([[US Patent Application 18107029. STORAGE DEVICE REORGANIZING DATA AND RELATED OPERATING METHOD simplified abstract|18107029]])=== |
| − | Various embodiments of the present disclosure disclose a method and device, the device comprising: a touch sensor disposed adjacent to the outside of a housing and including touch interfaces for a plurality of areas; an inertial sensor having a set sensor axis; a biometric sensor disposed adjacent to the inside of the housing; a communication module comprising communication circuitry; a memory which maps and stores an angle corresponding to a touch detection range of each touch interface of the touch sensor; and a processor operatively connected to the touch sensor, the inertial sensor, the biometric sensor, the communication module, and the memory. The processor is configured to: detect whether a wearable device is worn using the biometric sensor and/or the inertial sensor; receive touch information from at least one of the plurality of touch interfaces included in the touch sensor; calibrate the sensor axis of the inertial sensor based on the touch information; obtain sensing information from the inertial sensor; and calculate position information from the sensing information based on the calibrated sensor axis.
| |
| | | | |
| − | ===STORAGE DEVICE REORGANIZING DATA AND RELATED OPERATING METHOD (18107029)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | SANG OAK WOO | | SANG OAK WOO |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic system that consists of a host, a computing resource device, and a storage device. The host sends a command and source data with a specific structure to the storage device. The storage device stores the source data and also has a data reorganizing unit. This unit converts the source data into a different structure called reorganized source data. The storage device then sends this reorganized source data to the computing resource device as destination data.
| |
| | | | |
| − | '''Abstract'''
| + | ===STORAGE DEVICE AND OPERATING METHOD THEREOF ([[US Patent Application 18086777. STORAGE DEVICE AND OPERATING METHOD THEREOF simplified abstract|18086777]])=== |
| − | An electronic system includes; a host providing a command and source data having a source data structure, a computing resource device operating in relation to destination data having a destination data structure different from the source data structure, and a storage device. The storage device receives the command from the host and includes a storage medium storing the source data, and a data reorganizing unit converting the source data into reorganized source data, wherein the storage device outputs the reorganized source data to the computing resource device as destination data.
| |
| | | | |
| − | ===STORAGE DEVICE AND OPERATING METHOD THEREOF (18086777)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | TAE-HWAN KIM | | TAE-HWAN KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a storage device that uses a nonvolatile memory device and a storage controller to manage data. The storage controller updates metadata based on the operations performed on the nonvolatile memory device. It includes a journal data generator that creates multiple journal data entries related to the metadata updates. These journal data entries are then replayed in parallel by a journal data replayer to restore the metadata.
| |
| | | | |
| − | '''Abstract'''
| + | ===SYSTEMS AND METHODS FOR HYBRID STORAGE ([[US Patent Application 17827298. SYSTEMS AND METHODS FOR HYBRID STORAGE simplified abstract|17827298]])=== |
| − | Disclosed is a storage device which includes a nonvolatile memory device, and a storage controller that controls the nonvolatile memory device and updates metadata based on an operation of the nonvolatile memory device, and the storage controller includes a journal data generator that generates a plurality of journal data associated with the update of the metadata, and a journal data replayer that replays the plurality of journal data in parallel to restore the metadata.
| |
| | | | |
| − | ===SYSTEMS AND METHODS FOR HYBRID STORAGE (17827298)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Shrihari Sridharan | | Shrihari Sridharan |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for storing and processing data. It involves identifying a database in a memory of a host device, and then identifying a partition with a specific size. The rows of the database are then identified based on this partition size. The data stored in these rows is converted into a column-based format and stored in a computational storage device. This computational storage device is designed to retrieve the data in the column-based format and process queries based on the data.
| |
| | | | |
| − | '''Abstract'''
| + | ===OPERATION METHOD OF HOST DEVICE AND OPERATION METHOD OF STORAGE DEVICE ([[US Patent Application 18188882. OPERATION METHOD OF HOST DEVICE AND OPERATION METHOD OF STORAGE DEVICE simplified abstract|18188882]])=== |
| − | Embodiments of the present disclosure are directed to a method for storing and processing data. The method includes identifying a database in a memory of a host device having one or more rows and one or more columns. A partition having a partition size is identified, and the one or more rows of the database is identified based on the partition size. The data stored in the one or more rows is converted into a column-based format, and the data is stored in a computational storage device in the column-based format. The computational storage device is configured to retrieve the data stored in the column-based format, in response to a query, and process the query based on the data.
| |
| | | | |
| − | ===OPERATION METHOD OF HOST DEVICE AND OPERATION METHOD OF STORAGE DEVICE (18188882)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jaehwan JUNG | | Jaehwan JUNG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for a host device to control a storage device. The host device receives initial mapping information from the storage device and performs an initial migration of source data from one region of the storage device to another region based on this information. The host device then receives first dirty information about the first set of dirty data from the storage device and performs a first migration of this data based on the first dirty information. Similarly, the host device receives second dirty information about a second set of dirty data and performs a second migration based on this information. It is noted that the size of the first dirty information is different from the size of the second dirty information.
| |
| | | | |
| − | '''Abstract'''
| + | ===SYSTEM AND METHOD FOR PERFORMING DATA READ-WRITE OPERATIONS IN ZONED STORAGE DEVICES ([[US Patent Application 17835759. SYSTEM AND METHOD FOR PERFORMING DATA READ-WRITE OPERATIONS IN ZONED STORAGE DEVICES simplified abstract|17835759]])=== |
| − | An operation method of a host device configured to control a storage device includes receiving initial mapping information from the storage device, performing initial migration based on the initial mapping information such that source data present in a first region of the storage device migrate to a second region, receiving first dirty information about first dirty data of the source data from the storage device, performing first migration on the first dirty data based on the first dirty information, receiving second dirty information about second dirty data of the source data from the storage device, and performing second migration on the second dirty data based on the second dirty information, and a size of the first dirty information is different from a size of the second dirty information.
| |
| | | | |
| − | ===SYSTEM AND METHOD FOR PERFORMING DATA READ-WRITE OPERATIONS IN ZONED STORAGE DEVICES (17835759)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | RAKESH BALAKRISHNAN | | RAKESH BALAKRISHNAN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for transferring data between different zoned storage devices. It involves reading data from one or more zones on a source storage device and then writing that data sequentially to one or more zones on a destination storage device. The method allows for efficient data transfer across multiple storage devices.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD OF OPERATING STORAGE DEVICE, STORAGE DEVICE PERFORMING THE SAME AND METHOD OF OPERATING STORAGE SYSTEM USING THE SAME ([[US Patent Application 18335328. METHOD OF OPERATING STORAGE DEVICE, STORAGE DEVICE PERFORMING THE SAME AND METHOD OF OPERATING STORAGE SYSTEM USING THE SAME simplified abstract|18335328]])=== |
| − | A method for performing a data read-write operation across multiple zoned storage devices includes reading data from at least one zone of a source zoned storage device and sequentially writing the read data to at least one zone of a destination zoned storage device, where the source zoned storage device is different from the destination zoned storage device.
| |
| | | | |
| − | ===METHOD OF OPERATING STORAGE DEVICE, STORAGE DEVICE PERFORMING THE SAME AND METHOD OF OPERATING STORAGE SYSTEM USING THE SAME (18335328)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | DONG-WOO KIM | | DONG-WOO KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for operating a storage device. The storage device receives a command from a host device to transfer meta information based on a data read request. It also receives a data read command and a set of meta data from the host device. The storage device then performs a data read operation using the data read command and the meta data.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD FOR PRELOADING APPLICATION AND ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18322919. METHOD FOR PRELOADING APPLICATION AND ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18322919]])=== |
| − | A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.
| |
| | | | |
| − | ===METHOD FOR PRELOADING APPLICATION AND ELECTRONIC DEVICE SUPPORTING SAME (18322919)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jinshik BAE | | Jinshik BAE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a flexible display and two movable housings. The display area of the device can be expanded or reduced by moving the second housing. The device includes a memory and a processor. The processor is programmed to identify changes in the display area size based on the movement of the housings. It then determines which application should be preloaded based on the identified size. The processor loads a preload process into the memory, which includes some of the resources needed to execute the determined application. When an event related to the execution of the preloaded application occurs, the processor loads an activity for executing the application using the preloaded process.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE MANAGING MEMORY AND OPERATION METHOD THEREFOR ([[US Patent Application 18333061. ELECTRONIC DEVICE MANAGING MEMORY AND OPERATION METHOD THEREFOR simplified abstract|18333061]])=== |
| − | An electronic device may include: a housing including a first housing and a second housing movable with respect to the first housing; a flexible display in which a display area for displaying a screen is expanded or reduced as the second housing moves with respect to the first housing; a memory; and a processor, wherein the processor is configured to: identify a change in the size of the display area on the basis of the movement of the second housing relative to the first housing; determine an application to be preloaded from among a plurality of applications on the basis of the identified size of the display area; load, into the memory, a preload process including some of resources for executing the determined application to be preloaded; and, in response to the occurrence of an event associated with the execution of the application to be preloaded, load an activity for the execution of the application by using the loaded preload process.
| |
| | | | |
| − | ===ELECTRONIC DEVICE MANAGING MEMORY AND OPERATION METHOD THEREFOR (18333061)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jiman KWON | | Jiman KWON |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that has a memory and a processor. The processor is designed to recognize when a specific condition is met, such as an application using a lot of memory running on the device. It then determines the amount of memory needed to run the application and terminates other processes that are using memory until enough memory is available for the application to run properly.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR AUTOSCALING CONTAINERS IN A CLOUD-NATIVE CORE NETWORK ([[US Patent Application 18042288. METHOD AND APPARATUS FOR AUTOSCALING CONTAINERS IN A CLOUD-NATIVE CORE NETWORK simplified abstract|18042288]])=== |
| − | An electronic device is provided. The electronic device includes a memory and a processor. The processor may be configured to identify that an application using large-capacity memory satisfying a specified condition is running, identify a first memory capacity required to run the application, and terminate at least one process allocated to the memory until the first memory capacity is secured as the available capacity of the memory.
| + | |
| | | | |
| − | ===METHOD AND APPARATUS FOR AUTOSCALING CONTAINERS IN A CLOUD-NATIVE CORE NETWORK (18042288)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Yue WANG | | Yue WANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology. It focuses on supporting higher data rates and enabling intelligent services such as smart home, smart city, and connected car applications. The abstract also introduces a method that uses artificial intelligence (AI) to automatically adjust the number of containers in a cloud-native core network based on metrics obtained from a metrics server. This autoscaling decision is made using a trained machine learning model.
| |
| | | | |
| − | '''Abstract'''
| + | ===MEMORY CONTROLLER PERFORMING SELECTIVE AND PARALLEL ERROR CORRECTION, SYSTEM INCLUDING THE SAME AND OPERATING METHOD OF MEMORY DEVICE ([[US Patent Application 18335375. MEMORY CONTROLLER PERFORMING SELECTIVE AND PARALLEL ERROR CORRECTION, SYSTEM INCLUDING THE SAME AND OPERATING METHOD OF MEMORY DEVICE simplified abstract|18335375]])=== |
| − | The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method performed by an artificial intelligence (AI) module for autoscaling containers of a cloud-native core network with containerised network functions is provided. The method comprising requesting, from at least one metrics server, at least one metric required to make an autoscaling decision with respect to at least one set of containers; receiving the at least one metric from the at least one metrics server; processing the received at least one metric, using a trained machine learning (ML) model, to make an autoscaling decision with respect to the set of containers; and implementing the autoscaling decision with respect to the set of containers.
| + | |
| | | | |
| − | ===MEMORY CONTROLLER PERFORMING SELECTIVE AND PARALLEL ERROR CORRECTION, SYSTEM INCLUDING THE SAME AND OPERATING METHOD OF MEMORY DEVICE (18335375)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Hyeokjun CHOE | | Hyeokjun CHOE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a memory controller that manages the memory accessed by a device connected to a host processor through a bus. The memory controller has two interface circuits, one for communication with the host processor and the other for communication with the memory. It also includes an error detection circuit that identifies errors in data received from the memory in response to a read request from the host processor. The memory controller has a variable error correction circuit that corrects the errors based on a reference latency and error correction level specified in an error correction option. Additionally, there is a fixed error correction circuit that operates simultaneously with the variable error correction circuit to correct the errors.
| |
| | | | |
| − | '''Abstract'''
| + | ===ADAPTIVE MULTIPATH FABRIC FOR BALANCED PERFORMANCE AND HIGH AVAILABILITY ([[US Patent Application 18332242. ADAPTIVE MULTIPATH FABRIC FOR BALANCED PERFORMANCE AND HIGH AVAILABILITY simplified abstract|18332242]])=== |
| − | A memory controller is provided that is configured to control a memory accessed by a device connected to a host processor via a bus. The memory controller is configured to control a memory accessed by a device connected to a host processor via a bus, and includes a first interface circuit configured to communicate with the host processor; a second interface circuit configured to communicate with the memory; an error detection circuit configured to detect an error present in data received from the second interface circuit in response to a first read request received from the first interface circuit; a variable error correction circuit configured to correct the error based on at least one of a reference latency and a reference error correction level included in a first error correction option; and a fixed error correction circuit configured to correct the error in parallel with an operation of the variable error correction circuit.
| |
| | | | |
| − | ===ADAPTIVE MULTIPATH FABRIC FOR BALANCED PERFORMANCE AND HIGH AVAILABILITY (18332242)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Gunneswara R. Marripudi | | Gunneswara R. Marripudi |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a computing system that ensures high availability of computing resources. It consists of multiple interfaces, sets of computing resources, and switches. Each set of computing resources has multiple computing resources, and each switch is connected to an interface and a set of computing resources. If one switch fails, the remaining switches distribute data traffic through cross-connections between them.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE AND CONTROL METHOD THEREFOR ([[US Patent Application 18208092. ELECTRONIC DEVICE AND CONTROL METHOD THEREFOR simplified abstract|18208092]])=== |
| − | A computing system providing high-availability access to computing resources includes: a plurality of interfaces; a plurality of sets of computing resources, each of the sets of computing resources including a plurality of computing resources; and at least three switches, each of the switches being connected to a corresponding one of the interfaces via a host link and being connected to a corresponding one of the sets of computing resources via a plurality of resource connections, each of the switches being configured such that data traffic is distributed to remaining ones of the switches through a plurality of cross-connections between the switches if one of the switches fails.
| |
| | | | |
| − | ===ELECTRONIC DEVICE AND CONTROL METHOD THEREFOR (18208092)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sangmin LEE | | Sangmin LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that includes sensors, a communication circuit, memory, and processors. The device is capable of identifying its internal temperature using the sensors and providing this data to an external device. It can also receive a surface temperature prediction model from the external device and use this model, along with information about the device's module location stored in memory, to predict its surface temperature. Based on this prediction, the device can select which heat sources to control in order to regulate its temperature.
| |
| | | | |
| − | '''Abstract'''
| + | ===SYSTEMS AND METHODS FOR PRE-POPULATING ADDRESS TRANSLATION CACHE ([[US Patent Application 17879713. SYSTEMS AND METHODS FOR PRE-POPULATING ADDRESS TRANSLATION CACHE simplified abstract|17879713]])=== |
| − | An electronic device, including: at least one sensor; a communication circuit; a memory; and at least one processor operationally connected with the at least one sensor, the communication circuit, and the memory, wherein the at least one processor is configured to: identify an internal temperature of the electronic device using the at least sensor; provide, to an external device, internal temperature data associated with the internal temperature of the electronic device; receive a surface temperature prediction model for predicting a surface temperature of the electronic device from the external device; predict the surface temperature of the electronic device based on the surface temperature prediction model and information associated with a module location, the information being stored in the memory; and select at least one heat source to enter heating control from among a plurality of modules of the electronic device based on the predicted surface temperature.
| |
| | | | |
| − | ===SYSTEMS AND METHODS FOR PRE-POPULATING ADDRESS TRANSLATION CACHE (17879713)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Daniel Lee Helmick | | Daniel Lee Helmick |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a system and method for processing commands from a host computing device to a storage device. The storage device identifies a command from the host device, which includes a logical address. It then detects a condition and requests the translation of the logical address into a physical address. The storage device stores the physical address in a cache and transfers data according to the command based on the physical address.
| |
| | | | |
| − | '''Abstract'''
| + | ===SELF-CONFIGURING SSD MULTI-PROTOCOL SUPPORT IN HOST-LESS ENVIRONMENT ([[US Patent Application 18206079. SELF-CONFIGURING SSD MULTI-PROTOCOL SUPPORT IN HOST-LESS ENVIRONMENT simplified abstract|18206079]])=== |
| − | Systems and methods for processing commands from a host computing device to a storage device are disclosed. The method includes identifying, by the storage device, a command from the host computing device, the command including a logical address; detecting a condition; based on detecting the condition, requesting, by the storage device, translation of the logical address into a physical address; storing, by the storage device, the physical address in a cache; and transferring data according to the command based on the physical address.
| + | |
| | | | |
| − | ===SELF-CONFIGURING SSD MULTI-PROTOCOL SUPPORT IN HOST-LESS ENVIRONMENT (18206079)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Sompong Paul OLARIG | | Sompong Paul OLARIG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a device that has the ability to configure itself. It has an interface that allows communication with a chassis and supports multiple transport protocols. The device also has a Vital Product Data (VPD) reading logic to read information from the chassis and a built-in self-configuration logic. This logic is responsible for configuring the interface to use a specific transport protocol and disabling other transport protocols based on the information obtained from the VPD.
| |
| | | | |
| − | '''Abstract'''
| + | ===APPARATUS AND METHOD WITH ACCELERATING ARTIFICIAL NEURAL NETWORK ([[US Patent Application 18296165. APPARATUS AND METHOD WITH ACCELERATING ARTIFICIAL NEURAL NETWORK simplified abstract|18296165]])=== |
| − | A device that may configure itself is disclosed. The device may include an interface that may be used for communications with a chassis. The interface may support a plurality of transport protocols. The device may include a Vital Product Data (VPD) reading logic to read a VPD from the chassis and a built-in self-configuration logic to configure the interface to use one of the transport protocols and to disable alternative transport protocols, responsive to the VPD.
| + | |
| | | | |
| − | ===APPARATUS AND METHOD WITH ACCELERATING ARTIFICIAL NEURAL NETWORK (18296165)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Gopinath Vasanth MAHALE | | Gopinath Vasanth MAHALE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a computer processor apparatus that performs operations on input feature maps (IFMs) using a technique called Winograd convolution (WinConv). The apparatus includes modules for forward transformation, multiplication, accumulation, and inverse transformation. The forward transform module transforms the IFMs, the multiply and accumulate array (MAA) units multiply the transformed IFMs with transformed kernels, and perform an inverse transform operation. Finally, the inverse transform module generates output feature maps (OFMs) based on the result of the first inverse transform operation.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR PROCESSING BIOMETRIC INFORMATION IN ELECTRONIC DEVICE ([[US Patent Application 18328412. METHOD AND APPARATUS FOR PROCESSING BIOMETRIC INFORMATION IN ELECTRONIC DEVICE simplified abstract|18328412]])=== |
| − | A processor-implemented apparatus includes a forward transform module configured to transform input feature maps (IFMs) by performing a forward transform operation in a Winograd convolution (WinConv) domain, multiply and accumulate array (MAA) units configured to multiply the transformed IFMs by transformed kernels and perform a first inverse transform operation based on results of the multiplying, and an inverse transform module configured to generate output feature maps (OFMs) based on a result of the first inverse transform operation.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR PROCESSING BIOMETRIC INFORMATION IN ELECTRONIC DEVICE (18328412)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Teain AN | | Teain AN |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and device for processing biometric information in an electronic device. The device has a processor that can operate in either a normal mode or a secure mode. In the normal mode, the device detects a biometric input event from a biometric sensor module. In the secure mode, the device creates biometric data based on the sensed data from the biometric sensor module. The device then performs biometric registration or authentication based on the created biometric data in the secure mode. Finally, the device provides the result information of the biometric registration or authentication in the normal mode.
| |
| | | | |
| − | '''Abstract'''
| + | ===CELL LIBRARIES, COMPUTING SYSTEMS, AND METHODS FOR DESIGNING AN INTEGRATED CIRCUIT ([[US Patent Application 18149749. CELL LIBRARIES, COMPUTING SYSTEMS, AND METHODS FOR DESIGNING AN INTEGRATED CIRCUIT simplified abstract|18149749]])=== |
| − | A method and apparatus for processing biometric information in an electronic device including a processor that operates at a normal mode or at a secure mode, the method comprising, detecting a biometric input event from a biometric sensor module at normal mode, creating biometric data based on sensed data from the biometric sensor module at the secure mode, performing biometric registration or biometric authentication based on the created biometric data at the secure mode, and providing result information of biometric registration or biometric authentication at the normal mode.
| + | |
| | | | |
| − | ===CELL LIBRARIES, COMPUTING SYSTEMS, AND METHODS FOR DESIGNING AN INTEGRATED CIRCUIT (18149749)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Juyeon Kim | | Juyeon Kim |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a cell library that is stored in a computer-readable storage medium. This library is designed to store two types of delay information for a standard cell. The first type of delay information is based on the threshold voltage of a transistor within the standard cell, while the second type is based on the mobility of the transistor.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD VERIFYING PROCESS PROXIMITY CORRECTION USING MACHINE LEARNING, AND SEMICONDUCTOR MANUFACTURING METHOD USING SAME ([[US Patent Application 17903070. METHOD VERIFYING PROCESS PROXIMITY CORRECTION USING MACHINE LEARNING, AND SEMICONDUCTOR MANUFACTURING METHOD USING SAME simplified abstract|17903070]])=== |
| − | A cell library is provided. The cell library is stored in a computer-readable storage medium. The cell library is configured to store: first delay information of a standard cell according to a threshold voltage of a transistor included in the standard cell; and second delay information of the standard cell according to mobility of the transistor included in the standard cell.
| + | |
| | | | |
| − | ===METHOD VERIFYING PROCESS PROXIMITY CORRECTION USING MACHINE LEARNING, AND SEMICONDUCTOR MANUFACTURING METHOD USING SAME (17903070)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | SEORIM MOON | | SEORIM MOON |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method of manufacturing a semiconductor chip. It involves generating a layout pattern and then applying Process Proximity Correction (PPC) to the pattern. This correction is verified using machine learning. Optical Proximity Correction (OPC) is then applied to the corrected pattern to generate an OPC layout pattern. A mask is manufactured using this pattern, and finally, a semiconductor chip is manufactured using the mask.
| |
| | | | |
| − | '''Abstract'''
| + | ===ADVERTISEMENT TARGET DETERMINING DEVICE AND ADVERTISEMENT TARGET DETERMINING METHOD ([[US Patent Application 18123105. ADVERTISEMENT TARGET DETERMINING DEVICE AND ADVERTISEMENT TARGET DETERMINING METHOD simplified abstract|18123105]])=== |
| − | A method of manufacturing a semiconductor chip includes; generating a layout pattern, performing Process Proximity Correction (PPC) on the layout pattern to generate a PPC layout pattern, wherein the performing of PPC includes verifying the PPC layout pattern using machine learning, performing Optical Proximity Correction (OPC) on the PPC layout pattern to generate an OPC layout pattern, manufacturing a mask using the OPC layout pattern, and manufacturing a semiconductor chip using the mask.
| |
| | | | |
| − | ===ADVERTISEMENT TARGET DETERMINING DEVICE AND ADVERTISEMENT TARGET DETERMINING METHOD (18123105)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sanghun PARK | | Sanghun PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for determining the target audience for an advertisement based on an advertisement request. The method involves collecting usage history information and device features from multiple devices, generating feature vectors based on this information, determining labels for the devices based on the advertisement request and features, creating an advertisement target inference model using the determined labels and feature vectors, and finally, identifying at least one device as the advertisement target by applying the inference model to the devices.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE AND IMAGE PROCESSING METHOD THEREOF ([[US Patent Application 18334896. ELECTRONIC DEVICE AND IMAGE PROCESSING METHOD THEREOF simplified abstract|18334896]])=== |
| − | Provided is a method of determining an advertisement target according to an advertisement request, the method includes: obtaining usage history information from a plurality of devices, obtaining features of the plurality of devices, based on the usage history information, and generating feature vectors for the obtained features; determining labels for the plurality of devices, based on the advertisement request and the obtained features; generating an advertisement target inference model, based on the determined labels and the feature vectors; and determining at least one advertisement target device among the plurality of devices by applying the generated advertisement target inference model to the plurality of devices.
| |
| | | | |
| − | ===ELECTRONIC DEVICE AND IMAGE PROCESSING METHOD THEREOF (18334896)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Yoonjung CHOI | | Yoonjung CHOI |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for image processing that involves correcting an initial image and then identifying specific parts of the corrected image to recommend further enhancements. The method includes displaying indicators for these parts and automatically applying correction functions to enhance the image. It also offers a comparison display function and an enlarged display function for the enhanced image.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR ACQUIRING IMAGE USING MULTISPECTRAL SENSOR ([[US Patent Application 18100060. METHOD AND APPARATUS FOR ACQUIRING IMAGE USING MULTISPECTRAL SENSOR simplified abstract|18100060]])=== |
| − | An example image processing method may include determining a first image to be corrected; obtaining a second image by correcting the first image; and identifying at least one part, from among a plurality of parts in the second image, for recommending an effect caused by correction. The method may include displaying an indicator indicating at least one part in the second image and correction may be performed by automatically recommending and applying one or more correction functions for image enhancement to each image. The method may provide an original comparison display function or an enlarged display function for an enhanced image.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR ACQUIRING IMAGE USING MULTISPECTRAL SENSOR (18100060)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Woo-Shik KIM | | Woo-Shik KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for acquiring an image using a multispectral sensor. The method involves acquiring signals from more than four channels, determining the cumulative infrared signal present in all of the channel signals, calculating the infrared component of each channel based on the cumulative infrared signal and the individual characteristics of the channels, and finally acquiring corrected channel signals by removing the infrared component from each of the channel signals.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR EYE TRACKING ([[US Patent Application 18333098. METHOD AND APPARATUS FOR EYE TRACKING simplified abstract|18333098]])=== |
| − | A method of acquiring an image includes: acquiring channel signals corresponding to more than four channels from a multispectral sensor; determining a cumulative infrared signal included in all of the channel signals by synthesizing the infrared components of the channel signals; calculating an infrared component of each channel, based on the cumulative infrared signal and individual characteristics of the channels; and acquiring corrected channel signals by removing the infrared component from each of the channel signals.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR EYE TRACKING (18333098)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jingu HEO | | Jingu HEO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method and device for tracking the movement of a person's eye. It involves detecting the area of the eye in an image, determining a characteristic of the eye area, selecting an appropriate eye tracker based on this characteristic, and then tracking the movement of the eye in subsequent frames of the image using the selected eye tracker.
| |
| | | | |
| − | '''Abstract'''
| + | ===APPLICATION MATCHING METHOD AND APPLICATION MATCHING DEVICE ([[US Patent Application 18128751. APPLICATION MATCHING METHOD AND APPLICATION MATCHING DEVICE simplified abstract|18128751]])=== |
| − | Provided is a method and apparatus for eye tracking. An eye tracking method includes detecting an eye area corresponding to an eye of a user in a first frame of an image; determining an attribute of the eye area; selecting an eye tracker from a plurality of different eye trackers, the eye tracker corresponding to the determined attribute of the eye area; and tracking the eye of the user in a second frame of the image based on the selected eye tracker, the second frame being subsequent to the first frame.
| |
| | | | |
| − | ===APPLICATION MATCHING METHOD AND APPLICATION MATCHING DEVICE (18128751)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Meng WANG | | Meng WANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for matching applications based on their icons. The method involves acquiring a collection of icons, including icons for different applications. The text in these icons is recognized and categorized. The similarity between two icons is determined based on the category of the text. Finally, the method determines whether two applications match each other based on their icon similarity.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC APPARATUS AND METHOD FOR CONTROLLING THEREOF ([[US Patent Application 18208976. ELECTRONIC APPARATUS AND METHOD FOR CONTROLLING THEREOF simplified abstract|18208976]])=== |
| − | An application matching method that includes: acquiring a plurality of icons comprising a first icon corresponding to a first application and a second icon corresponding to a second application, recognizing a text in at least one of the plurality of icons, determining a category of the text, determining a similarity between the first icon and the second icon based on a category determination result of the text, and determining whether the first application matches the second application based on the similarity.
| |
| | | | |
| − | ===ELECTRONIC APPARATUS AND METHOD FOR CONTROLLING THEREOF (18208976)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jisung YOO | | Jisung YOO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that can create a 3D avatar of a person based on an image. The device uses a communication interface, memory, and a processor to perform various tasks. It obtains an image with a person, then obtains a 3D shape model of the person from the image. It then maps the texture of the image onto the 3D shape model using identification information for each area of the model. Finally, it generates a 3D avatar of the person based on the mapped texture.
| |
| | | | |
| − | '''Abstract'''
| + | ===FACE VERIFICATION METHOD AND APPARATUS ([[US Patent Application 18333195. FACE VERIFICATION METHOD AND APPARATUS simplified abstract|18333195]])=== |
| − | Provide is an electronic apparatus that includes a communication interface, a memory storing at least one instruction, and a processor configured to execute the at least one instruction to: obtain an image including a person object, obtain a 3D shape model corresponding to the person object included in the image, map a texture of the image to the 3D shape model based on identification information for each area of the 3D shape model, and generate a 3D avatar corresponding to the person object based on the 3D shape model to which the texture of the image is mapped.
| + | |
| | | | |
| − | ===FACE VERIFICATION METHOD AND APPARATUS (18333195)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Changyong SON | | Changyong SON |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and device for verifying a user's face on a mobile device. The device uses one or more processors to obtain images of the user and determine if any of the images are taken from a distance outside of a specific range. Based on this determination, the device performs face verification using a stricter threshold for images taken from outside the range, and a less strict threshold for images taken from within the range.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD OF OPERATING DISPLAY DRIVER INTEGRATED CIRCUIT, POWER MANAGEMENT INTEGRATED CIRCUIT AND ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME ([[US Patent Application 18097948. METHOD OF OPERATING DISPLAY DRIVER INTEGRATED CIRCUIT, POWER MANAGEMENT INTEGRATED CIRCUIT AND ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME simplified abstract|18097948]])=== |
| − | Disclosed is a face verification method and apparatus. A mobile device may include one or more processors configured to obtain one or more images for a user, ascertain whether any of the one or more images correspond to respective user distances, from the user to the mobile device, outside of a threshold range of distances, and selectively, based on a result of the ascertaining, perform verification using a first verification threshold for any of the one or more images ascertained to correspond to the respective user distances that are outside the threshold range of distances, and perform verification using a less strict second verification threshold for any of the one or more images that have been ascertained to not correspond to the respective user distances that are outside the threshold range of distances.
| + | |
| | | | |
| − | ===METHOD OF OPERATING DISPLAY DRIVER INTEGRATED CIRCUIT, POWER MANAGEMENT INTEGRATED CIRCUIT AND ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME (18097948)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Kyounghwan KWON | | Kyounghwan KWON |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method used by a display driver integrated circuit (DDI) to determine if a change in the level of a logic voltage is needed. If a change is required, the DDI sends a command to a power management integrated circuit (PMIC) to adjust the logic voltage. The PMIC then sends back a different logic voltage level based on the command received.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC APPARATUS FOR DISPLAYING 3D IMAGE AND OPERATING METHOD THEREOF ([[US Patent Application 18137847. ELECTRONIC APPARATUS FOR DISPLAYING 3D IMAGE AND OPERATING METHOD THEREOF simplified abstract|18137847]])=== |
| − | An operating method of a display driver integrated circuit (DDI) includes determining whether a change to a level of a first logic voltage supplied to a logic circuit of the DDI is required, based on determining that a change to the level of the first logic voltage is required, transmitting a logic voltage setting command to a power management integrated circuit (PMIC), and receiving, from the PMIC, a second logic voltage having a level different from the first logic voltage and corresponding to the logic voltage setting command.
| |
| | | | |
| − | ===ELECTRONIC APPARATUS FOR DISPLAYING 3D IMAGE AND OPERATING METHOD THEREOF (18137847)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Kyungmin LIM | | Kyungmin LIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic apparatus and its operating method. The apparatus includes a display panel, memory, and processor. The processor takes an input image with two areas, and generates a calibration map that assigns a depth value to each area. This calibration map is then applied to the input image to create an output image with two output areas. The depth values in the output areas are converted to correspond with the display panel. The output image is then displayed on the display panel.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE AND CONTROL METHOD THEREOF ([[US Patent Application 18191448. ELECTRONIC DEVICE AND CONTROL METHOD THEREOF simplified abstract|18191448]])=== |
| − | An electronic apparatus and an operating method thereof are provided. The electronic apparatus includes a display panel, a memory, and a processor. The processor obtains an input image including a first area and a second area, generates a calibration map that allocates, to the first area, a first calibration value for representing a first depth value and allocates, to the second area, a second calibration value for representing a second depth value, applies the calibration map to the input image to generate an output image including a first output area and a second output area, and displays the output image on the display panel. The first output area has a depth value obtained by converting the first depth value so as to correspond to the display panel. The second output area has a depth value obtained by converting the second depth value so as to correspond to the display panel.
| + | |
| | | | |
| − | ===ELECTRONIC DEVICE AND CONTROL METHOD THEREOF (18191448)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Jihwan LEE | | Jihwan LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an example electronic device and its control method. The device includes a memory that stores information about different intonation templates, which are generated by training a template generator using voice signals. These templates represent the intonations of the voice signals. The device also includes a processor that, when a voice signal is received, determines the user's intention behind the voice signal and generates a response text based on the voice signal and the user's intention. The processor then identifies an intonation template that corresponds to the response text using an intonation classifier. The intonation information corresponding to the identified template is obtained using an intonation encoder. Finally, a voice synthesis module generates an output voice signal by combining the response text and the intonation information.
| |
| | | | |
| − | '''Abstract'''
| + | ===BANDWIDTH EXTENSION AND SPEECH ENHANCEMENT OF AUDIO ([[US Patent Application 18208628. BANDWIDTH EXTENSION AND SPEECH ENHANCEMENT OF AUDIO simplified abstract|18208628]])=== |
| − | An example electronic device and an example control method thereof are provided. The example electronic device may include: a memory configured to store information about a plurality of intonation templates, which are obtained by training an intonation template generator based on a plurality of voice signals and represent intonations of the plurality of voice signals; and a processor configured to, when a voice signal is received, obtain information about a user’s intention corresponding to the voice signal, obtain first text to respond to the voice signal, based on the voice signal and the information about the user’s intention, identify an intonation template corresponding to the first text based on the information about the plurality of intonation templates by inputting information about the first text to an intonation classifier, obtain intonation information corresponding to the identified intonation template by inputting information about the identified intonation template to the intonation encoder, and obtain an output voice signal corresponding to text by inputting the first text and the intonation information to a voice synthesis module.
| + | |
| | | | |
| − | ===BANDWIDTH EXTENSION AND SPEECH ENHANCEMENT OF AUDIO (18208628)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Pavel Konstantinovich Andreev | | Pavel Konstantinovich Andreev |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a system, apparatus, and method for audio processing. It involves several operations such as obtaining an input audio waveform, converting it into a mel-spectrogram using a short-time Fourier transform (STFT), and then improving the mel-spectrogram by removing noise or restoring high-frequency components using two-dimensional Unet convolutional blocks. The updated mel-spectrogram is then converted back into an audio waveform in the waveform domain. The converted audio waveform is corrected in both the time and frequency domains to eliminate artifacts or noise. It is then processed further using a one-dimensional convolutional layer. Finally, the processed audio waveform is outputted in both the time and frequency domains.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICES CAPABLE OF PERFORMING WRITE TRAINING WITHOUT READ TRAINING, AND MEMORY SYSTEM INCLUDING THE SAME ([[US Patent Application 18160597. SEMICONDUCTOR DEVICES CAPABLE OF PERFORMING WRITE TRAINING WITHOUT READ TRAINING, AND MEMORY SYSTEM INCLUDING THE SAME simplified abstract|18160597]])=== |
| − | There is provided a system, apparatus and a method for audio processing. The operations include obtaining an input audio waveform, obtaining a mel-spectrogram by performing a short-time Fourier transform (STFT) operation on the input audio waveform, obtaining an updated mel-spectrogram by at least one or removing noise from the mel-spectrogram or restoring high frequency components by applying two-dimensional Unet convolutional blocks to the mel-spectrogram, converting the updated mel-spectrogram to a converted audio waveform in a waveform domain, correcting the converted audio waveform in a time domain, correcting the converted audio waveform in a frequency domain to remove artifacts or noise, processing the corrected audio waveform corrected in the time domain and corrected in the frequency domain with an one-dimensional convolutional layer, and outputting the processed audio waveform in the time domain and in the frequency domain.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICES CAPABLE OF PERFORMING WRITE TRAINING WITHOUT READ TRAINING, AND MEMORY SYSTEM INCLUDING THE SAME (18160597)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Taeyoung Oh | | Taeyoung Oh |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that has an input/output interface with several pins. One of these pins is used to receive a write clock signal from a memory controller. Another pin is used to receive write training data from the memory controller during a write training operation. The device also has multiple pins that send the result values of the write training back to the memory controller. The write training is performed by the semiconductor device using the write clock signal and the write training data.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME ([[US Patent Application 17885081. SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME simplified abstract|17885081]])=== |
| − | A semiconductor device includes an input/output interface with a first data input/output pin, a plurality of second data input/output pins, and a write clock signal pin, which is configured to receive a write clock signal from a memory controller. The first data input/output pin is configured to receive write training data from the memory controller during a write training operation, and the plurality of second data input/output pins feed result values of the write training to the memory controller. This write training is performed by the semiconductor device using the write clock signal and the write training data.
| |
| | | | |
| − | ===SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME (17885081)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Taeyoung OH | | Taeyoung OH |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor memory device that includes two main circuits: a row hammer management circuit and a refresh control circuit.
| |
| | | | |
| − | The row hammer management circuit keeps track of the number of times each memory cell row is accessed and stores this information in count cells within each row. It also has a hammer address queue that stores addresses of memory cells that are being accessed frequently. When a certain number of these candidate hammer addresses are reached, the circuit changes the logic level of an error signal sent to the memory controller. When another threshold number of candidate hammer addresses is reached, the circuit outputs one of these addresses as a hammer address.
| + | ===SUBSTRATE PROCESSING METHOD ([[US Patent Application 17994181. SUBSTRATE PROCESSING METHOD simplified abstract|17994181]])=== |
| | | | |
| − | The refresh control circuit is responsible for performing a hammer refresh operation on memory cell rows that are physically adjacent to the row corresponding to the hammer address. This operation helps prevent the row hammer effect, which is a phenomenon where repeated accessing of certain memory cells can cause errors in neighboring cells.
| |
| | | | |
| − | In summary, this semiconductor memory device has a circuit that tracks and manages the number of accesses to memory cell rows, and another circuit that performs a refresh operation on neighboring rows to mitigate the row hammer effect.
| + | '''Main Inventor''' |
| | | | |
| − | '''Abstract'''
| + | MINJUNG KIM |
| − | A semiconductor memory device includes a row hammer management circuit and a refresh control circuit. The row hammer management circuit counts the number of times of access on each memory cell row to store the counted values in count cells of each memory cell row as count data. A hammer address queue in the row hammer management circuit stores candidate hammer addresses, which are intensively accessed, in response to a number of the candidate hammer addresses reaching a second number, transitions a logic level of an error signal provided to the memory controller, and, in response to the number of the candidate hammer addresses reaching the first number, outputs one of the candidate hammer addresses as a hammer address. The refresh control circuit performs a hammer refresh operation on victim memory cell rows which are physically adjacent to a memory cell row corresponding to the hammer address.
| |
| | | | |
| − | ===SUBSTRATE PROCESSING METHOD (17994181)===
| |
| | | | |
| − | '''Inventor'''
| + | ===SEMICONDUCTOR CARRIER STORAGE SYSTEM, SEMICONDUCTOR FABRICATION SYSTEM INCLUDING THE SAME, AND SEMICONDUCTOR FABRICATION METHOD USING THE SAME ([[US Patent Application 17972187. SEMICONDUCTOR CARRIER STORAGE SYSTEM, SEMICONDUCTOR FABRICATION SYSTEM INCLUDING THE SAME, AND SEMICONDUCTOR FABRICATION METHOD USING THE SAME simplified abstract|17972187]])=== |
| − | MINJUNG KIM
| |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for processing a substrate, which involves several steps. First, a silicon film is formed on the substrate. Then, the silicon film is exposed to microwaves. Finally, the silicon film is soaked in liquid heavy water.
| |
| | | | |
| − | '''Abstract''' | + | '''Main Inventor''' |
| − | A substrate processing method includes; forming a silicon film on a substrate, irradiating the silicon film with microwaves, and soaking the silicon film in liquid heavy water.
| |
| | | | |
| − | ===SEMICONDUCTOR CARRIER STORAGE SYSTEM, SEMICONDUCTOR FABRICATION SYSTEM INCLUDING THE SAME, AND SEMICONDUCTOR FABRICATION METHOD USING THE SAME (17972187)===
| + | Youngwook KIM |
| | | | |
| − | '''Inventor'''
| |
| − | Youngwook KIM
| |
| | | | |
| − | '''Brief explanation'''
| + | ===INTEGRATED CIRCUIT DEVICES INCLUDING A PARAMETER MEASURING STRUCTURE AND METHODS OF FORMING THE SAME ([[US Patent Application 17837453. INTEGRATED CIRCUIT DEVICES INCLUDING A PARAMETER MEASURING STRUCTURE AND METHODS OF FORMING THE SAME simplified abstract|17837453]])=== |
| − | The abstract describes a semiconductor carrier storage system used in semiconductor fabrication processes. The system includes storage ports for holding semiconductor carriers, a shuttle rail for moving carriers horizontally, an internal carrier shuttle that transfers carriers to the storage ports, and an upper transport that receives carriers from an overhead hoist transport. The internal carrier shuttle consists of a shuttle body, a transfer wheel, a gripper for holding carriers, and a hoist for vertical movement.
| |
| | | | |
| − | '''Abstract'''
| |
| − | Disclosed are semiconductor carrier storage systems, semiconductor fabrication systems including the same, and/or semiconductor fabrication methods using the same. The semiconductor carrier storage system comprises storage ports each of which accommodates a semiconductor carrier, a shuttle rail that extends in a horizontal direction on a side of the storage ports, an internal carrier shuttle that moves along the shuttle rail and transfers a semiconductor carrier to each of the storage ports, and an upper transport that receives the semiconductor carrier from an overhead hoist transport (OHT). The internal carrier shuttle includes a shuttle body coupled to the shuttle rail, a transfer wheel that connects the shuttle body to the shuttle rail, a gripper that holds the semiconductor carrier, and a hoist that vertically extends between the shuttle body and the gripper and drives the gripper to vertically move.
| |
| | | | |
| − | ===INTEGRATED CIRCUIT DEVICES INCLUDING A PARAMETER MEASURING STRUCTURE AND METHODS OF FORMING THE SAME (17837453)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | BYOUNGHAK HONG | | BYOUNGHAK HONG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes integrated circuit devices that consist of a cell transistor and a parameter measuring structure. The cell transistor is located on one side of a substrate, while the parameter measuring structure includes two contact structures that extend through the substrate to the other side. The second side of the substrate exposes the respective portions of the contact structures.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18127895. SEMICONDUCTOR DEVICE simplified abstract|18127895]])=== |
| − | Integrated circuit devices may include a cell transistor and a parameter measuring structure (e.g., a resistance measuring structure). The cell transistor may be on a first surface of a substrate structure, which is opposite a second surface thereof. The parameter measuring structure may include first and second contact structures that extend through the substrate structure. The second surface of the substrate structure may expose respective portions of the first and second contact structures.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18127895)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sang Cheol NA | | Sang Cheol NA |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that includes several components. These components include a first substrate, an active pattern, a gate electrode, a source/drain region, a first interlayer insulating layer, a sacrificial layer, a lower wiring layer, a through via trench, a through via, a recess, and a through via insulating layer. The device is designed to allow for efficient electrical connections within the semiconductor.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME ([[US Patent Application 18334546. SEMICONDUCTOR DEVICE AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME simplified abstract|18334546]])=== |
| − | A semiconductor device is provided. The semiconductor device includes: a first substrate; an active pattern extending on the first substrate; a gate electrode extending on the active pattern; a source/drain region on the active pattern; a first interlayer insulating layer on the source/drain region; a sacrificial layer on the first substrate; a lower wiring layer on a lower surface of the sacrificial layer; a through via trench extending to the lower wiring layer by passing through the first interlayer insulating layer and the sacrificial layer in a vertical direction; a through via inside the through via trench and connected to the lower wiring layer; a recess inside the sacrificial layer and protruding from a sidewall of the through via trench in the second horizontal direction; and a through via insulating layer extending along the sidewall of the through via trench and into the recess.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME (18334546)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sungmin HWANG | | Sungmin HWANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of various components. It includes lower circuit patterns on a lower substrate, lower bonding patterns that are electrically connected to the lower circuit patterns, and upper bonding patterns that contact the lower bonding patterns. There is also a passive device on the upper bonding patterns, which includes a conductive material and contacts one of the upper bonding patterns. The device further features a gate electrode structure with gate electrodes that are spaced apart in one direction and extend in another direction. The length of the gate electrodes increases gradually from the bottom to the top of the structure. Additionally, there is a channel that extends through at least a portion of the gate electrode structure, and an upper substrate is placed on top of the channel.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18086340. SEMICONDUCTOR DEVICE simplified abstract|18086340]])=== |
| − | A semiconductor device includes lower circuit patterns on a lower substrate; lower bonding patterns on the lower circuit patterns, the lower bonding patterns including a conductive material and being electrically connected to the lower circuit patterns; upper bonding patterns on and contacting the lower bonding patterns, and including a conductive material; a passive device on the upper bonding patterns, and including a conductive material and contacting one of the upper bonding patterns; a gate electrode structure on the passive device, and including gate electrodes spaced apart from each other in a first direction, each of which extends in a second direction, and extension lengths in the second direction of the gate electrodes increasing from a lowermost level toward an uppermost level in a stepwise manner; a channel extending through at least a portion of the gate electrode structure; and an upper substrate on the channel.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18086340)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | JONGJIN LEE | | JONGJIN LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device that includes a substrate with transistors on it. The transistors are covered by two layers of insulating material. There are two interconnection lines in the device, one in each layer of insulating material. Each interconnection line consists of a barrier pattern, a liner, and a conductive pattern. The height difference between the top surface of the conductive pattern and the top surface of the liner is greater for the first interconnection line than for the second interconnection line.
| |
| | | | |
| − | '''Abstract'''
| + | ===REVERSED HIGH ASPECT RATIO CONTACT (HARC) STRUCTURE AND PROCESS ([[US Patent Application 17887203. REVERSED HIGH ASPECT RATIO CONTACT (HARC) STRUCTURE AND PROCESS simplified abstract|17887203]])=== |
| − | Provided is a semiconductor device including a substrate including an active region, transistors on the substrate, a first interlayer insulating layer and a second interlayer insulating layer on the transistors, a first interconnection line in an upper portion of the first interlayer insulating layer, and a second interconnection line in the second interlayer insulating layer, wherein the first interconnection line includes a first barrier pattern, a first liner, and a first conductive pattern, wherein the second interconnection line includes a second barrier pattern, a second liner, and a second conductive pattern, wherein first height between an uppermost portion of a top surface of the first conductive pattern and a lowermost portion of a top surface of the first liner is greater than a second height between an uppermost portion of a top surface of the second conductive pattern and a lowermost portion of a top surface of the second liner.
| + | |
| | | | |
| − | ===REVERSED HIGH ASPECT RATIO CONTACT (HARC) STRUCTURE AND PROCESS (17887203)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Buhyun HAM | | Buhyun HAM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor chip architecture that includes a wafer with different layers on one side. The front-end-of-line (FEOL) layer consists of a semiconductor device and an interlayer dielectric (ILD) structure. The wafer also has a shallow trench isolation (STI) structure. On top of the FEOL layer, there is a middle-of-line (MOL) layer with a contact and a via connected to the contact. An insulating layer is present on the same side of the wafer, adjacent to the via. The wafer also has a power rail that goes through it from the opposite side. The via extends vertically through the ILD structure, STI structure, and wafer to make contact with the power rail.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR PACKAGE HAVING AN INTERPOSER AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE ([[US Patent Application 18326325. SEMICONDUCTOR PACKAGE HAVING AN INTERPOSER AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE simplified abstract|18326325]])=== |
| − | Provided is a semiconductor chip architecture including a wafer, a front-end-of-line (FEOL) layer on a first side of the wafer, the FEOL layer including a semiconductor device and an interlayer dielectric (ILD) structure on the semiconductor device on the first side of the wafer, a shallow trench isolation (STI) structure in the wafer, and the wafer, a middle-of-line (MOL) layer provided on the first FEOL layer, the MOL layer including a contact and a via connected to the contact, an insulating layer on the first side of the wafer and adjacent to the via in a horizontal direction, a power rail penetrating the wafer from a second side of the wafer opposite to the first side, wherein the via extends through the ILD structure, the STI structure, and the wafer in a vertical direction to contact the power rail.
| + | |
| | | | |
| − | ===SEMICONDUCTOR PACKAGE HAVING AN INTERPOSER AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE (18326325)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | YANGGYOO JUNG | | YANGGYOO JUNG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor package that includes a package substrate and an interposer. The interposer is placed on top of the package substrate and consists of a semiconductor substrate with a wiring layer on its upper surface. The wiring layer contains multiple wirings, and there are redistribution wiring pads on top of it that are connected to these wirings. Additionally, bonding pads are present on the redistribution wiring pads. An insulation layer pattern is also included, which exposes a portion of the bonding pad. The interposer accommodates two semiconductor devices, which are positioned apart from each other. These devices are connected to each other through the wirings present in the interposer.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME ([[US Patent Application 18328322. SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract|18328322]])=== |
| − | A semiconductor package includes a package substrate. An interposer is disposed on the package substrate. The interposer includes a semiconductor substrate, a wiring layer disposed on an upper surface of the semiconductor substrate and having a plurality of wirings therein, redistribution wiring pads disposed on the wiring layer and electrically connected to the wirings, bonding pads disposed on the redistribution wiring pads, and an insulation layer pattern disposed on the wiring layer and exposing at least a portion of the bonding pad, and first and second semiconductor devices disposed on the interposer. The first and second semiconductor devices are spaced apart from each other and are electrically connected to each other by at least one of the wirings.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME (18328322)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | YEONGKWON KO | | YEONGKWON KO |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that includes a semiconductor substrate with two opposing surfaces. On one surface, there are multiple semiconductor elements arranged in a specific area. The other surface is divided into two regions - one that overlaps with the area of the semiconductor elements and another that surrounds it. An insulating protective layer is placed on the second surface of the substrate, and it includes an edge pattern in the surrounding region. This edge pattern can have a thinner portion compared to the center portion of the protective layer or an open region that exposes the second surface of the substrate. Additionally, there is a connection pad located on the center portion of the protective layer, which is electrically connected to the semiconductor elements.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR PACKAGE ([[US Patent Application 18131258. SEMICONDUCTOR PACKAGE simplified abstract|18131258]])=== |
| − | A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, a plurality of semiconductor elements disposed on the first surface in a device region, an insulating protective layer, and a connection pad. The second surface is divided into a first region overlapping the device region, and a second region surrounding the first region. The insulating protective layer is disposed on the second surface of the semiconductor substrate, and includes an edge pattern positioned in the second region. The edge pattern includes a thinner portion having a thickness smaller than a thickness of a center portion of the insulating protective layer positioned in the first region and/or an open region exposing the second surface of the semiconductor substrate. The connection pad is disposed on the center portion of the insulating protective layer and is electrically connected to the semiconductor elements.
| |
| | | | |
| − | ===SEMICONDUCTOR PACKAGE (18131258)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Junghoon Kang | | Junghoon Kang |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor package that consists of a layer that encapsulates a semiconductor chip, and another layer called the redistribution level layer. This redistribution level layer includes a redistribution layer and a redistribution insulating layer that insulates the redistribution layer. The abstract also mentions a laser mark area that is present on both the redistribution layer and the redistribution insulating layer. In this laser mark area, the redistribution insulating layer is made up of multiple mesh-type redistribution insulating patterns that are arranged separately from each other on a plane and surrounded by the redistribution layer. Additionally, the redistribution level layer includes a laser mark insulating layer that is located on top of the redistribution layer and the redistribution insulating layer. This laser mark insulating layer exposes the redistribution layer and the mesh-type redistribution insulating patterns in the laser mark area.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME ([[US Patent Application 18204505. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract|18204505]])=== |
| − | A semiconductor package includes an encapsulation layer encapsulating at least one semiconductor chip, and a redistribution level layer disposed on the encapsulation layer. The redistribution level layer includes a redistribution layer and a redistribution insulating layer insulating the redistribution layer, a laser mark area is disposed on the redistribution layer and the redistribution insulating layer, and the redistribution insulating layer of the laser mark area comprises a plurality of mesh-type redistribution insulating patterns arranged apart from each other on a plane and surrounded by the redistribution layer. The redistribution level layer includes a laser mark insulating layer located on the redistribution layer and the redistribution insulating layer, wherein the laser mark insulating layer includes a laser mark exposing the redistribution layer and the mesh-type redistribution insulating patterns in the laser mark area.
| |
| | | | |
| − | ===SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME (18204505)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | YOUNGWOO PARK | | YOUNGWOO PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor package that includes several layers to protect and enclose semiconductor chips. The package includes a substrate, a first semiconductor chip on the substrate, and an inner mold layer that partially encloses the first chip. There is also an inner shielding layer that encloses the inner mold layer and is electrically connected to a ground pad on the substrate. Additionally, there is a second semiconductor chip stack on the inner shielding layer, an outer mold layer that partially encloses the inner shielding layer and the second chip stack, and an outer shielding layer that partially encloses the outer mold layer. Both the inner and outer shielding layers are made of a conductive material.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME ([[US Patent Application 17984446. SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract|17984446]])=== |
| − | A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (17984446)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sangho CHA | | Sangho CHA |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes semiconductor devices and how they are made. These devices have a pad on a semiconductor chip, which is covered by a protective layer with an opening that exposes part of the pad's top surface. The device also includes a bump structure that is electrically connected to the pad. The bump structure consists of a metal layer on the pad and a solder ball on top of the metal layer. The width of the metal layer is between 0.85 and 0.95 times the width of the opening in the protective layer.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR PACKAGE ([[US Patent Application 18210132. SEMICONDUCTOR PACKAGE simplified abstract|18210132]])=== |
| − | Disclosed are semiconductor devices and their fabrication methods. The semiconductor device comprises a pad on a semiconductor chip, a protective layer on the semiconductor chip and having an opening that exposes a portion of a top surface of the pad, and a bump structure electrically connected to the pad. The bump structure includes a metal layer on the pad and a solder ball on the metal layer. A first width of the metal layer is about 0.85 times to about 0.95 times a second width of the opening.
| |
| | | | |
| − | ===SEMICONDUCTOR PACKAGE (18210132)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sanguk KIM | | Sanguk KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor package that includes various components such as a package substrate, bumps, a semiconductor chip, connection patterns, molding, warpage control layer, and insulating layers. The package is designed to control warpage and provide access to the connection patterns through openings in the insulating layers.
| |
| | | | |
| − | '''Abstract'''
| + | ===VERTICAL PN CONNECTION IN MULTI-STACK SEMICONDUCTOR DEVICE ([[US Patent Application 17841299. VERTICAL PN CONNECTION IN MULTI-STACK SEMICONDUCTOR DEVICE simplified abstract|17841299]])=== |
| − | A semiconductor package includes a package substrate, first and second bumps on a lower surface of the package substrate, a semiconductor chip on an upper surface of the package substrate, first and second connection patterns on the upper surface of the package substrate, a molding on the upper surface of the package substrate and covering the semiconductor chip, a warpage control layer on the molding, an upper insulating layer on the warpage control layer, a first opening passing through the upper insulating layer and exposing an upper surface of the warpage control layer, a second opening overlapping the first opening in a top view, the second opening passing through the warpage control layer and exposing the first connection pattern, and a third opening passing through the upper insulating layer and exposing the second connection pattern.
| |
| | | | |
| − | ===VERTICAL PN CONNECTION IN MULTI-STACK SEMICONDUCTOR DEVICE (17841299)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | WookHyun KWON | | WookHyun KWON |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a multi-stack semiconductor device that consists of a substrate and two field-effect transistors. The lower transistor has a lower channel structure, a lower gate structure, and two source/drain regions. The upper transistor is located on top of the lower transistor and has an upper channel structure, an upper gate structure, and two source/drain regions positioned vertically above the source/drain regions of the lower transistor. One of the source/drain regions of the lower transistor is connected to a positive or negative voltage source, while the corresponding source/drain region of the upper transistor is connected to the opposite voltage source. Additionally, the top portion of one source/drain region in the lower transistor is connected to the bottom portion of the corresponding source/drain region in the upper transistor.
| |
| | | | |
| − | '''Abstract'''
| + | ===CHIP-ON-FILM SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME ([[US Patent Application 18092241. CHIP-ON-FILM SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME simplified abstract|18092241]])=== |
| − | A multi-stack semiconductor device includes: a substrate; a lower field-effect transistor including a lower channel structure, a lower gate structure surrounding the lower channel structure, and 1and 2source/drain regions; and an upper field-effect transistor, on the lower field-effect transistor, including an upper channel structure, an upper gate structure surrounding the upper channel structure, and 3and 4source/drain regions vertically above the 1and 2source/drain regions, respectively, wherein the 1source/drain region is connected to one of a positive voltage source and a negative voltage source, and the 3source/drain region is connected to the other of the positive voltage source and the negative voltage source, and wherein a top portion of the 2source/drain region and a bottom portion the 4source/drain region are connected to each other.
| |
| | | | |
| − | ===CHIP-ON-FILM SEMICONDUCTOR PACKAGE AND DISPLAY APPARATUS INCLUDING THE SAME (18092241)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Seunghyun CHO | | Seunghyun CHO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor package called chip-on-film (COF) that consists of a main film substrate with two or more module attachment regions. Two or more sub-modules are attached to these attachment regions, each consisting of a sub-film substrate and a semiconductor chip mounted on it. Connection conductive layers are provided between the main film substrate and the sub-film substrate to electrically connect them.
| |
| | | | |
| − | '''Abstract'''
| + | ===IMAGE SENSOR ([[US Patent Application 18103582. IMAGE SENSOR simplified abstract|18103582]])=== |
| − | A chip-on-film (COF) semiconductor package includes: a main film substrate having at least two module attachment regions spaced apart from each other; at least two sub-modules respectively attached to the at least two module attachment regions and spaced apart from each other on the main film substrate, wherein each of the at least two sub-modules comprise a sub-film substrate and a semiconductor chip mounted on the sub-film substrate; and at least two connection conductive layers provided between the main film substrate and the sub-film substrate, which is included in each of the at least two sub-modules, and electrically connecting the main film substrate to the at least two sub-modules.
| |
| | | | |
| − | ===IMAGE SENSOR (18103582)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jung Hye KIM | | Jung Hye KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that consists of a first substrate with a photoelectric conversion layer on one side. The sensor also includes multiple pixel regions separated by a pixel isolation pattern. The first pixel region has three transistors that share a common source/drain region within the active region of the substrate.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE, AND IMAGING APPARATUS ([[US Patent Application 17746290. METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE, AND IMAGING APPARATUS simplified abstract|17746290]])=== |
| − | An image sensor is provided. The An image sensor includes: a first substrate including a first side and a second side opposite to each other, and an active region; a plurality of pixel regions, each including a photoelectric conversion layer on the first side of the first substrate; a pixel isolation pattern which separates the plurality of pixel regions from each other and extends along a direction perpendicular to the first side of the first substrate; and a first transistor, a second transistor and a third transistor corresponding to a first pixel region of the plurality of pixel regions. The first transistor, the second transistor and the third transistor share a common source/drain region inside the active region.
| |
| | | | |
| − | ===METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE, AND IMAGING APPARATUS (17746290)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Wenjun WANG | | Wenjun WANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor package and a method of manufacturing it, as well as an imaging apparatus. The method involves preparing a substrate with a first connection region and a sensor chip with a second connection region. Multiple layers of nano low-melting-point metal materials with different melting point gradients are applied as bonding layers on both connection regions. The substrate and sensor chip are then aligned and tightly compressed, forming a composite structure. This structure is treated at a specific temperature, pressure, and with ultrasonic waves to create a eutectic, or a homogeneous mixture of the bonding layers.
| |
| | | | |
| − | '''Abstract'''
| + | ===IMAGE SENSORS INCLUDING NANOROD PIXEL ARRAY, METHODS OF MANUFACTURING IMAGE SENSORS, AND ELECTRONIC DEVICES INCLUDING IMAGE SENSORS ([[US Patent Application 18111375. IMAGE SENSORS INCLUDING NANOROD PIXEL ARRAY, METHODS OF MANUFACTURING IMAGE SENSORS, AND ELECTRONIC DEVICES INCLUDING IMAGE SENSORS simplified abstract|18111375]])=== |
| − | A semiconductor package and a method of manufacturing the same, and an imaging apparatus are provided. The method includes preparing a substrate having a first connection region and a sensor chip having a second connection region. A first bonding layer including multi-layer nano low-melting-point metal materials with different melting point gradients is provided on the first connection region. A second bonding layer including multi-layer nano low-melting-point metal materials with different melting point gradients is provided on the second connection region. The substrate and the sensor chip are overlapped to align and tightly compress the first and second bonding layers, to obtain a composite structure. The composite structure is treated at a temperature of 30 to 180° C., under a pressure of 1 to 8 MPa, and with an ultrasonic of 10 to 30 kHz to form the first and second bonding layers into a eutectic.
| |
| | | | |
| − | ===IMAGE SENSORS INCLUDING NANOROD PIXEL ARRAY, METHODS OF MANUFACTURING IMAGE SENSORS, AND ELECTRONIC DEVICES INCLUDING IMAGE SENSORS (18111375)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jeongyub LEE | | Jeongyub LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that consists of multiple layers of electrodes and a layer of nanorod pixels. Each nanorod pixel is smaller than 1 μm and includes a compound semiconductor. The first pixel in the nanorod array has a first compound semiconductor layer doped with a specific dopant, an undoped second compound semiconductor layer, and a third compound semiconductor layer doped with a different dopant.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME ([[US Patent Application 18056736. SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME simplified abstract|18056736]])=== |
| − | Provided is an image sensor including a plurality of first electrode layers spaced apart from each other, a second electrode layer opposite to the plurality of first electrode layers, and a pixel layer provided between the plurality of first electrode layers and the second electrode layer, the pixel layer including a plurality of nanorod pixels, wherein a size of each nanorod pixel among the plurality of nanorod pixels is less than 1 μm, wherein the plurality of nanorod pixels include a first pixel including a compound semiconductor, and wherein the first pixel includes a first compound semiconductor layer doped with a first dopant, a second compound semiconductor layer that is undoped, and a third compound semiconductor layer doped with a second dopant different from the first dopant.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME (18056736)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Bong Kwan Baek | | Bong Kwan Baek |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes semiconductor devices that have been improved in terms of performance and reliability. The devices consist of various components, including an active pattern, gate structures, a source/drain pattern, a source/drain contact, and a contact liner. The contact liner is a layer that runs along the side of the source/drain contacts.
| |
| | | | |
| − | What sets these devices apart is that the carbon concentration in the contact liner varies at different points along its length. Specifically, the carbon concentration is higher at a second point compared to a first point. Additionally, the first point is located at a lower height from the upper surface of the active pattern compared to the second point. This difference in carbon concentration and height contributes to the improved performance and reliability of the semiconductor devices.
| + | ===SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME ([[US Patent Application 18050684. SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME simplified abstract|18050684]])=== |
| | | | |
| − | '''Abstract'''
| |
| − | Semiconductor devices with improved performance and reliability and methods for forming the same are provided. The semiconductor devices include an active pattern extending in a first direction, gate structures spaced apart from each other in the first direction on the active pattern, a source/drain pattern on the active pattern, a source/drain contact on the source/drain pattern, and a contact liner extending along a sidewall of the source/drain contacts. A carbon concentration of the contact liner at a first point of the contact liner is different from a carbon concentration of the contact liner at a second point of the contact liner, and the first point is at a first height from an upper surface of the active pattern, the second point is at a second height from the upper surface of the active pattern, and the first height is smaller than the second height.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME (18050684)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Namkyu CHO | | Namkyu CHO |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of a substrate with a first active pattern. On top of this pattern, there is a first channel pattern, which includes three semiconductor patterns stacked vertically and spaced apart. These patterns are connected to a first source/drain pattern and have a gate electrode on top. The first source/drain pattern has three protrusions, each protruding towards one of the semiconductor patterns. The second protrusion is wider than the first, and the third protrusion is wider than the second.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18201308. SEMICONDUCTOR DEVICE simplified abstract|18201308]])=== |
| − | A semiconductor device includes a substrate including a first active pattern, a first channel pattern on the first active pattern, the first channel pattern including first, second, and third semiconductor patterns spaced apart from one another and vertically stacked, a first source/drain pattern connected to the first to third semiconductor patterns, and a gate electrode on the first to third semiconductor patterns. The first source/drain pattern includes a first protrusion protruding toward the first semiconductor pattern, a second protrusion protruding toward the second semiconductor pattern, and a third protrusion protruding toward the third semiconductor pattern. A width of the second protrusion is greater than a width of the first protrusion. A width of the third protrusion is greater than the width of the second protrusion.
| + | |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18201308)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Ryong HA | | Ryong HA |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device that includes various components such as an active pattern, a channel pattern, a source/drain pattern, a gate electrode, and a gate spacer. The device is designed in a way that allows for efficient operation and improved performance. One notable feature is the use of curved surfaces in the buffer layer of the source/drain pattern, which helps optimize the interaction between different components of the device.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18189621. SEMICONDUCTOR DEVICE simplified abstract|18189621]])=== |
| − | A semiconductor device including an active pattern extending in a first direction; a channel pattern on the active pattern and including vertically stacked semiconductor patterns; a source/drain pattern in a recess in the active pattern; a gate electrode on the active pattern and extending in a second direction crossing the first direction, the gate electrode surrounding a top surface, at least one side surface, and a bottom surface of each of the semiconductor patterns; and a gate spacer covering a side surface of the gate electrode and having an opening to the semiconductor patterns, wherein the source/drain pattern includes a buffer layer covering inner sides of the recess, the buffer layer includes an outer side surface and an inner side surface, which are opposite to each other, and each of the outer and inner side surfaces is a curved surface that is convexly curved toward a closest gate electrode.
| + | |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18189621)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Sungil Park | | Sungil Park |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of a semiconductor body with two surfaces. The body includes different regions with varying conductivity types. There is a first well region with one conductivity type, and two other well regions with the opposite conductivity type, separated by the first well region. The first well region also contains several doped regions that are spaced apart from each other in a different direction. Additionally, there are two other doped regions adjacent to the second and third well regions. The second surface of the semiconductor body includes the bottom surfaces of all these regions.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18204550. SEMICONDUCTOR DEVICE simplified abstract|18204550]])=== |
| − | A semiconductor device includes a semiconductor body having first and second surfaces opposite to each other. The semiconductor body includes a first well region having a first conductivity type, second and third well regions spaced apart from each other in a first direction with the first well region interposed therebetween and having a second conductivity type, first doped regions spaced apart from each other in a second direction intersecting the first direction in the first well region, a second doped region, which is adjacent to the second well region and has the second conductivity type, and a third doped region, which is adjacent to the third well region and has the second conductivity type. The second surface of the semiconductor body includes bottom surfaces of the first to third well regions, the plurality of first doped regions, the second doped region, and the third doped region.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18204550)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sungmin KIM | | Sungmin KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device and a method of manufacturing it. The device consists of a first semiconductor pattern on a substrate, which has a lower channel. On top of the first semiconductor pattern, there is a second semiconductor pattern that is spaced apart from the first pattern in a vertical direction. The second pattern has an upper channel that extends vertically. The device also includes a gate electrode that covers the lower channel and surrounds the upper channel. Additionally, there are source/drain patterns on opposite sides of the upper channel. The substrate and the first semiconductor pattern have a doping concentration of 10/cm or less.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRODE STRUCTURE AND METHOD OF MANUFACTURING THE SAME, AND SECONDARY BATTERY INCLUDING THE ELECTRODE STRUCTURE ([[US Patent Application 18210170. ELECTRODE STRUCTURE AND METHOD OF MANUFACTURING THE SAME, AND SECONDARY BATTERY INCLUDING THE ELECTRODE STRUCTURE simplified abstract|18210170]])=== |
| − | A semiconductor device and a method of manufacturing a semiconductor device, the device including a first semiconductor pattern on a substrate, the first semiconductor pattern including a lower channel; a second semiconductor pattern on the first semiconductor pattern and spaced apart from the first semiconductor pattern in a vertical direction, the second semiconductor pattern including an upper channel extending in the vertical direction; a gate electrode covering the lower channel and surrounding the upper channel; and source/drain patterns on opposite sides of the upper channel, wherein the substrate and the first semiconductor pattern have a doping concentration of 10/cm or less.
| |
| | | | |
| − | ===ELECTRODE STRUCTURE AND METHOD OF MANUFACTURING THE SAME, AND SECONDARY BATTERY INCLUDING THE ELECTRODE STRUCTURE (18210170)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hwiyeol PARK | | Hwiyeol PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electrode structure that consists of a base layer and multiple active material plates. The base layer contains a first active material, while the active material plates on the surface of the base layer are made of a second active material. The active material density in the base layer is lower than the active material density in the active material plates.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE COMPRISING AN ANTENNA ([[US Patent Application 18210975. ELECTRONIC DEVICE COMPRISING AN ANTENNA simplified abstract|18210975]])=== |
| − | An electrode structure includes a base layer including a first active material, and a plurality of active material plates on a first surface of the base layer and spaced apart from one another, the plurality of active material plates including a second active material. An active material density of the base layer is less than an active material density of an active material plate of the plurality of active material plates.
| |
| | | | |
| − | ===ELECTRONIC DEVICE COMPRISING AN ANTENNA (18210975)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jongmin KIM | | Jongmin KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that includes a camera module, a metal structure, two antennas, a switching module, and at least one processor. The switching module adjusts the impedance of the device using a lumped element, and the processor controls the switching module. The device can transmit signals in a specific frequency band and connect the metal structure to the ground when the transmission power reaches a certain level.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE USING HINGE STRUCTURE AS ANTENNA ([[US Patent Application 18328176. ELECTRONIC DEVICE USING HINGE STRUCTURE AS ANTENNA simplified abstract|18328176]])=== |
| − | An electronic device according to an embodiment may include a camera module, a metal structure, a first antenna adjacent to the camera module, a second antenna spaced from the camera module, a switching module electrically connected to the metal structure, including at least one lumped element, and adjusting an impedance by using the at least one lumped element, and at least one processor. The at least one processor is configured to transmit a signal in a first frequency band by feeding the first antenna and control the switching module such that the switching module has a first impedance corresponding to the first frequency band and electrically connects the metal structure and the ground when the transmission power of the first antenna is equal to or more than the designated value.
| |
| | | | |
| − | ===ELECTRONIC DEVICE USING HINGE STRUCTURE AS ANTENNA (18328176)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Kyungmoon SEOL | | Kyungmoon SEOL |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a housing with a hinge. The hinge includes a conductive portion that is electrically connected to at least one of the frames of the housing. The device also has a wireless communication circuit. In the first state, the wireless circuit transmits or receives a signal of a specific frequency band using the conductive portions of both frames. In the second state, the wireless circuit uses the conductive portion of the hinge along with the conductive portions of the frames to transmit or receive the same signal.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE COMPRISING ANTENNA ([[US Patent Application 18335760. ELECTRONIC DEVICE COMPRISING ANTENNA simplified abstract|18335760]])=== |
| − | An electronic device is provided, The electronic device includes a housing, a hinge including a conductive portion, at least one contact electrically connecting the conductive portion and at least one of a first frame and second frame of the housing, and a wireless communication circuit. The first frame includes a first conductive portion. The second frame includes a second conductive portion. In a first state, the wireless communication circuit at least one of transmits or receives a signal of a first frequency band, based on the first conductive portion and the second conductive portion. In a second state, the wireless communication circuit at least one of transmits or receives the signal of the first frequency band, based on the first conductive portion and the conductive portion.
| |
| | | | |
| − | ===ELECTRONIC DEVICE COMPRISING ANTENNA (18335760)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jaewoong JEON | | Jaewoong JEON |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that consists of two printed circuit boards (PCBs) separated by an interposer. The interposer acts as a shield for electronic components and is made up of a conductive ground portion and a non-conductive portion with a dielectric material. The second PCB is connected to an antenna through a conductive connecting member, and the first PCB is connected to a wireless communication circuit. The wireless communication circuit enables the device to transmit and receive signals within a specific frequency band by providing power to the antenna through the conductive via.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC APPARATUS COMPRISING ANTENNA ([[US Patent Application 18201382. ELECTRONIC APPARATUS COMPRISING ANTENNA simplified abstract|18201382]])=== |
| − | An electronic device according to various embodiments comprises: a first printed circuit board (PCB); a second PCB disposed to be spaced apart from the first PCB; an interposer encompassing the space between the first PCB and the second PCB; an antenna; a conductive connecting member comprising a conductive material electrically connecting the second PCB and the antenna; and a wireless communication circuit electrically connected to the first PCB, wherein the interposer includes a ground portion configured to provide shielding for least one electronic component disposed in the electronic device, and a non-conductive portion positioned to be adjacent the ground portion and including a dielectric material, the non-conductive portion of the interposer includes a conductive via configured to connect the first PCB and the second PCB, and the wireless communication circuit is configured to transmit and/or receive a signal having a designated frequency band by feeding electricity to the antenna through the conductive via.
| |
| | | | |
| − | ===ELECTRONIC APPARATUS COMPRISING ANTENNA (18201382)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sungsoo KIM | | Sungsoo KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device with a flexible display and a key button. The key button is located in a specific area on one side of the device and includes a protrusion that extends inward. The device also has a housing, consisting of a first part, a second part, and a connection part between them. The second part is rotatable and connected to the first part. Inside the first part, there is an antenna structure that includes a dome switch positioned above a substrate, corresponding to the protrusion of the key button. The substrate has a conductive layer with multiple conductive patches. The dome switch is placed between these conductive patches.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD FOR CONTROLLING BEAM USING LENS IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18335517. METHOD FOR CONTROLLING BEAM USING LENS IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18335517]])=== |
| − | An electronic apparatus having a housing, a flexible display, and a key button which is arranged in a first area on a side of a first part is provided. The key button includes at least one protrusion extending toward the inside of the first part and an antenna structure arranged on the inside of the first part with respect to the first area. The housing includes the first part, a second part, and a connection part arranged between the first part and the second part, the second part being rotatably coupled to the first part through the connection part. The antenna structure includes a dome switch arranged above a substrate at a position corresponding to the at least one protrusion, and a plurality of conductive patches provided on a conductive layer of the substrate. The dome switch may be arranged at the corresponding position between the plurality of conductive patches.
| + | |
| | | | |
| − | ===METHOD FOR CONTROLLING BEAM USING LENS IN WIRELESS COMMUNICATION SYSTEM (18335517)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Seungtae KO | | Seungtae KO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a beamforming device used in wireless communication systems. This device includes a phased array antenna, wireless communication circuit, and a lens. The lens has two surfaces, one facing the antenna and the other facing the opposite direction. When a beam is emitted from the antenna, it passes through a point on the first surface of the lens and is refracted, forming a path inside the lens. The beam then passes through the inside of the lens and is refracted again at a point on the second surface. The angle of refraction at this second point can be adjusted based on the radiation angle of the beam.
| |
| | | | |
| − | '''Abstract'''
| + | ===CONNECTOR INCLUDING CONTACT POINT STRUCTURE ([[US Patent Application 18336272. CONNECTOR INCLUDING CONTACT POINT STRUCTURE simplified abstract|18336272]])=== |
| − | A beamforming device in a wireless communication system is provided that includes a phased array antenna, at least one wireless communication circuit, and a lens, wherein the lens comprises a first surface oriented in a first direction, which is the direction toward the phased array antenna, and a second surface oriented in a second direction, which is the opposite direction of the first direction, and a first beam radiated from the phased array antenna is refracted after passing through a first point on the first surface, and forms a first path inside the lens and forms a second path along which the first beam is refracted at a second point on the second surface after passing through the inside of the lens along the first path, wherein the refraction angle at the second point may be formed so as to be dependent on the radiation angle of the first beam.
| + | |
| | | | |
| − | ===CONNECTOR INCLUDING CONTACT POINT STRUCTURE (18336272)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Heekang YUN | | Heekang YUN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a connector with a housing and an accommodation groove. The connector also includes a guide with a first guide and a second guide, which are spaced apart. A first contact is positioned between the first and second guides and has a first bending portion and a second bending portion. The guide is in contact with a header and helps guide its position. The first bending portion applies pressure to the header, fixing it to the connector. The second bending portion may be in contact with the first bending portion. The abstract suggests that there are other possible embodiments of the connector.
| |
| | | | |
| − | '''Abstract'''
| + | ===DEVICE AND METHOD PROVIDING FEEDBACK IN WIRELESS POWER TRANSFER ([[US Patent Application 18126657. DEVICE AND METHOD PROVIDING FEEDBACK IN WIRELESS POWER TRANSFER simplified abstract|18126657]])=== |
| − | A connector according to various embodiments of the present disclosure comprises: a housing; an accommodation groove formed in one portion of the connector; a guide comprising a first guide firmed on the side surface of the accommodation groove and a second guide formed on the side surface of the accommodation groove to be spaced a certain distance from the first guide; and a first contact arranged between the first guide and the second guide, wherein the first contact comprises a first bending portion and a second bending portion. The guide is in contact with a header and guides the position of the header. A first point of the first bending portion is in contact with the header, and as the first bending portion is bent, the first bending portion applies the pressure to the header so that the header is fixed to the connector. A second point of the first bending portion may be in contact with a third point of the second bending portion. Other various embodiments are possible.
| |
| | | | |
| − | ===DEVICE AND METHOD PROVIDING FEEDBACK IN WIRELESS POWER TRANSFER (18126657)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | HYUNSU KIM | | HYUNSU KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a system where a first device can wirelessly receive power from a second device. The second device has a resonance circuit with a specific frequency. The first device has its own resonance circuit with the same frequency, a capacitor connected to the resonance circuit, a rectifier to convert the alternating current (AC) voltage at the resonance frequency, and a control circuit connected to the capacitor. The control circuit determines a specific period based on feedback information to be sent to the second device. During normal operation, the control circuit applies a first voltage and then a higher second voltage to the capacitor for this specific period.
| |
| | | | |
| − | '''Abstract'''
| + | ===MOTOR AND CLEANER HAVING THE SAME ([[US Patent Application 18209597. MOTOR AND CLEANER HAVING THE SAME simplified abstract|18209597]])=== |
| − | A first device wirelessly receives power from a second device including a second resonance circuit having a resonance frequency. The first device includes: a first resonance circuit having the resonance frequency, a first capacitor connected to the first resonance circuit at a first node, a rectifier configured to rectify an alternating current (AC) voltage apparent at a first node and oscillating at the resonance frequency, and a control circuit connected to the first capacitor, and configured to determine a first period based on feedback information to be provided to the second device, and alternately apply a first voltage and a second voltage higher than the first voltage to the first capacitor for the first period during a normal output mode.
| |
| | | | |
| − | ===MOTOR AND CLEANER HAVING THE SAME (18209597)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Woong HWANG | | Woong HWANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a motor and a cleaner that both contain the same motor. The motor consists of a stator (which includes a stator core), a rotating shaft, and a rotor. The rotor can rotate around the shaft by interacting with the stator through electromagnetic forces. The motor is housed in a housing, and there is a bearing that supports the rotation of the rotor while the stator and rotor are inside the housing. The bearing is connected to a frame, which is positioned in the housing and is in contact with the stator core and the bearing, allowing them to be electrically connected.
| |
| | | | |
| − | '''Abstract'''
| + | ===DC-TO-DC CONVERTER WITH PULSE SKIPPING FUNCTION AND ON-TIME CONTROL FUNCTION, AND ELECTRONIC DEVICES INCLUDING THE SAME ([[US Patent Application 18151115. DC-TO-DC CONVERTER WITH PULSE SKIPPING FUNCTION AND ON-TIME CONTROL FUNCTION, AND ELECTRONIC DEVICES INCLUDING THE SAME simplified abstract|18151115]])=== |
| − | A motor and a cleaner including the same where the motor includes a stator including a stator including a stator core, a rotating shaft arrangeable inside of the stator, a rotor rotatable about the rotating shaft by electromagnetically interacting with the stator while the rotating shaft is arranged inside the stator, a housing to accommodate the stator and the rotor, a bearing coupleable to the housing so that while the bearing is coupled to the housing, the bearing supports a rotation of the rotor about the rotating shaft while the stator and the rotor are stably accommodated in the housing and a frame to support the bearing in the housing, the frame being positioned in the housing to be in contact with the stator core and the bearing to allow the stator core and the bearing to be electrically connected.
| |
| | | | |
| − | ===DC-TO-DC CONVERTER WITH PULSE SKIPPING FUNCTION AND ON-TIME CONTROL FUNCTION, AND ELECTRONIC DEVICES INCLUDING THE SAME (18151115)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Dam YUN | | Dam YUN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a DC-to-DC converter that converts a DC voltage from a power line to a desired output voltage. The converter includes two switching circuits that are controlled by pulse control signals. The first switching circuit is connected between the power line and the output terminal, while the second switching circuit is connected between the output terminal and ground.
| |
| | | | |
| − | The converter also includes a pulse control signal generation circuit that receives two voltage levels: a first level associated with the output voltage and a second level of a reference voltage. If the second level is higher than the first level, the pulse control signal generation circuit generates a first pulse control signal to increase the output voltage. On the other hand, if the second level is lower than the first level, the circuit generates a second pulse control signal.
| + | ===COMMUNICATION CIRCUIT INCLUDING AMPLIFIER MODULE, AND ELECTRONIC DEVICE COMPRISING SAME ([[US Patent Application 18334717. COMMUNICATION CIRCUIT INCLUDING AMPLIFIER MODULE, AND ELECTRONIC DEVICE COMPRISING SAME simplified abstract|18334717]])=== |
| | | | |
| − | In summary, the DC-to-DC converter adjusts the output voltage based on the comparison between the reference voltage and the output voltage, using pulse control signals to control the switching circuits.
| |
| | | | |
| − | '''Abstract''' | + | '''Main Inventor''' |
| − | Disclosed is a DC-to-DC converter which includes a first switching circuit connected between a power line receiving a DC voltage and an output terminal of the DC-to-DC converter and switched based on a first pulse control signal, a second switching circuit connected between the output terminal and a ground and switched based on a second pulse control signal, a pulse control signal generation circuit that receives a first level of a first voltage associated with an output voltage and a second level of a first reference voltage, wherein, in response to the second level being higher than the first level, the pulse control signal generation circuit is configured to generate the first pulse control signal to increase the output voltage and wherein, in response to the second level being lower than the first level, the pulse control signal generation circuit is configured to generate the second pulse control signal.
| |
| | | | |
| − | ===COMMUNICATION CIRCUIT INCLUDING AMPLIFIER MODULE, AND ELECTRONIC DEVICE COMPRISING SAME (18334717)===
| + | John MOON |
| | | | |
| − | '''Inventor'''
| |
| − | John MOON
| |
| | | | |
| − | '''Brief explanation'''
| + | ===APPARATUS AND METHOD FOR AMPLIFYING TRANSMISSION/RECEPTION SIGNAL AND CONTROLLING PHASE OF TRANSMISSION/RECEPTION SIGNAL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18210433. APPARATUS AND METHOD FOR AMPLIFYING TRANSMISSION/RECEPTION SIGNAL AND CONTROLLING PHASE OF TRANSMISSION/RECEPTION SIGNAL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18210433]])=== |
| − | The abstract describes a communication circuit and an electronic device that includes the communication circuit. The communication circuit consists of an amplifier module with a first amplifier and a second amplifier to amplify a signal. There is also a first matching circuit located outside the amplifier module that performs impedance matching between the first and second amplifiers. The amplifier module has a first terminal to output the amplified signal and a second terminal for inputting a signal to the second amplifier. The first matching circuit can be connected to the amplifier module through the first and second terminals.
| |
| | | | |
| − | '''Abstract'''
| |
| − | A communication circuit and an electronic device comprising the communication circuit are provided. The communication circuit includes an amplifier module including a first amplifier and a second amplifier for amplifying a signal amplified by the first amplifier, and a first matching circuit that is disposed outside the amplifier module and performs impedance matching between the first amplifier and the second amplifier, wherein the amplifier module includes a first terminal for outputting, to the outside, the signal amplified by the first amplifier, and a second terminal for a signal that is input to the second amplifier, and the first matching circuit may be connected to the amplifier module via the first terminal and the second terminal.
| |
| | | | |
| − | ===APPARATUS AND METHOD FOR AMPLIFYING TRANSMISSION/RECEPTION SIGNAL AND CONTROLLING PHASE OF TRANSMISSION/RECEPTION SIGNAL IN WIRELESS COMMUNICATION SYSTEM (18210433)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Jinhyun KIM | | Jinhyun KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication system, specifically a 5G or pre-5G system, that supports higher data transmission rates compared to 4G systems like LTE. The system includes an apparatus with two amplifier units. The first amplifier unit uses a common source structure, has cross-coupled capacitors, and amplifies an input signal. The second amplifier unit uses a common gate structure, is connected to the first amplifier unit, and amplifies the signal output from the first amplifier unit. The second amplifier unit has four input units, and two of these input units can be connected to the first amplifier unit.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE FOR PERFORMING COMMUNICATION USING MULTIPLE FREQUENCY BANDS AND OPERATION METHOD OF ELECTRONIC DEVICE ([[US Patent Application 18201280. ELECTRONIC DEVICE FOR PERFORMING COMMUNICATION USING MULTIPLE FREQUENCY BANDS AND OPERATION METHOD OF ELECTRONIC DEVICE simplified abstract|18201280]])=== |
| − | The present disclosure relates to a 5generation (5G) or pre-5G communication system for supporting higher data transmission rates than 4generation (4G) communication systems such as long-term evolution (LTE). In a wireless communication system, an apparatus comprises: a first amplifier unit that has a common source structure, includes cross-coupled capacitors, and amplifies an input signal; and a second amplifier unit that has a common gate structure, is connected to the first amplifier unit, and amplifies the signal output from the first amplifier unit, wherein the second amplifier unit includes a first input unit, a second input unit, a third input unit, and a fourth input unit, and two input units among the first input unit, the second input unit, the third input unit, and the fourth input unit may be connected to the first amplifier unit.
| |
| | | | |
| − | ===ELECTRONIC DEVICE FOR PERFORMING COMMUNICATION USING MULTIPLE FREQUENCY BANDS AND OPERATION METHOD OF ELECTRONIC DEVICE (18201280)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | John MOON | | John MOON |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for operating an electronic device. It involves measuring the strength of signals in different frequency bands and mapping these measurements to specific voltage magnitudes. The method then controls a power supply circuit to apply the appropriate voltage magnitudes to amplifiers in the device.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE FOR CONTROLLING PHASE DIFFERENCE OF POWER PROVIDED TO RECTIFIER, AND METHOD FOR CONTROLLING SAME ([[US Patent Application 18335015. ELECTRONIC DEVICE FOR CONTROLLING PHASE DIFFERENCE OF POWER PROVIDED TO RECTIFIER, AND METHOD FOR CONTROLLING SAME simplified abstract|18335015]])=== |
| − | In certain embodiments, a method of operating an electronic device, comprises: identifying strength of a signal within a first frequency band and strength of a signal within a second frequency band when operating in a mode of transmitting a signal within the first frequency band and a signal within the second frequency band; identifying first magnitudes of voltages based on mapping data in a memory, wherein the mapping data maps first magnitudes of the voltages according to strength of signal within the first frequency band and second magnitudes of the voltages according to strength of signal within the second frequency band, and the identified strength of the signal within the first frequency band; identifying the second magnitudes of the voltages based on the identified strength of the signal within the second frequency band and the mapping data; when there are identical magnitude of voltages among the first magnitudes of voltages applicable and the second magnitudes of voltages, controlling a power supply circuit to apply the identical magnitude of voltages to a first amplifier and/or a second amplifier. | + | |
| | | | |
| − | ===ELECTRONIC DEVICE FOR CONTROLLING PHASE DIFFERENCE OF POWER PROVIDED TO RECTIFIER, AND METHOD FOR CONTROLLING SAME (18335015)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Chongmin LEE | | Chongmin LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that can receive power wirelessly. It includes a resonance circuit with a battery, coil, and capacitor, which receives alternating current power. This power is then rectified into direct current power by a rectifying circuit with multiple transistors. The device also has a control circuit that identifies the phase difference between the voltage and current of the received power and adjusts the bias voltage of the transistors to ensure impedance matching. This helps optimize the power transfer between the device and the external electronic device providing the power.
| |
| | | | |
| − | '''Abstract'''
| + | ===INFORMATION SHARING FOR BEAM MANAGEMENT IN REPEATER ([[US Patent Application 18110178. INFORMATION SHARING FOR BEAM MANAGEMENT IN REPEATER simplified abstract|18110178]])=== |
| − | An electronic device may include: a resonance circuit including a battery, a coil, and a capacitor, and configured to receive power wirelessly; a rectifying circuit including multiple transistors, and configured to rectify alternating current power provided from the resonance circuit into direct current power; and a control circuit, wherein the control circuit is configured to: identify a difference between the phase of voltage and the phase of current of the alternating current power provided from the resonance circuit during wireless reception of power from an external electronic device; and perform impedance matching by controlling the bias voltage of at least one of the multiple transistors on the basis that the difference between the phase of voltage and the phase of current satisfies a designated condition.
| + | |
| | | | |
| − | ===INFORMATION SHARING FOR BEAM MANAGEMENT IN REPEATER (18110178)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Mohamed Mokhtar Gaber Moursi AWADIN | | Mohamed Mokhtar Gaber Moursi AWADIN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for a repeater to determine an access link beam. The repeater receives information from a base station, which includes beam indices and the corresponding time to use a specific beam. The repeater then transmits at least one resource set using the indicated beam.
| |
| | | | |
| − | '''Abstract'''
| + | ===LINK ADAPTATION METHOD AND DEVICE FOR DYNAMIC TIME DIVISION DUPLEX IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18208065. LINK ADAPTATION METHOD AND DEVICE FOR DYNAMIC TIME DIVISION DUPLEX IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18208065]])=== |
| − | Disclosed is a method of determining an access link beam by a repeater, including receiving, from a base station, an indication of beam indices including an indicated beam and a corresponding time to apply the indicated beam and transmitting at least one resource set using the indicated beam.
| |
| | | | |
| − | ===LINK ADAPTATION METHOD AND DEVICE FOR DYNAMIC TIME DIVISION DUPLEX IN WIRELESS COMMUNICATION SYSTEM (18208065)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Youngmin JEONG | | Youngmin JEONG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication system, specifically 5G or pre-5G, that is capable of transmitting data at higher rates compared to 4G systems like LTE. The method involves a first base station in the system identifying the signal-to-interference-noise ratio (SINR) based on channel state information received from a terminal. It then determines the modulation and coding scheme (MCS) based on the SINR and information about the link direction from a second base station. Finally, the first base station transmits information to the terminal indicating the MCS to be used.
| |
| | | | |
| − | '''Abstract'''
| + | ===APPARATUS AND METHOD WITH HOMOMORPHIC ENCRYPTION OPERATION ([[US Patent Application 18070846. APPARATUS AND METHOD WITH HOMOMORPHIC ENCRYPTION OPERATION simplified abstract|18070846]])=== |
| − | The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting higher data transmission rates than 4th generation (4G) communication systems such as long term evolution (LTE). A method performed by a first base station in a wireless communication system includes: identifying a first signal-to-interference-noise ratio (SINR), based on channel state information received from a terminal; identifying a modulation and coding scheme (MCS), based on the first SINR and information on a link direction of a second base station; and transmitting information indicating the MCS to the terminal.
| + | |
| | | | |
| − | ===APPARATUS AND METHOD WITH HOMOMORPHIC ENCRYPTION OPERATION (18070846)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Ahmet Can MERT | | Ahmet Can MERT |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an apparatus and method that use homomorphic encryption. The apparatus includes a processor and memory. The processor is configured to generate split polynomials from a ciphertext, which is a representation of a polynomial with a certain degree. The split polynomials have a lower degree than the original polynomial. The processor then performs element-wise operations on the split polynomials to generate partial operation results. Finally, the processor combines these partial operation results to obtain a homomorphic encryption operation result corresponding to the original ciphertext.
| |
| | | | |
| − | '''Abstract'''
| + | ===SYSTEMS, METHODS AND DEVICES FOR JOINT CALIBRATION OF TRANSMIT AND RECEIVE IQ MISMATCH ([[US Patent Application 18209473. SYSTEMS, METHODS AND DEVICES FOR JOINT CALIBRATION OF TRANSMIT AND RECEIVE IQ MISMATCH simplified abstract|18209473]])=== |
| − | An apparatus and method with homomorphic encryption are included. An apparatus includes a processor configured to, and/or coupled with a memory storing instructions to configure the processor to: generate, from a ciphertext corresponding to a polynomial having a first degree for performing a homomorphic encryption operation, split polynomials having a second degree by factorizing the polynomial, wherein the split polynomials have a second degree that is less than the first degree, generate partial operation results by performing an element-wise operation using the split polynomials, and generate a homomorphic encryption operation result corresponding to the ciphertext by joining the partial operation results.
| + | |
| | | | |
| − | ===SYSTEMS, METHODS AND DEVICES FOR JOINT CALIBRATION OF TRANSMIT AND RECEIVE IQ MISMATCH (18209473)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Elina NAYEBI | | Elina NAYEBI |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for compensating for IQ mismatch (IQMM) in a transceiver. IQMM refers to the difference in the In-phase (I) and Quadrature-phase (Q) components of a signal. The method involves sending signals from a transmit path through a loopback path and introducing a phase shift using a phase shifter. The received signals in the receive path are then used to estimate the IQMM, including the phase shift. These estimates are used to compensate for the IQMM. The method also involves processing the received signals based on frequency-dependent IQMM parameters to obtain more accurate estimates.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE FOR RECOGNIZING COVER DEVICE AND OPERATION METHOD THEREOF ([[US Patent Application 18210465. ELECTRONIC DEVICE FOR RECOGNIZING COVER DEVICE AND OPERATION METHOD THEREOF simplified abstract|18210465]])=== |
| − | A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.
| |
| | | | |
| − | ===ELECTRONIC DEVICE FOR RECOGNIZING COVER DEVICE AND OPERATION METHOD THEREOF (18210465)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Kihun EOM | | Kihun EOM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that has a magnetic sensor and a communication module. The device also has a processor that is connected to the magnetic sensor and the communication module. The processor is programmed to detect a magnetic signal through the magnetic sensor and determine if the signal is generated by attaching a cover device to the electronic device. If it is determined that the signal is from the cover device, the processor will correct the data from the magnetic sensor.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE FOR PROVIDING VIDEO CONFERENCE, AND METHOD THEREFOR ([[US Patent Application 18332256. ELECTRONIC DEVICE FOR PROVIDING VIDEO CONFERENCE, AND METHOD THEREFOR simplified abstract|18332256]])=== |
| − | An electronic device includes: a magnetic sensor; a communication module; at least one processor operatively connected with the magnetic sensor and the communication module. The at least one processor is configured to: identify that a magnetic signal is detected through the magnetic sensor; identify, based on a magnitude of the detected magnetic signal, whether the magnetic signal is generated by coupling the electronic device with a cover device; and based on identifying that the magnetic signal is generated by coupling the electronic device with the cover device, correct sensor data of the magnetic sensor.
| |
| | | | |
| − | ===ELECTRONIC DEVICE FOR PROVIDING VIDEO CONFERENCE, AND METHOD THEREFOR (18332256)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hoyoung SEOC | | Hoyoung SEOC |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a communication module, a display module, and a processor. The device can establish a connection with other electronic devices, display images, and perform various functions. Specifically, it can transmit an image to other devices, display the image on its own display, select a specific area of the image, generate a new image with a contour of that area and dividing lines, transmit the new image to other devices, and display the new image on its own display.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF ([[US Patent Application 18208150. ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF simplified abstract|18208150]])=== |
| − | An electronic device is provided. The electronic device incudes a communication module which establishes a communication connection with at least one external electronic device, a display module, and a processor operatively connected to the communication module and the display module. The processor is configured to transmit a first image to the at least one external electronic device by using the communication module, output the first image to the display module, select a first area, which is at least a partial area of the output first image, generate a second image including a contour of the first area and at least one line dividing the first area into a plurality of second areas, transmit the second image to the at least one external electronic device, and output the second image to the display module.
| |
| | | | |
| − | ===ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF (18208150)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Kyunghwa JUNG | | Kyunghwa JUNG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a control method for an electronic device. The method involves determining if an external device is within a certain distance from the electronic device. If the external device is within this distance, the method obtains information about the distance between the two devices. Based on this distance information, a standby time is determined. Once this standby time has elapsed, the electronic device establishes a connection with the external device.
| |
| | | | |
| − | '''Abstract'''
| + | ===Encoding Depth Information for Images ([[US Patent Application 17897555. Encoding Depth Information for Images simplified abstract|17897555]])=== |
| − | A control method of an electronic apparatus includes identifying whether an external device is located within a reference radius of the electronic apparatus; based on the external device being located within the reference radius, obtaining distance information between the identified external device and the electronic apparatus; identifying a standby time based on the distance information; and based on the standby time elapsing, performing connection with the external device.
| |
| | | | |
| − | ===Encoding Depth Information for Images (17897555)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Aamer Khani | | Aamer Khani |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method for encoding depth information in three-dimensional content for transmission. The method involves accessing the depth information, which is encoded based on a near-plane value and a far-plane value. The method also involves accessing adjusted near-plane and far-plane values, which are determined based on a loss function with respect to the depth information. Finally, the depth information is encoded for transmission using the adjusted near-plane and far-plane values.
| |
| | | | |
| − | '''Abstract'''
| + | ===ENCODING METHOD AND APPARATUS THEREFOR, AND DECODING METHOD AND APPARATUS THEREFOR ([[US Patent Application 18328481. ENCODING METHOD AND APPARATUS THEREFOR, AND DECODING METHOD AND APPARATUS THEREFOR simplified abstract|18328481]])=== |
| − | In one embodiment, a method includes accessing depth information for three-dimensional content for one or more images, the depth information having been encoded based on a first near-plane value and a first far-plane value. The method further includes accessing an adjusted near-plane value and an adjusted far-plane value, where the adjusted near-plane value and the adjusted far-plane value are based on a loss function with respect to the depth information; and encoding the depth information for transmission using the adjusted near-plane value and the adjusted far-plane value.
| |
| | | | |
| − | ===ENCODING METHOD AND APPARATUS THEREFOR, AND DECODING METHOD AND APPARATUS THEREFOR (18328481)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Narae CHOI | | Narae CHOI |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for decoding video. It involves obtaining information about the type of prediction used for a specific block in the video. Based on this information, the method determines the appropriate interpolation filter to be used for predicting the block. It also determines the reference location to which the current sample of the block refers, and selects the corresponding interpolation filter from a set. Using the reference samples and the interpolation filter, the method calculates a prediction value for the current sample. Finally, the method reconstructs the block using the prediction value.
| |
| | | | |
| − | '''Abstract'''
| + | ===DISPLAY DEVICE AND OPERATION METHOD THEREOF ([[US Patent Application 18327570. DISPLAY DEVICE AND OPERATION METHOD THEREOF simplified abstract|18327570]])=== |
| − | Provided is a video decoding method including: obtaining, from a bitstream, intra prediction mode information indicating an intra prediction mode of a current block; determining an interpolation filter set to be used in prediction of the current block, based on at least one of a size of the current block and the intra prediction mode indicated by the intra prediction mode information; determining a reference location to which a current sample of the current block refers according to the intra prediction mode; determining, in the interpolation filter set, an interpolation filter that corresponds to the reference location; determining a prediction value of the current sample, according to reference samples of the current block and the interpolation filter; and reconstructing the current block, based on the prediction value of the current sample.
| |
| | | | |
| − | ===DISPLAY DEVICE AND OPERATION METHOD THEREOF (18327570)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Nayoung KIM | | Nayoung KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a display device that can detect gestures made by a user while watching video content. The device includes a display, an image input unit to obtain the video content, a detector with sensors, and a processor. The processor can detect the user's gesture using the sensors and control the video playback to display frames corresponding to the detected gesture on the display.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE AND METHOD PROVIDING CONTENT ASSOCIATED WITH IMAGE TO APPLICATION ([[US Patent Application 18208720. ELECTRONIC DEVICE AND METHOD PROVIDING CONTENT ASSOCIATED WITH IMAGE TO APPLICATION simplified abstract|18208720]])=== |
| − | A display device may include: a display; an image input unit configured to obtain video content; a detector including at least one sensor; and a processor which may be configured to execute at least one instruction. The processor may be configured to, by executing the at least one instruction, detect a gesture of a user based on a result of detection by the at least one sensor while the video content is reproduced, and control the reproduction of the video content such that at least one frame corresponding to the detected gesture among a plurality of frames included in the video content is displayed on the display.
| |
| | | | |
| − | ===ELECTRONIC DEVICE AND METHOD PROVIDING CONTENT ASSOCIATED WITH IMAGE TO APPLICATION (18208720)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Seunghwan JEONG | | Seunghwan JEONG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that includes a camera, memory, display, and processor. The processor is programmed to perform certain functions when a camera application is executed. It can identify specific images taken within a certain range from the device's location, based on location information stored in the memory or an external device. It can then select certain images based on their priority. While displaying a preview image from the camera on the device's display, it can overlay a visual object containing thumbnail images corresponding to the selected images on top of the preview image.
| |
| | | | |
| − | '''Abstract'''
| + | ===IMAGE SENSORS INCLUDING PHASE DETECTION PIXEL ([[US Patent Application 18336495. IMAGE SENSORS INCLUDING PHASE DETECTION PIXEL simplified abstract|18336495]])=== |
| − | An electronic device according to various embodiments includes a camera, a memory, a display, and a processor. The processor is configured to: based on an input for executing a camera application being received, identify first images shot within a region of a set range from a location of the electronic device from among a plurality of images, based on location information of the plurality of images stored in the memory or an external electronic device; select at least one second image from the first images, based on a priority of each of the first images; and, while displaying a preview image obtained through the camera on the display, display a visual object including a thumbnail image corresponding to the at least one second image on the display by overlaying the visual object on the preview image.
| |
| | | | |
| − | ===IMAGE SENSORS INCLUDING PHASE DETECTION PIXEL (18336495)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hongki Kim | | Hongki Kim |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that has a pixel array with image sensing pixels and a phase detection shared pixel. The phase detection shared pixel has two phase detection subpixels next to each other. The sensor also has a color filter fence that separates the pixels and the phase detection pixel, and color filter layers are placed on the pixels and the phase detection pixel. Each image sensing pixel has a first micro-lens, and the phase detection pixel has a second micro-lens that is taller than the first micro-lens and overlaps the two phase detection subpixels.
| |
| | | | |
| − | '''Abstract'''
| + | ===IMAGE SENSOR AND VEHICLE ([[US Patent Application 18098237. IMAGE SENSOR AND VEHICLE simplified abstract|18098237]])=== |
| − | An image sensor is presented which includes a pixel array including a plurality of image sensing pixels in a substrate, a phase detection shared pixel in the substrate, the phase detection shared pixel including two phase detection subpixels arranged next to each other, a color filter fence disposed on the plurality of image sensing pixels, and the phase detection shared pixel, the color filter fence defining a plurality of color filter spaces, a plurality of color filter layers respectively disposed in the plurality of color filter spaces on the plurality of image sensing pixels, and the phase detection shared pixel, a first micro-lens disposed on each of the plurality of image sensing pixels to have a first height, and a second micro-lens disposed to vertically overlap the two phase detection subpixels of the phase detection shared pixel and to have a second height greater than the first height.
| |
| | | | |
| − | ===IMAGE SENSOR AND VEHICLE (18098237)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Young Gu JIN | | Young Gu JIN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that consists of a pixel group divided into two regions. The first region contains a pixel with a photodiode, a floating diffusion region, and a transfer transistor. The second region includes a pixel with a photodiode, a floating diffusion region, and a transfer transistor. The first and second pixels can be arranged in a grid pattern. The total area of the photodiode in the first region is larger than the total area of the photodiode in the second region.
| |
| | | | |
| − | '''Abstract'''
| + | ===EAR TIP, ELECTRONIC DEVICE COMPRISING EAR TIP, AND METHOD FOR MANUFACTURING EAR TIP ([[US Patent Application 18335740. EAR TIP, ELECTRONIC DEVICE COMPRISING EAR TIP, AND METHOD FOR MANUFACTURING EAR TIP simplified abstract|18335740]])=== |
| − | An image sensor includes a pixel group including a first region and a second region; and a color filter having a first color on the pixel group, wherein the first region includes a first pixel including a first photodiode, a first floating diffusion region on the first photodiode, and a first transfer transistor on the first photodiode, the second region includes a second pixel including a second photodiode, a second floating diffusion region, and a second transfer transistor connected to the second photodiode and the second floating diffusion region, at least one of the first pixel and the second pixel is arranged in m*n (m and n are natural numbers of 2 or more), and from a planar point of view, a total area of the first photodiode included in the first region is greater than a total area of the second photodiode included in the second region.
| + | |
| | | | |
| − | ===EAR TIP, ELECTRONIC DEVICE COMPRISING EAR TIP, AND METHOD FOR MANUFACTURING EAR TIP (18335740)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Jinyoung KWAK | | Jinyoung KWAK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an example ear tip design that consists of three main components: a first member, a shield member, and a second member. The first member has an inner space, and the shield member is placed inside this inner space. The shield member has two surfaces, and the first member is connected to the second member, which partially surrounds it. The first member has two fixing units, one attached to a specific area on the first surface of the shield member, and the other attached to a region on the second surface that partially overlaps with the first region.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR EFFICIENTLY CONTROLLING ACCESS FOR SYSTEM LOAD ADJUSTMENT IN MOBILE COMMUNICATION SYSTEMS ([[US Patent Application 18333350. METHOD AND APPARATUS FOR EFFICIENTLY CONTROLLING ACCESS FOR SYSTEM LOAD ADJUSTMENT IN MOBILE COMMUNICATION SYSTEMS simplified abstract|18333350]])=== |
| − | An example ear tip includes a first member including a first inner space; a shield member which includes a first surface and a second surface and is arranged in the first inner space; and a second member which includes a second inner space that is connected to the first inner space via the shield member and is coupled to the first member so as to at least partially surround the first member, wherein the first member including a first fixing unit which is coupled to a first region of the first surface and a second fixing unit which is coupled to a region of the second surface, the region partially overlapping the first region.
| + | |
| | | | |
| − | ===METHOD AND APPARATUS FOR EFFICIENTLY CONTROLLING ACCESS FOR SYSTEM LOAD ADJUSTMENT IN MOBILE COMMUNICATION SYSTEMS (18333350)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Sang Bum KIM | | Sang Bum KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The present invention is a method and apparatus for efficiently controlling access for system load adjustment in mobile communication systems. It involves a terminal, which includes a user equipment (UE) non access stratum (NAS) and a UE access stratum (AS). The method includes the following steps:
| |
| − | 1. The UE receives information from a base station, which includes emergency call-related information and barring information for the emergency call.
| |
| − | 2. The UE transmits a service request for the emergency call to the UE AS.
| |
| − | 3. The UE AS determines whether to bar the service request based on the emergency call-related information.
| |
| | | | |
| − | This method allows for easy control of network congestion during emergency call transmission. It enables various types of emergency calls to be transmitted while also allowing access to be barred based on the situation of the communication network and the types of emergency calls.
| + | ===ELECTRONIC DEVICE SUPPORTING PROFILE TRANSFER BETWEEN ELECTRONIC DEVICES AND OPERATING METHOD THEREOF ([[US Patent Application 18165701. ELECTRONIC DEVICE SUPPORTING PROFILE TRANSFER BETWEEN ELECTRONIC DEVICES AND OPERATING METHOD THEREOF simplified abstract|18165701]])=== |
| | | | |
| − | '''Abstract'''
| |
| − | The present invention relates to a method and apparatus for efficiently controlling access for system load adjustment in mobile communication systems. A method for transmitting and receiving data by a terminal including a user equipment (UE) non access stratum (NAS) and a UE access stratum (AS) includes the steps of: receiving by the UE AE, information including emergency call-related information which includes barring information by type for the emergency call, from a base station; transmitting, by the UE NAS, a service request for the emergency call to the UE AS; and determining, by the UE AS, whether to bar the service request on the basis of emergency call-related information. During an emergency call transmission, network congestion can be easily controlled by enabling various types of emergency calls to be transmitted, and enabling access to be barred information according to the situation of a communication network and types of emergency calls.
| |
| | | | |
| − | ===ELECTRONIC DEVICE SUPPORTING PROFILE TRANSFER BETWEEN ELECTRONIC DEVICES AND OPERATING METHOD THEREOF (18165701)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Jieun JUNG | | Jieun JUNG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that has a communication circuit and a processor. The processor is capable of triggering the transfer of a user's profile from another device to itself. If the transfer is possible using a specific authentication method called EAP-AKA, the device obtains authentication information from a server associated with the transfer. However, if the EAP-AKA authentication is not possible, the device performs a different authentication operation with the server to obtain alternative authentication information. Based on either the first or second authentication information, the device performs the necessary operations to complete the profile transfer.
| |
| | | | |
| − | '''Abstract'''
| + | ===SYSTEMS, METHODS, AND DEVICES FOR ASSOCIATION AND AUTHENTICATION FOR MULTI ACCESS POINT COORDINATION ([[US Patent Application 18209468. SYSTEMS, METHODS, AND DEVICES FOR ASSOCIATION AND AUTHENTICATION FOR MULTI ACCESS POINT COORDINATION simplified abstract|18209468]])=== |
| − | An electronic device includes a communication circuit, and a processor electrically connected to the communication circuit. The processor is configured to, provide first information which triggers profile transfer from an external electronic device to the electronic device, based on the profile transfer which is based on an EAP-AKA authenticating operation being possible, obtain first authentication information which is obtained via the EAP-AKA authenticating operation between the external electronic device and a server associated with the profile transfer, based on the profile transfer which is based on the EAP-AKA authenticating operation being impossible, perform, via the communication circuit, an authenticating operation different from the EAP-AKA authenticating operation with the server to obtain second authentication information, and based on one of the first authentication information or the second authentication information, perform an operation for the profile transfer.
| |
| | | | |
| − | ===SYSTEMS, METHODS, AND DEVICES FOR ASSOCIATION AND AUTHENTICATION FOR MULTI ACCESS POINT COORDINATION (18209468)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sharan NARIBOLE | | Sharan NARIBOLE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for connecting and verifying a station (STA) with a group of coordinated access points (APs). The method involves creating a secure key between the STA and a coordinator of the AP group, and maintaining a connection and verification status based on this key. The method also includes generating temporary keys between the STA and the coordinator, as well as distributing the secure key from the coordinator to two member APs of the group. Additionally, the method involves generating separate temporary keys between the STA and each member AP.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR DYNAMICALLY UPDATING BEAM FAILURE DETECTION RESOURCE OF TRP IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18297369. METHOD AND APPARATUS FOR DYNAMICALLY UPDATING BEAM FAILURE DETECTION RESOURCE OF TRP IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18297369]])=== |
| − | A method for associating and authenticating a station (STA) with a coordinated access point (AP) group may include generating a pairwise master key (PMK) between the STA and a coordinator of the coordinated AP group, and maintaining an association and authentication state between the STA and the coordinated AP group based on the PMK. The method may further include generating one or more temporal keys between the STA and the coordinator based on the PMK. The method may further include distributing the PMK from the coordinator to a first member AP and a second member AP of the coordinated AP group. The method may further include generating a first temporal key between the STA and the first member AP, and generating a second temporal key between the STA and the second member AP.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR DYNAMICALLY UPDATING BEAM FAILURE DETECTION RESOURCE OF TRP IN WIRELESS COMMUNICATION SYSTEM (18297369)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Seungri JIN | | Seungri JIN |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method used by a user equipment (UE) in a wireless communication system. The method involves receiving configuration information from a base station (BS) through a radio resource control (RRC) message. This configuration information includes details about two sets of beam failure detection (BFD) reference signals (RS). Each set consists of multiple BFD-RS resources. The UE also receives a medium access control (MAC) control element (CE) from the BS, which contains information about specific BFD-RS resources in each set. The UE then identifies and activates one or more BFD-RSs based on the information provided in the MAC CE.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR MANAGING GAP CONFIGURATION OF MULTIPLE MEASUREMENT GAPS IN A WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18297550. METHOD AND APPARATUS FOR MANAGING GAP CONFIGURATION OF MULTIPLE MEASUREMENT GAPS IN A WIRELESS COMMUNICATION SYSTEM simplified abstract|18297550]])=== |
| − | A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes receiving, from a base station (BS) via a radio resource control (RRC) message, configuration information including information on a first beam failure detection (BFD)-reference signal (RS) set and information on a second BFD-RS set, wherein each of the first BFD-RS set and the second BFD-RS set includes a plurality of BFD-RS resources, receiving, from the BS, medium access control (MAC) control element (CE) including information for indicating a first at least one BFD-RS resource included in the first BFD-RS set and a second at least one BFD-RS resource included in the second BFD-RS set, and identifying one or more activated BFD-RSs based on the MAC CE.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR MANAGING GAP CONFIGURATION OF MULTIPLE MEASUREMENT GAPS IN A WIRELESS COMMUNICATION SYSTEM (18297550)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Aby KANNEATH ABRAHAM | | Aby KANNEATH ABRAHAM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication system (5G or 6G) that supports faster data transmission. It introduces a method for managing multiple measurement gaps in this system. The method involves a base station transmitting measurement gap configuration information to a user equipment (UE). This information includes a first measurement gap configuration without a measurement gap identifier (ID) and a measurement gap list with at least one second measurement gap configuration that has a gap ID. The base station also transmits measurement object information to the UE without an associated measurement gap ID. Based on this information, the base station configures a measurement gap for a specific frequency.
| |
| | | | |
| − | '''Abstract'''
| + | ===RANDOM ACCESS METHOD, NETWORK NODE AND USER EQUIPMENT ([[US Patent Application 18335751. RANDOM ACCESS METHOD, NETWORK NODE AND USER EQUIPMENT simplified abstract|18335751]])=== |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The present subject matter refers to a method for managing gap configuration of multiple measurement gaps. According to one embodiment of the present disclosure, a method performed by a base station in a wireless communication system is provided. The method includes: transmitting, to a user equipment (UE), a measurement gap configuration information including a first measurement gap configuration without a measurement gap identifier (ID) and a measurement gap list including at least one second measurement gap configuration with a gap ID; transmitting, to the UE, a measurement object information including without an associated measurement gap ID; and configuring a measurement gap based on the first measurement gap configuration for a frequency associated with the measurement object information.
| |
| | | | |
| − | ===RANDOM ACCESS METHOD, NETWORK NODE AND USER EQUIPMENT (18335751)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Qi XIONG | | Qi XIONG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology to support higher data rates and enable intelligent services in various domains such as smart home, smart city, and healthcare. The abstract also mentions a random access method, network node, and user equipment that improve the performance of user devices when accessing a specific cell.
| |
| | | | |
| − | '''Abstract'''
| + | ===INTER-CELL BEAM MANAGEMENT CELL SWITCH ([[US Patent Application 18191666. INTER-CELL BEAM MANAGEMENT CELL SWITCH simplified abstract|18191666]])=== |
| − | The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The present disclosure provides a random access method, a network node and a user equipment. With the solution of the above embodiment of the present disclosure, the performance of the UE randomly accessing the target cell can be improved.
| |
| | | | |
| − | ===INTER-CELL BEAM MANAGEMENT CELL SWITCH (18191666)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Emad N. Farag | | Emad N. Farag |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes methods and apparatuses for facilitating serving cell changes in a wireless communications network. It focuses on the user equipment (UE), which includes a transceiver and a processor. The transceiver receives a transmission configuration indicator (TCI) state identifier (ID) associated with a target serving cell and a cell switch command. In response to the cell switch command, the UE transmits a channel conveying a positive hybrid automatic repeat request acknowledgement (HARQ-ACK). The processor, based on the cell switch command, performs a cell switch at a specific time, which is determined by a slot that starts after a cell switch application time from the last symbol of the channel conveying the positive HARQ-ACK.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHODS, TERMINALS AND BASE STATIONS FOR BEAM FOOTPRINT HANDOVER ([[US Patent Application 18015573. METHODS, TERMINALS AND BASE STATIONS FOR BEAM FOOTPRINT HANDOVER simplified abstract|18015573]])=== |
| − | Methods and apparatuses for methods and apparatuses for facilitating serving cell changes based on signaling related to beam management procedures in a wireless communications network. A user equipment (UE) comprises a transceiver and a processor operably coupled to the transceiver. The transceiver is configured to receive a transmission configuration indicator (TCI) state identifier (ID) associated with a target serving cell, receive a cell switch command, and transmit, in response to reception of the cell switch command, a channel conveying a positive hybrid automatic repeat request acknowledgement (HARQ-ACK). The processor is configured to perform, based on the cell switch command, a cell switch at a time, wherein the time corresponds to a slot that starts after a cell switch application time from a last symbol of the channel conveying the positive HARQ-ACK.
| |
| | | | |
| − | ===METHODS, TERMINALS AND BASE STATIONS FOR BEAM FOOTPRINT HANDOVER (18015573)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Min WU | | Min WU |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for beam footprint handover in a communication system. The method involves a terminal receiving a signaling message instructing it to switch from one beam coverage area to another. The terminal then performs the handover by switching from the first beam coverage area to the second beam coverage area. Both beam coverage areas belong to the same cell, and downlink signals in each coverage area are transmitted using the corresponding beam.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE FOR TRANSMITTING AND/OR RECEIVING PROTOCOL/SERVICE INFORMATION, AND METHOD FOR OPERATING SAME ([[US Patent Application 18334623. ELECTRONIC DEVICE FOR TRANSMITTING AND/OR RECEIVING PROTOCOL/SERVICE INFORMATION, AND METHOD FOR OPERATING SAME simplified abstract|18334623]])=== |
| − | The disclosure provides a method for beam footprint handover, a method for receiving information, a method for transmitting information, a terminal and a base station. The method for beam footprint handover performed by a terminal comprises the following steps: receiving a first signaling, wherein the first signaling is used for instructing the terminal to hand over from a first beam footprint to a second beam footprint; handing over from the first beam footprint to the second beam footprint in response to the first signaling; wherein a beam footprint is a coverage range of the downlink beamforming signals, the first beam footprint and the second beam footprint belong to a same cell, and downlink signals in the first beam footprint are transmitted with the first beam, while downlink signals in the second beam footprint are transmitted with the second beam.
| |
| | | | |
| − | ===ELECTRONIC DEVICE FOR TRANSMITTING AND/OR RECEIVING PROTOCOL/SERVICE INFORMATION, AND METHOD FOR OPERATING SAME (18334623)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Junhwan AN | | Junhwan AN |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device and a method for transmitting and receiving protocol/service information. The device broadcasts an advertisement packet containing certain information, and it can receive a connection request packet from another device. If the information in the connection request packet matches the information in the advertisement packet, the device will send a connection response packet back to the other device.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND USER EQUIPMENT (UE) FOR SELECTING ACCESS NETWORK FOR ROUTING DATA OF THE UE ([[US Patent Application 18302409. METHOD AND USER EQUIPMENT (UE) FOR SELECTING ACCESS NETWORK FOR ROUTING DATA OF THE UE simplified abstract|18302409]])=== |
| − | An electronic device for transmitting and/or receiving protocol/service information and a method for operating same are provided. The electronic device broadcasts an advertisement packet including at least one piece of first protocol/service information, receives a connection request packet including at least one piece of second protocol/service information from an external electronic device, and, when the at least one piece of second protocol/service information is the same as the at least one piece of first protocol/service information, transmits a connection response packet to the external electronic device.
| |
| | | | |
| − | ===METHOD AND USER EQUIPMENT (UE) FOR SELECTING ACCESS NETWORK FOR ROUTING DATA OF THE UE (18302409)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Koustav ROY | | Koustav ROY |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for selecting the access network for routing data of user equipment (UE). The method involves receiving a trigger indicating the need for network services, determining if the UE is registered on both a 3GPP access network and a non-3GPP access network, and identifying the availability of network services in both networks. Based on this information, the method selects either the 3GPP access network or the non-3GPP access network for routing the data. The selection can be based on the availability of network services or other network parameters.
| |
| | | | |
| − | '''Abstract'''
| + | ===COMMUNICATION METHOD, USER EQUIPMENT AND BASE STATION ([[US Patent Application 18193008. COMMUNICATION METHOD, USER EQUIPMENT AND BASE STATION simplified abstract|18193008]])=== |
| − | A method of selecting access network for routing data of user equipment (UE) is provided. The method includes receiving trigger indicating a requirement of one or more network services. Further, the method includes determining that a UE is registered on a Third Generation Partnership Project (3GPP) access network and a non-3GPP access network simultaneously. The method includes identifying availability of one or more network services in the 3GPP access network and the non-3GPP access network. Thereafter, the method includes selecting one of, the 3GPP access network and the non-3GPP network, based on availability of one or more network services in one of, the 3GPP access network and the non-3GPP access network, or selecting one of, the 3GPP access network and the non-3GPP network based on one or more network parameters, when one or more network services are available in the 3GPP access network and the non-3GPP access network.
| |
| | | | |
| − | ===COMMUNICATION METHOD, USER EQUIPMENT AND BASE STATION (18193008)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Min WU | | Min WU |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a communication system (5G or 6G) that supports faster data transmission. It introduces a communication method involving a user equipment and a base station. The method includes sending a request signal to the base station, asking it to perform certain operations such as transmitting downlink signals, receiving uplink signals, or entering an active state. The purpose of this method is to reduce the impact of base station dormancy on user experience and transmission delay, thus minimizing power consumption.
| |
| | | | |
| − | '''Abstract'''
| + | ===RESTRICTED TWT OPERATIONS FOR MULTI-LINK DEVICES ([[US Patent Application 18332628. RESTRICTED TWT OPERATIONS FOR MULTI-LINK DEVICES simplified abstract|18332628]])=== |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. A communication method, a user equipment and a base station are provided. The communication method includes transmitting a request signaling to a base station to request the base station to perform at least one of the following operations, transmitting at least one downlink signal, receiving at least one uplink signal, and entering an active state. In accordance with the embodiments of the disclosure, the influence of the dormancy of the base station on user experience and transmission delay is reduced when the base station enters a dormant state to reduce power consumption.
| |
| | | | |
| − | ===RESTRICTED TWT OPERATIONS FOR MULTI-LINK DEVICES (18332628)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Rubayet Shafin | | Rubayet Shafin |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes methods and devices for enabling restricted target wake time (TWT) operation in a wireless local area network. The devices include a non-access point (AP) multi-link device (MLD) with multiple stations (STAs) and a processor. Each STA has a transceiver for broadcast TWT operation on multi-link operation (MLO) links with corresponding APs of an AP MLD. The processor is connected to the transceivers and is responsible for negotiating a broadcast TWT schedule over a first link between a first STA and a first AP, applying the schedule to the group of links, negotiating a restricted TWT schedule with the AP MLD over at least one link, and establishing the restricted TWT schedule on one or more links.
| |
| | | | |
| − | '''Abstract'''
| + | ===TRANSMISSION AND RECEPTION POWER IN FULL-DUPLEX SYSTEMS ([[US Patent Application 18191684. TRANSMISSION AND RECEPTION POWER IN FULL-DUPLEX SYSTEMS simplified abstract|18191684]])=== |
| − | Embodiments of the present disclosure provide methods and apparatuses for facilitating restricted target wake time (TWT) operation in a wireless local area network. The apparatuses include a non-access point (AP) multi-link device (MLD) comprising a plurality of stations (STAs) and a processor. Each STA comprises a transceiver configured for broadcast TWT operation on multi-link operation (MLO) links with corresponding APs of an AP MLD. The processor is operably coupled to the transceivers, and configured to negotiate a broadcast TWT schedule over a first link between a first STA and a first AP of the AP MLD, apply the broadcast TWT schedule to the group of links, negotiate a restricted TWT schedule with the AP MLD over at least one link of the group of links, and establish the restricted TWT schedule on one or more links of the at least one link.
| |
| | | | |
| − | ===TRANSMISSION AND RECEPTION POWER IN FULL-DUPLEX SYSTEMS (18191684)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Marian Rudolf | | Marian Rudolf |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes apparatuses and methods for transmission power in full-duplex systems. It specifically focuses on a method of operating a user equipment (UE) for receiving a downlink (DL) channel or signal. The method involves receiving information for two different sets of parameters associated with two different DL channels or signals. The UE then determines which set of parameters to use based on the slot being received from. Finally, the UE receives the DL channel or signal in the slot based on a power adjustment value specified in the chosen set of parameters.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR DETERMINING TRANSMIT POWER BUDGET FOR MANAGING RF EXPOSURE OF MOBILE DEVICES USING RADAR SENSING ([[US Patent Application 18063032. METHOD AND APPARATUS FOR DETERMINING TRANSMIT POWER BUDGET FOR MANAGING RF EXPOSURE OF MOBILE DEVICES USING RADAR SENSING simplified abstract|18063032]])=== |
| − | Apparatuses and methods for transmission power in full-duplex systems. A method of operating a user equipment (UE) for receiving a downlink (DL) channel or signal includes receiving first information for a first set of parameters for a first DL channel or signal associated with a first subset of slots from a set of slots on a cell and second information for a second set of parameters for a second DL channel or signal associated with a second subset of slots from the set of slots on the cell. The method further includes determining, based on a slot for a reception being from the second subset of slots, to use the second set of parameters for the reception and receiving, based on a power adjustment value in the second set of parameters, the second DL channel or signal in the slot.
| + | |
| | | | |
| − | ===METHOD AND APPARATUS FOR DETERMINING TRANSMIT POWER BUDGET FOR MANAGING RF EXPOSURE OF MOBILE DEVICES USING RADAR SENSING (18063032)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Vutha Va | | Vutha Va |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for managing the maximum permissible exposure (MPE) limit for radio frequency exposure (RFE) in a time window. The method involves estimating the previous RFE for a target based on radar detection and transmission history information. It also predicts the future RFE for the target during a future time period, ensuring that the sum of the estimated previous RFE and predicted future RFE does not exceed the MPE limit. Based on the predicted future RFE, the method determines a transmission power budget for an electronic device's transceiver for transmission during the future time period.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND SYSTEM FOR HANDLING PAGING CAUSE OF SERVICE PROVIDED BY WIRELESS NETWORK DEVICE ([[US Patent Application 18012800. METHOD AND SYSTEM FOR HANDLING PAGING CAUSE OF SERVICE PROVIDED BY WIRELESS NETWORK DEVICE simplified abstract|18012800]])=== |
| − | A method for managing a maximum permissible exposure (MPE) limit that corresponds to a time window is provided. The method includes estimating, based on radar detection information and transmission history information, a previous radio frequency exposure (RFE) for a target that occurred during a previous time period of the time window. The method includes predicting a future RFE on the target to occur during a future time period of the time window such that a sum of the estimated previous RFE and the predicted future RFE does not exceed the MPE limit for the time window. The method includes determining, based on the predicted future RFE, a transmission power budget for a transceiver of an electronic device for transmission during the future time period.
| + | |
| | | | |
| − | ===METHOD AND SYSTEM FOR HANDLING PAGING CAUSE OF SERVICE PROVIDED BY WIRELESS NETWORK DEVICE (18012800)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Lalith KUMAR | | Lalith KUMAR |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and a wireless network device for handling a paging cause of a service. The wireless network device receives a message from a user equipment (UE) that includes the paging cause of the service and a first value corresponding to the paging cause. The wireless network device then modifies the first value to a second value and sends a response message to the UE. The response message includes the paging cause and the second value of the paging cause. This second value allows the UE to respond to a paging message based on the modified paging cause value.
| |
| | | | |
| − | '''Abstract'''
| + | ===APPARATUS AND METHOD FOR RECEIVING PAGING-RELATED INFORMATION ([[US Patent Application 18296688. APPARATUS AND METHOD FOR RECEIVING PAGING-RELATED INFORMATION simplified abstract|18296688]])=== |
| − | Embodiments herein provide a method and a wireless network device () for handing a paging cause of a service. The method includes receiving, by the wireless network device (), a NAS message includes the paging cause of the service provided by the wireless network device () and a first value corresponding to the paging cause from a UE (). The method includes modifying, by the wireless network device (), the first value of the paging cause of the service to a second value, and sending a NAS response message to the UE (), where the NAS response message includes the paging cause of the service and the second value of the paging cause. The second value enables the UE () to respond to a paging message based on the second value of the paging cause.
| |
| | | | |
| − | ===APPARATUS AND METHOD FOR RECEIVING PAGING-RELATED INFORMATION (18296688)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Anil AGIWAL | | Anil AGIWAL |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for monitoring paging in a wireless communication system, specifically in the context of a 5G or 6G network. The method involves a user equipment (UE) receiving system information from a cell, which includes a configuration for paging early indication (PEI). The UE then checks if a certain parameter is configured in the system information, which indicates that the UE should only monitor PEI if the latest received radio resource control (RRC) release message is from the cell. If this parameter is configured and the UE has received the RRC release message most recently from the cell, it proceeds to monitor PEI in that cell.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR ALLOCATING FREQUENCY RESOURCES IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18011985. METHOD AND APPARATUS FOR ALLOCATING FREQUENCY RESOURCES IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18011985]])=== |
| − | The disclosure relates to a 5-generation (5G) or 6-generation (6G) communication system for supporting a higher data transmission rate. A method for monitoring paging by a user equipment (UE) in a wireless communication system is provided. The method includes receiving, from a cell, system information including paging early indication (PEI) configuration, identifying whether a parameter is configured via the system information, wherein the parameter indicates that the UE monitors PEI only if the latest received RRC release message is from the cell, in case that the parameter is configured, identifying whether an radio resource control (RRC) release message is received most recently in the cell, and in case that the parameter is configured and the RRC release message is received most recently in the cell, monitoring PEI in the cell.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR ALLOCATING FREQUENCY RESOURCES IN WIRELESS COMMUNICATION SYSTEM (18011985)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jinyoung OH | | Jinyoung OH |
| | | | |
| − | '''Brief explanation'''
| |
| − | The present disclosure is about a communication system that supports faster data transmission rates compared to 4G systems like LTE. It introduces a method and apparatus for indicating the frequency resource or format in a wireless communication system that uses a dual connection scheme. This method allows for the classification of frequency resources into resource block sets or resource group units, and the configuration of uplink, downlink, and flexible frequency resource formats for a resource group. This allows for effective utilization of frequency resources for transmission and reception.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR TRANSMISSIONS OVER MULTIPLE SLOTS IN DUPLEX MODE ([[US Patent Application 18190869. METHOD AND APPARATUS FOR TRANSMISSIONS OVER MULTIPLE SLOTS IN DUPLEX MODE simplified abstract|18190869]])=== |
| − | The present disclosure relates to a 5G or 6G communication system for supporting data transmission rates higher than that of a 4G communication system such as LTE. Disclosed are a method and an apparatus for indicating a frequency resource or a format of the resource in a wireless communication system using a dual connection scheme. The method and the apparatus of the present disclosure semi-statically or dynamically change: a method for classifying frequency resources as resource block sets or resource group units and configuring at least one from among uplink, downlink, and flexible frequency resource formats for a resource group; and the configured frequency resource format, and thus the frequency resources for uplink/downlink transmission and reception can be effectively used.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR TRANSMISSIONS OVER MULTIPLE SLOTS IN DUPLEX MODE (18190869)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Carmela Cozzo | | Carmela Cozzo |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method and apparatus for transmitting data over multiple time slots in a duplex mode. The method involves receiving information for different slots that contain uplink symbols associated with specific frequency resources. The method also includes transmitting a channel over a certain number of slots, which can include slots from different frequency resources. The method further involves determining specific sets of frequency resources within a sub-band and a bandwidth for transmitting the channel over the different slots. Finally, the method includes transmitting the channel using the determined frequency resources within the sub-band and the bandwidth over the respective slots.
| |
| | | | |
| − | '''Abstract'''
| + | ===DEVICE AND METHOD FOR FRONTHAUL TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18334689. DEVICE AND METHOD FOR FRONTHAUL TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18334689]])=== |
| − | Apparatuses and methods for transmissions over multiple slots in duplex mode. A method includes receiving information for first slots that include first uplink (UL) symbols associated with first frequency resources of a sub-band (SB), second slots that include second UL symbols associated with second frequency resources of a bandwidth (BW), and transmission of a channel over a first number of slots including slots from the first slots and the second slots. The method further includes determining a first set of frequency resources within the SB for transmission of the channel over the first slots and a second set of frequency resources within the BW for transmission of the channel over the second slots. The method further includes transmitting the channel in the first set of frequency resources within the SB over the first slots and in the second set of frequency resources within the BW over the second slots.
| |
| | | | |
| − | ===DEVICE AND METHOD FOR FRONTHAUL TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM (18334689)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hyoungjin LIM | | Hyoungjin LIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a new communication system called pre-5G or 5G that is designed to support higher data rates than the current 4G system, such as LTE. The system includes a device called a radio unit (RU) that is part of a base station in a wireless communication system. The RU device has at least one transceiver and at least one processor. The processor is configured to receive a control message from a digital unit (DU) through a fronthaul interface. The control message includes a section extension field, which the processor uses to identify additional information. Based on this additional information, the processor acquires a beamforming weight. The control message is used to schedule a terminal in the control plane of the system.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR DOWNLINK CONTROL INFORMATION INTERPRETATION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18132653. METHOD AND APPARATUS FOR DOWNLINK CONTROL INFORMATION INTERPRETATION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18132653]])=== |
| − | A pre-5-Generation (5G) or 5G communication system for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE) is provided. The device of a radio unit (RU) of a base station in a wireless communication system includes at least one transceiver and at least one processor coupled to the at least one transceiver, wherein the at least one processor is configured to receive a first control message including a section extension field from a digital unit (DU) via a fronthaul interface, identify additional information based on the section extension field, and acquire a beamforming weight based on the additional information, wherein the first control message is configured to schedule a terminal in a control plane.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR DOWNLINK CONTROL INFORMATION INTERPRETATION IN WIRELESS COMMUNICATION SYSTEM (18132653)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Kyungjun CHOI | | Kyungjun CHOI |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method used by a terminal in a wireless communication system to support faster data transmission. The method involves receiving signals and information from a base station, including time domain resource assignment (TDRA) information and downlink control information (DCI) with an antenna port field. The terminal then identifies different antenna port tables based on the antenna port field, in case the DCI contains multiple scheduling information of different mapping types.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR DATA TRANSMISSION IN RRC_INACTIVE ([[US Patent Application 18191447. METHOD AND APPARATUS FOR DATA TRANSMISSION IN RRC_INACTIVE simplified abstract|18191447]])=== |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The disclosure provides a method performed by a terminal in a wireless communication system. The method includes receiving, from a base station, a higher layer signal including time domain resource assignment (TDRA) information; receiving, from the base station, downlink control information (DCI) including an antenna port field; and identifying an antenna port table of a first mapping type and an antenna port table of a second mapping type based on the antenna port field, in case that the DCI includes multiple scheduling information of different mapping types.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR DATA TRANSMISSION IN RRC_INACTIVE (18191447)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Anil AGIWAL | | Anil AGIWAL |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method used by a terminal in a wireless communication system, specifically in a 5G or 6G network, to support high-speed data transmission. The method involves receiving a message that includes information about suspending certain operations and configuring small data transmission. The terminal then starts a timer to ensure proper synchronization for the small data transmission. If the criteria for a small data transmission procedure are met and there is no available configured grant occasion for data transmission, the terminal performs a random access-small data transmission procedure instead.
| |
| | | | |
| − | '''Abstract'''
| + | ===APPARATUS AND METHOD FOR TRANSMITTING CONTROL CHANNEL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18208637. APPARATUS AND METHOD FOR TRANSMITTING CONTROL CHANNEL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18208637]])=== |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. A method performed by a terminal in a wireless communication system is provided. The method includes receiving a radio resource control (RRC) release message including suspend configuration information and configured grant-small data transmission (CG-SDT) configuration information, starting a timer related to a time alignment (TA) for CG-SDT based on the CG-SDT configuration information, identifying that criteria for a small data transmission (SDT) procedure is met, and in case that any configured grant (CG) occasion corresponding to a synchronization signal block (SSB) with a reference signal received strength (RSRP) above a threshold value is not available while the timer related to the TA for CG-SDT is running, and criteria for a random access-small data transmission (RA-SDT) procedure is met, performing the RA-SDT procedure.
| + | |
| | | | |
| − | ===APPARATUS AND METHOD FOR TRANSMITTING CONTROL CHANNEL IN WIRELESS COMMUNICATION SYSTEM (18208637)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Youngkwan CHOI | | Youngkwan CHOI |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for transmitting control information in a wireless communication system. The method involves acquiring information bits and generating a transmission sequence based on channel coding and scrambling. The transmission sequence is then transmitted to a base station through a physical uplink control channel. The transmission sequence is chosen from a set of complex sequences, each based on a Zadoff-Chu sequence. The length of the Zadoff-Chu sequence is larger than the number of possible values for the transmission bitstream.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR GROUP-BASED MULTI-BEAM OPERATION ([[US Patent Application 18333450. METHOD AND APPARATUS FOR GROUP-BASED MULTI-BEAM OPERATION simplified abstract|18333450]])=== |
| − | Embodiments of the present disclosure relate to control channel transmission in a wireless communication system thereof are provided. The method, executed by a processor in user equipment (UE) or a base station (BS), may include acquiring information bits for uplink control information; acquiring a transmission bitstream, the transmission bitstream being based on channel coding and scrambling for the information bits; generating a transmission complex sequence corresponding to the transmission bitstream, the transmission complex sequence being from among a plurality of complex sequences; and transmitting a signal of the transmission complex sequence to a base station (BS) through a physical uplink control channel (PUCCH), wherein each of the plurality of complex sequences is based on a respective Zadoff-Chu (ZC) sequence, and a respective length of the ZC sequence is larger than a number of candidate values of the transmission bitstream.
| + | |
| | | | |
| − | ===METHOD AND APPARATUS FOR GROUP-BASED MULTI-BEAM OPERATION (18333450)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Md. Saifur Rahman | | Md. Saifur Rahman |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for operating a user equipment (UE), which is a device used by a user to access a network. The method involves receiving configuration information about a set of transmission configuration indicator (TCI) states. The TCI states indicate different groups of beams that can be used for communication. A beam indication is then received, which specifies at least one TCI state from the set. This TCI state indicates a group of beams that are divided into sets for different entities. Each set is associated with a specific entity and contains a certain number of beams. The beam indication is decoded, and a beam is determined for a specific entity based on the set of beams associated with that entity. Finally, the UE either transmits an uplink (UL) transmission or receives a downlink (DL) transmission using the determined beam for the specific entity. The method can be applied to multiple entities, with each entity having its own set of beams.
| |
| | | | |
| − | '''Abstract'''
| + | ===DYNAMIC ADAPTATION OF TIME DOMAIN RESOURCE FOR PERIODIC OR SEMI-PERSISTENT DOWNLINK SIGNALS ([[US Patent Application 18185354. DYNAMIC ADAPTATION OF TIME DOMAIN RESOURCE FOR PERIODIC OR SEMI-PERSISTENT DOWNLINK SIGNALS simplified abstract|18185354]])=== |
| − | A method for operating a user equipment (UE) comprises receiving configuration information on a set of transmission configuration indicator (TCI) states; receiving a beam indication indicating at least one TCI state from the set of TCI states, wherein the at least one TCI state indicates a group of M beams partitioned into K sets of beams for K entities (E, E, . . . E), where an i-th set of beams is associated with entity Eand comprises Nbeams, and ΣN=M; decoding the beam indication; determining a beam for entity Ebased on the i-th set of beams; and transmitting an uplink (UL) transmission or receiving a downlink (DL) transmission based on the determined beam for entity E, wherein i is an entity index and takes a value from {1, . . . , K}.
| |
| | | | |
| − | ===DYNAMIC ADAPTATION OF TIME DOMAIN RESOURCE FOR PERIODIC OR SEMI-PERSISTENT DOWNLINK SIGNALS (18185354)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hongbo Si | | Hongbo Si |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes apparatuses and methods for dynamically adapting a time domain resource for a periodic or semi-persistent downlink signal. The method involves a user equipment (UE) receiving a set of configurations from a higher layer. From this set, the UE identifies a first set of configurations that indicate resources for receiving downlink signals, and a second set of configurations for a physical downlink control channel (PDCCH) that includes a downlink control information (DCI) format with adaptation information. The UE then receives the downlink signals based on the first set of configurations and the PDCCH including the DCI format based on the second set of configurations. Using the adaptation information, the UE identifies a third set of configurations that indicate the resources for receiving the downlink signals, and finally receives the downlink signals based on the third set of configurations.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS OF DYNAMIC BEAM INDICATION AND SWITCHING ([[US Patent Application 18190842. METHOD AND APPARATUS OF DYNAMIC BEAM INDICATION AND SWITCHING simplified abstract|18190842]])=== |
| − | Apparatuses and methods for dynamic adaptation of a time domain resource for periodic or semi-persistent downlink signal are provided. A method of operating a user equipment (UE) includes receiving a set of configurations from a higher layer, identifying a first set of configurations from the set of configurations indicating resources for reception of downlink signals, and identifying a second set of configurations from the set of configurations for a physical downlink control channel (PDCCH) including a downlink control information (DCI) format. The DCI format includes adaptation information. The method further includes receiving the downlink signals based on the first set of configurations, receiving the PDCCH including the DCI format based on the second set of configurations, identifying, based on the adaptation information, a third set of configurations indicating the resources for reception of the downlink signals, and receiving the downlink signals based on the third set of configurations.
| |
| | | | |
| − | ===METHOD AND APPARATUS OF DYNAMIC BEAM INDICATION AND SWITCHING (18190842)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Dalin Zhu | | Dalin Zhu |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method and apparatus for dynamic beam indication and switching in a wireless communication system. The method involves a user equipment (UE) receiving downlink control information (DCI) which includes a first field indicating a transmission configuration indication (TCI) codepoint. The UE also receives radio resource control (RRC) signaling which includes a parameter indicating whether a second field indicating a different TCI codepoint is present in the DCI. Based on this information, the UE identifies the presence or absence of the second field and determines a set of TCI states. The first field is a TCI field, and the second field uses one or more bits of existing DCI fields.
| |
| | | | |
| − | '''Abstract'''
| + | ===TRP SUBSET SELECTION AND REPORTING ([[US Patent Application 18295219. TRP SUBSET SELECTION AND REPORTING simplified abstract|18295219]])=== |
| − | Methods and apparatuses for dynamic beam indication and switching in a wireless communication system. A method performed by a user equipment (UE) includes receiving, in downlink control information (DCI), at least a first DCI field to indicate a first transmission configuration indication (TCI) codepoint and receiving radio resource control (RRC) signaling including a first parameter indicating whether a second DCI field indicating a second TCI codepoint is present in the DCI. The method further includes identifying, based on the first parameter, a presence or absence of the second DCI field in the DCI and identifying, based on the first and second DCI fields, a set of a first TCI state and a second TCI state. The first DCI field is a TCI field, and the second DCI field uses one or more bits of one or more existing DCI fields in the DCI.
| |
| | | | |
| − | ===TRP SUBSET SELECTION AND REPORTING (18295219)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Gilwon Lee | | Gilwon Lee |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes apparatuses and methods for selecting and reporting a subset of transmit-receive points (TRPs) in a communication system. The method involves a user equipment (UE) receiving information about a channel state information (CSI) report. This information includes multiple groups of CSI reference signal (CSI-RS) ports and a list of states. Each state corresponds to a subset of the CSI-RS ports. The UE then selects at least one state from the list, measures the CSI-RS ports in the selected state, and determines CSI based on the measurement. Finally, the UE transmits the CSI report, including the determined CSI.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS OF SEMI-STATIC MODE SIDELINK CHANNEL ACCESS ([[US Patent Application 18192608. METHOD AND APPARATUS OF SEMI-STATIC MODE SIDELINK CHANNEL ACCESS simplified abstract|18192608]])=== |
| − | Apparatuses and methods for transmit-receive point (TRP) subset selection and reporting. A method performed by a user equipment (UE) is provided. The method includes receiving information about a channel state information (CSI) report. The information indicates N>1 groups of CSI reference signal (CSI-RS) ports and a list of S states. Each of the S states correspond to a subset of the N groups of CSI-RS ports. The method further includes, based on the information, selecting at least one state from the list of S states, measuring at least one of the N groups of CSI-RS ports, and determining CSI based on the measurement. The method further includes transmitting the CSI report including the determined CSI.
| |
| | | | |
| − | ===METHOD AND APPARATUS OF SEMI-STATIC MODE SIDELINK CHANNEL ACCESS (18192608)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Hongbo Si | | Hongbo Si |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes methods and devices used in a wireless communication system to initiate channel occupancy in a semi-static mode SL (Single Layer) channel access. The method involves a user equipment (UE) receiving instructions from a higher layer to use the semi-static mode SL channel access. The UE also receives a set of configurations for this mode, including the duration of a period. The method then determines a portion of this period as channel occupancy, during which the UE will transmit data. Another portion of the period is determined as an idle duration, during which the UE can perform other tasks. The UE then performs a SL channel access procedure during the idle duration and transmits a first SL transmission over a channel during the channel occupancy period, after successfully completing the channel access procedure.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND USER EQUIPMENT FOR TRANSMITTING AND RECEIVING SOUNDING REFERENCE SIGNALS ([[US Patent Application 18333066. METHOD AND USER EQUIPMENT FOR TRANSMITTING AND RECEIVING SOUNDING REFERENCE SIGNALS simplified abstract|18333066]])=== |
| − | Methods and apparatuses for initiating channel occupancy in a semi-static mode SL channel access in a wireless communication system. A method of a user equipment (UE) includes receiving, from a higher layer, an indication on a semi-static mode SL channel access, receiving a set of configurations for the semi-static mode SL channel access, including a duration of a period and determining a first portion of the period as a channel occupancy associated with the period. The method further includes determining a second portion of the period as an idle duration associated with the period, performing a SL channel access procedure in the idle duration associated with the period, and transmitting a first SL transmission over a channel in the channel occupancy associated with the period after successfully performing the SL channel access procedure.
| |
| | | | |
| − | ===METHOD AND USER EQUIPMENT FOR TRANSMITTING AND RECEIVING SOUNDING REFERENCE SIGNALS (18333066)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Yi WANG | | Yi WANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method used by a user equipment (UE) and a base station in a wireless communication system. The UE receives configurations for sounding reference signal (SRS) resources from the base station through higher layer signaling. It also receives control information from the base station that triggers the transmission of an aperiodic SRS. The control information indicates which configuration from the received configurations should be used. The UE then transmits the aperiodic SRS to the base station based on the indicated configuration.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA USING PLURALITY OF CARRIERS IN MOBILE COMMUNICATION SYSTEM ([[US Patent Application 18333926. METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA USING PLURALITY OF CARRIERS IN MOBILE COMMUNICATION SYSTEM simplified abstract|18333926]])=== |
| − | The present application discloses methods performed by a UE and a base station in a wireless communication system. A method performed by the UE includes receiving, from a base station, via higher layer signaling, one or more configurations for sounding reference signal (SRS) resources; receiving, from the base station, control information triggering a transmission of an aperiodic SRS, wherein the control information indicates a configuration among the one or more configurations for the SRS resources; and transmitting, to the base station, the aperiodic SRS based on the configuration.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA USING PLURALITY OF CARRIERS IN MOBILE COMMUNICATION SYSTEM (18333926)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Soeng Hun KIM | | Soeng Hun KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a technology that combines 5G communication systems with Internet of Things (IoT) technology. This technology can be used in various intelligent services such as smart homes, smart buildings, smart cities, smart cars, healthcare, education, retail, and security. The method involves receiving control messages for different cell groups, transmitting a random access preamble on a specific cell, and monitoring the response based on the size of the random access response window for that cell group.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND NODE FOR COMMUNICATION IN COMMUNICATION SYSTEM SUPPORTING INTEGRATED ACCESS AND BACKHAUL (IAB) ([[US Patent Application 18016620. METHOD AND NODE FOR COMMUNICATION IN COMMUNICATION SYSTEM SUPPORTING INTEGRATED ACCESS AND BACKHAUL (IAB) simplified abstract|18016620]])=== |
| − | The present disclosure relates to converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT), and may be applied to intelligent services, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method according to disclosed aspects includes receiving a first control message including a first random access response window for a first cell group, receiving a second control message for adding a second cell group, including information on a second random access response window size for the second cell group, transmitting, on a cell of the second cell group, a random access preamble, and monitoring, on the cell of the second cell group, a random access response based on the second random access response window size for the second cell group.
| |
| | | | |
| − | ===METHOD AND NODE FOR COMMUNICATION IN COMMUNICATION SYSTEM SUPPORTING INTEGRATED ACCESS AND BACKHAUL (IAB) (18016620)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Weiwei WANG | | Weiwei WANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method used by a receiving node and a transmitting node in a communication system that supports integrated access and backhaul (IAB). The receiving node receives a configuration request message from the transmitting node and then performs data duplication configuration on a radio bearer based on the received request. The configuration request message can include information related to the radio bearer or the backhaul link channel, which the receiving node uses to generate configuration information for the backhaul link channel.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE SUPPORTING DUAL CONNECTIVITY AND OPERATION METHOD THEREOF ([[US Patent Application 18297165. ELECTRONIC DEVICE SUPPORTING DUAL CONNECTIVITY AND OPERATION METHOD THEREOF simplified abstract|18297165]])=== |
| − | A method performed by a receiving node and a transmitting node in a communication system supporting integrated access and backhaul (IAB), the receiving node and the transmitting node are provided. The method performed by the receiving node comprises: receiving a configuration request message from a transmitting node; and performing configuration of data duplication on a radio bearer based on the received configuration request message; wherein the configuration request message may be a first resource configuration request message, and wherein the first resource configuration request message comprises at least one of the following: first configuration information related to the radio bearer; and first configuration information related to a backhaul link channel, for the receiving node to generate configuration information related to the backhaul link channel.
| |
| | | | |
| − | ===ELECTRONIC DEVICE SUPPORTING DUAL CONNECTIVITY AND OPERATION METHOD THEREOF (18297165)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Keonyoung LEE | | Keonyoung LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an embodiment of an electronic device that has a communication processor. This processor can establish two connections using different radio access technologies (RATs), and transmit data through both connections. The second connection has a lower throughput than the first connection. The device can identify certain parameters associated with each connection and perform operations to transmit data with a lower throughput on the second connection, based on specific conditions. As a result, the device can transmit data through both connections with reduced throughput on the second connection.
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR PDCP RE-ESTABLISHMENT PROCEDURE OF UE SUPPORTING ETHERNET HEADER COMPRESSION PROTOCOL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18299387. METHOD AND APPARATUS FOR PDCP RE-ESTABLISHMENT PROCEDURE OF UE SUPPORTING ETHERNET HEADER COMPRESSION PROTOCOL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18299387]])=== |
| − | According to an embodiment, an electronic device may comprise at least one communication processor. The at least one communication processor may be configured to: establish, based on dual connectivity, a first connection based on a first radio access technology (RAT) and a second connection based on a second RAT; transmit first uplink data based on the first connection and transmit second uplink data based on the second connection, wherein a throughput corresponding to the second connection may be a first value; identify at least one first parameter associated with the first connection and at least one second parameter associated with the second connection; perform at least one operation for transmitting, based on the second connection, uplink (UL) data with a throughput less than the first value, based on the at least one first parameter satisfying a first condition indicating a good uplink channel state and that the at least one second parameter satisfying a second condition indicating a poor uplink channel state; and based on performing the at least one operation, transmit third uplink data based on the first connection and transmit fourth uplink data based on the second connection, wherein a throughput corresponding to the second connection may be less than the first value.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR PDCP RE-ESTABLISHMENT PROCEDURE OF UE SUPPORTING ETHERNET HEADER COMPRESSION PROTOCOL IN WIRELESS COMMUNICATION SYSTEM (18299387)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Donggun KIM | | Donggun KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract discusses a method used by a user equipment (UE) in a wireless communication system, specifically in a fifth generation (5G) or sixth generation (6G) system. The method involves receiving a message from a base station (BS) that includes configuration information for various communication entities. The UE then identifies whether a certain device called the packet data convergence protocol (PDCP) device is connected to another device called the radio link control (RLC) device, which has a specific function called out-of-sequence delivery. Based on this identification, the UE configures a reordering function in the PDCP device. The RLC device can be either an RLC acknowledged mode (AM) device or an RLC unacknowledged mode (UM) device.
| |
| | | | |
| − | '''Abstract'''
| + | ===INTEGRATED ACCESS AND BACKHAUL TIMING MODE SIGNALING ([[US Patent Application 18191500. INTEGRATED ACCESS AND BACKHAUL TIMING MODE SIGNALING simplified abstract|18191500]])=== |
| − | The disclosure relates to a fifth generation (5G) or sixth generation (6G) communication system for supporting a higher data transmission rate. A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes receiving a radio resource control (RRC) message from a base station (BS), the RRC message including radio link control (RLC) device (entity) configuration information, packet data convergence protocol (PDCP) device configuration information, and bearer configuration information, identifying whether a PDCP device is connected to an RLC device in which an out-of-sequence delivery function (rlc-OutOfOrderDelivery) is configured, based on the RRC message, and configuring a reordering function in the PDCP device, based on whether the PDCP device is connected to the RLC device, wherein the RLC device may be at least one device of an RLC acknowledged mode (AM) RLC device or an RLC unacknowledged mode (UM) mode RLC device.
| |
| | | | |
| − | ===INTEGRATED ACCESS AND BACKHAUL TIMING MODE SIGNALING (18191500)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Milos TESANOVIC | | Milos TESANOVIC |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a communication system, specifically for 5G or 6G networks, that aims to support faster data transmission rates. The system involves a method for a first node in the wireless communication system. The method includes receiving a message from a second node that contains information about a list of slots. The first node also receives a control element from the second node, which indicates a timing mode to be applied to at least one slot in the list. Based on this control element, the first node identifies the corresponding timing mode for the slot(s).
| |
| | | | |
| − | '''Abstract'''
| + | ===METHOD AND APPARATUS FOR PERFORMING EFFICIENT LAYER 2 FUNCTION IN MOBILE COMMUNICATION SYSTEM ([[US Patent Application 18327523. METHOD AND APPARATUS FOR PERFORMING EFFICIENT LAYER 2 FUNCTION IN MOBILE COMMUNICATION SYSTEM simplified abstract|18327523]])=== |
| − | The disclosure relates to a 5 Generation (5G) or 6 Generation (6G) communication system for supporting a higher data transmission rate. A method for a first node in a wireless communication system is provided. The method includes receiving, from a second node, a radio resource control (RRC) message including information on a list of slots, receiving, from the second node, a medium access control (MAC) control element (CE) indicating at least one timing mode to be applied to at least one slot in the list of slots, and identifying, based on the MAC CE, the at least one timing mode corresponding to the at least one slot.
| |
| | | | |
| − | ===METHOD AND APPARATUS FOR PERFORMING EFFICIENT LAYER 2 FUNCTION IN MOBILE COMMUNICATION SYSTEM (18327523)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sangbum KIM | | Sangbum KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication technique that combines IoT technology with a 5G communication system to support faster data transfer rates compared to the previous 4G system. This technology can be used in various intelligent services such as smart homes, buildings, cities, cars, healthcare, education, retail, security, and safety. The abstract also mentions a method and apparatus for setting up an efficient hierarchical layer 2 architecture and its main functions in the next-generation mobile communication system.
| |
| | | | |
| − | '''Abstract'''
| + | ===CONTROL KNOB AND COOKING SYSTEM ([[US Patent Application 18209042. CONTROL KNOB AND COOKING SYSTEM simplified abstract|18209042]])=== |
| − | The present disclosure relates to a communication technique for converging IoT technology with a 5G communication system for supporting a higher data transfer rate beyond a 4G system, and a system therefor. The present disclosure can be applied to intelligent services (e.g., smart homes, smart buildings, smart cities, smart or connected cars, health care, digital education, retail business, and services associated with security and safety) on the basis of 5G communication technology and IoT-related technology. Disclosed are a method and an apparatus for configuring an efficient hierarchical layer 2 architecture and main functions thereof in a next-generation mobile communication system.
| + | |
| | | | |
| − | ===CONTROL KNOB AND COOKING SYSTEM (18209042)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Heejun KANG | | Heejun KANG |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a cooking system that includes a cooking device and a control knob. The control knob has light emitting elements and can be attached to the cooking device. The cooking device is designed to transmit wireless power to the control knob when attached, and it can drive heating coils based on the movement of the control knob. It also uses a sensor to detect changes in the magnetic field caused by the control knob's movement, allowing it to determine which heating coil to control. The control knob, when attached to the cooking device, can control the light emitting elements based on magnetic field data received from the cooking device.
| |
| | | | |
| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE COVER HAVING LAYERED STRUCTURE AND METHOD FOR MANUFACTURING SAME ([[US Patent Application 18209191. ELECTRONIC DEVICE COVER HAVING LAYERED STRUCTURE AND METHOD FOR MANUFACTURING SAME simplified abstract|18209191]])=== |
| − | A cooking system disclosed herein may comprises a cooking device; and a control knob attachable to the cooking device and including a plurality of light emitting elements, wherein the cooking device is configured to, with the control knob attached to the cooking device, transmit wireless power to the control knob, drive at least one heating coil based on movement of the control knob, determine a target coil to be controlled among the at least one heating coil based on a change in magnetic field detected by a sensor according to movement of the control knob, and control firepower of the target coil, and the control knob is configured to, with the control knob attached to the cooking device, control the plurality of light emitting elements based on magnetic field data received from the cooking device.
| + | |
| | | | |
| − | ===ELECTRONIC DEVICE COVER HAVING LAYERED STRUCTURE AND METHOD FOR MANUFACTURING SAME (18209191)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Sookyu LEE | | Sookyu LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This application describes a cover for an electronic device that is made up of multiple layers. The cover includes a substrate made of magnesium, which is a type of metal. On top of the substrate, there is a first layer that has undergone a chemical treatment to enhance its properties. This layer is followed by a bending supplement layer, which helps to improve the flexibility of the cover. On top of that, there is a color layer, which adds aesthetic appeal to the cover. Finally, there is an ultraviolet molding layer, which provides additional protection and durability. The application also mentions that there can be other variations of this design.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR MEMORY DEVICE ([[US Patent Application 18175445. SEMICONDUCTOR MEMORY DEVICE simplified abstract|18175445]])=== |
| − | This application relates to an electronic device cover having a layered structure and a method for manufacturing the same. An embodiment may include a substrate including magnesium, a first chemical conversion-treated layer formed on the substrate, a bending supplement layer formed on the first chemical conversion-treated layer, a color layer formed on the bending supplement layer, and an ultraviolet molding layer formed on the color layer. Various other embodiments are possible.
| |
| | | | |
| − | ===SEMICONDUCTOR MEMORY DEVICE (18175445)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Minjun LEE | | Minjun LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor memory device that consists of multiple memory cells arranged on a substrate. Each memory cell includes two transistors stacked on top of each other. The first transistor has a channel region between a source region and a drain region, a gate electrode, and a gate insulating layer. The second transistor has a pillar structure with a drain region, a channel region, and a source region stacked on top of the first transistor. It also has a gate electrode on one side of the channel region and a gate insulating layer between the channel region and the gate electrode. The drain and source regions of the second transistor have different types of impurity regions.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18097675. SEMICONDUCTOR DEVICE simplified abstract|18097675]])=== |
| − | A semiconductor memory device includes a plurality of memory cells arranged on a substrate. Each of the plurality of memory cells may include a first transistor on the substrate and a second transistor on the first transistor. The first transistor may include a first channel region between a first source region and a first drain region, a first gate electrode, and a first gate insulating layer. The second transistor may include a pillar structure having a second drain region, a second channel region and a second source region sequentially stacked on the first gate electrode, a second gate electrode on one side of the second channel region, and a second gate insulating layer between the second channel region and the second gate electrode. The second drain region and the second source region may have a first conductivity type impurity region and a second conductivity type impurity region, respectively.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18097675)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | DONG-SIK PARK | | DONG-SIK PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that includes a substrate with a cell array region. On this region, there is a data storage structure consisting of a bottom electrode, a top electrode, and a dielectric layer between them. A blocking layer is placed on top of the top electrode, followed by a lower interlayer insulating layer. The device also includes a lower contact that penetrates the lower interlayer insulating layer and is connected to the top electrode. Importantly, a portion of the lower contact makes contact with the blocking layer.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 17936960. SEMICONDUCTOR DEVICE simplified abstract|17936960]])=== |
| − | A semiconductor device may include a substrate including a cell array region, a data storage structure provided on the cell array region of the substrate, the data storage structure including a bottom electrode, a top electrode on the bottom electrode, and a dielectric layer interposed between the bottom electrode and the top electrode, a blocking layer provided on a top surface of the top electrode, a lower interlayer insulating layer provided on the blocking layer, and a lower contact penetrating the lower interlayer insulating layer and electrically connected to the top electrode. At least a portion of a side surface of the lower contact may contact the blocking layer.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (17936960)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Jihye Son | | Jihye Son |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that includes various components such as a substrate, active patterns, source/drain regions, isolation layers, buffer layers, conductive patterns, spacers, contacts, landing pads, abrasive particles, and data storage elements. These components work together to create a functioning semiconductor device.
| |
| | | | |
| − | '''Abstract'''
| + | ===CAPACITOR AND MEMORY DEVICE ([[US Patent Application 18205715. CAPACITOR AND MEMORY DEVICE simplified abstract|18205715]])=== |
| − | A semiconductor device includes a substrate including a first active pattern having first and second source/drain regions of a cell region, a device isolation layer in a trench defining the first active pattern on the cell region, a buffer layer on the cell region, a line structure extends in a third direction, extends from the cell region to a boundary region, and including a first conductive pattern that passes through the buffer layer and contacts the first source/drain region, a bit line on the first conductive pattern, and a first barrier pattern between the bit line and the first conductive pattern, a pair of spacers respectively on both sidewalls of the line structure, a contact on the second source/drain region, a landing pad on the contact, a first abrasive particle between the contact and the landing pad, and a data storage element on the landing pad.
| + | |
| | | | |
| − | ===CAPACITOR AND MEMORY DEVICE (18205715)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Cheoljin CHO | | Cheoljin CHO |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a capacitor and a DRAM (dynamic random-access memory) device. The capacitor consists of a lower electrode, a dielectric layer structure, and an upper electrode. The dielectric layer structure is made up of three layers stacked in sequence: a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer. The hafnium oxide layer has either a tetragonal crystal phase or an orthorhombic crystal phase.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 17987011. SEMICONDUCTOR DEVICE simplified abstract|17987011]])=== |
| − | A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.
| + | |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (17987011)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | MIN HEE CHO | | MIN HEE CHO |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of multiple semiconductor patterns arranged on a conductive line. These patterns are spaced apart from each other and have two vertical parts that face each other in a horizontal direction. A second conductive line is present between the vertical parts of each pattern, intersecting the first conductive line. A gate dielectric pattern is located between the vertical parts and between the second vertical part and the second conductive line. Additionally, a blocking pattern is placed between adjacent semiconductor patterns.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18062263. SEMICONDUCTOR DEVICE simplified abstract|18062263]])=== |
| − | A semiconductor device includes a first conductive line that extends in a first horizontal direction, a plurality of semiconductor patterns on the first conductive line and spaced apart from each other in the first horizontal direction wherein each of the semiconductor patterns includes a first vertical part and a second vertical part that are opposite to each other in the first horizontal direction, a second conductive line that extends in a second horizontal direction between the first vertical part and the second vertical part of each of the semiconductor patterns, the second horizontal direction intersecting the first horizontal direction, a gate dielectric pattern between the first vertical part and the second vertical part and between the second vertical part and the second conductive line, and a blocking pattern between neighboring semiconductor patterns.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18062263)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Dong Kyun LEE | | Dong Kyun LEE |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of multiple capacitor blocks and an electrode support. The first capacitor block has a conductive plate and lower electrodes, while the second capacitor block has a separate conductive plate and lower electrodes. There are also edge capacitor blocks surrounding each capacitor block, each with its own set of edge electrodes. The device includes a penetration pattern that goes through the electrode support, covering the lower electrodes but not the edge electrodes.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME ([[US Patent Application 18062264. SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME simplified abstract|18062264]])=== |
| − | A semiconductor device includes a first capacitor block including a first conductive plate, and first lower electrodes on the first conductive plate, a second capacitor block including a second conductive plate spaced apart from the first conductive plate, and second lower electrodes on the second conductive plate, a first edge capacitor block including first edge electrodes on the first conductive plate and surrounding the first capacitor block, a second edge capacitor block including a second edge electrodes on the second conductive plate and surrounding the second capacitor block and a first electrode support which supports the first lower electrodes, the second lower electrodes, the first edge electrodes, and the second edge electrodes. A first penetration pattern penetrates the first electrode support, is over the first lower electrodes and the second lower electrodes, and is not over the first edge electrodes and the second edge electrodes.
| + | |
| | | | |
| − | ===SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME (18062264)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Beom Seo KIM | | Beom Seo KIM |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor memory device that includes various components such as a substrate, a bit line, storage contacts, a storage pad, and an information storage portion. The storage contact is made up of a lower storage contact and an upper storage contact, with the lower storage contact being partially located in the substrate. The upper surface of the lower storage contact is in contact with the lower surface of the upper storage contact. Both the lower and upper storage contacts are made of semiconductor material.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18089956. SEMICONDUCTOR DEVICE simplified abstract|18089956]])=== |
| − | A semiconductor memory device including a substrate including an active area defined by an element isolation layer, a bit line extending in a first direction on the substrate, a storage contact on each of both sides of the bit line and connected to the active area, a storage pad on the storage contact and connected to the storage contact and an information storage portion on the storage pad and connected to the storage pad, wherein the storage contact includes a lower storage contact and an upper storage contact on the lower storage contact, at least a portion of the lower storage contact is in the substrate, an entire upper surface of the lower storage contact is in contact with an entire lower surface of the upper storage contact, and each of the lower storage contact and the upper storage contact includes a semiconductor material may be provided.
| + | |
| | | | |
| − | ===SEMICONDUCTOR DEVICE (18089956)===
| + | '''Main Inventor''' |
| | | | |
| − | '''Inventor'''
| |
| | Seonhaeng Lee | | Seonhaeng Lee |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device that has a specific structure. It includes a fin pattern that extends from a substrate in one direction. There are two active layers on top of the fin pattern, with the second layer being higher than the first layer. These layers form a structure. There are two gates that intersect the active layers, surrounding their surfaces and extending in another direction. The second gate is parallel to the first gate. The first active layer has a region that extends from where it overlaps with the first gate, and the second active layer also has a region that extends from where it overlaps with the first gate. However, the second region is shorter than the first region.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME ([[US Patent Application 18067390. SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME simplified abstract|18067390]])=== |
| − | A semiconductor device includes a first fin pattern protruding from a substrate and extending in a first direction; first and second active layers extending in the first direction on the first fin pattern, the second active layer being at a level higher than a level of the first active layer, the first and second active layers forming a first active layer structure; a first gate intersecting the first and second active layers, surrounding upper and lower surfaces and opposing side surfaces of each of the first and second active layers, and extending in a second direction; and a second gate intersecting the first and second active layers, surrounding upper and lower surfaces and opposing side surfaces of each of the first and second active layers, extending in the second direction, and disposed to be parallel to the first gate. The first active layer includes a first region extending from a first overlapping region of the first active layer overlapping the first gate by a first length in a direction away from the second gate, and the second active layer includes a first region extending from a first overlapping region of the second active layer overlapping the first gate by a second length in a direction away from the second gate, the second length shorter than the first length.
| |
| | | | |
| − | ===SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME (18067390)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Ji Hun NOH | | Ji Hun NOH |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor memory device that includes various components such as a substrate, an active area, a word line, a bit line, and a bit line contact. The bit line contact is directly connected to the bit line and the active area, and it is located between the substrate and the bit line. The bit line contact consists of a lower bit line contact that is directly connected to the active area, and an upper bit line contact that is on top of and in contact with the lower bit line contact. The width of the upper surface of the lower bit line contact is larger than the width of the lower surface of the upper bit line contact.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICES ([[US Patent Application 18116537. SEMICONDUCTOR DEVICES simplified abstract|18116537]])=== |
| − | A semiconductor memory device may include a substrate including an active area defined by an element isolation layer on the substrate, a word line crossing the active area and extending in a first direction, a bit line crossing the active area on the substrate and extending in a second direction, and a bit line contact directly connected to the bit line and the active area. The bit line contact may be between the substrate and the bit line. The bit line contact may include a lower bit line contact directly connected to the active area and an upper bit line contact on and in contact with the lower bit line contact. A width of an upper surface of the lower bit line contact in the second direction may be greater than a width of a lower surface of the upper bit line contact in the second direction.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICES (18116537)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Eunbin Seon | | Eunbin Seon |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of a metal silicide layer on a substrate. On top of the metal silicide layer, there is a contact plug structure. This structure includes a metal pattern made of a first metal, and a first barrier pattern that covers the lower surface and sidewall of the metal pattern. The first barrier pattern is in contact with the metal silicide layer and is made of a second metal. The metal silicide layer itself is composed of silicon, the second metal, and a third metal that is different from the second metal.
| |
| | | | |
| − | '''Abstract'''
| + | ===ACTIVE RESISTOR ARRAY OF SEMICONDUCTOR MEMORY DEVICE ([[US Patent Application 17883842. ACTIVE RESISTOR ARRAY OF SEMICONDUCTOR MEMORY DEVICE simplified abstract|17883842]])=== |
| − | A semiconductor device includes a metal silicide layer on a substrate, and a contact plug structure on the metal silicide layer. The contact plug structure includes a metal pattern including a first metal, and a first barrier pattern covering a lower surface and a sidewall of the metal pattern and contacting the metal silicide layer. The first barrier pattern includes a second metal. The metal silicide layer includes silicon, the second metal, and a third metal different from the second metal.
| |
| | | | |
| − | ===ACTIVE RESISTOR ARRAY OF SEMICONDUCTOR MEMORY DEVICE (17883842)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Ansoo PARK | | Ansoo PARK |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes an active resistor array in a semiconductor memory device. It includes multiple active resistors arranged in different regions, with isolation layers between them. The resistors are connected to selection transistors, which are controlled by the same gate layer. This design helps to improve the layout pattern and reduce process variation, resulting in better active resistance distribution.
| |
| | | | |
| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME ([[US Patent Application 18062251. SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME simplified abstract|18062251]])=== |
| − | An active resistor array of a semiconductor memory device comprises a first active resistor in a first active resistor region; a second active resistor in the first active resistor region and arranged in parallel with the first active resistor, and an isolation element layer interposed therebetween; a third active resistor formed in a second active resistor region; a first selection transistor formed in a first selection transistor region and connected to the second active resistor; and a second selection transistor formed in a second selection transistor region and connected to the third active resistor. The first and second selection transistors are connected to the same gate layer. The gate layer of the first and second selection transistors is on the isolation element layer. Since example embodiments may help to ensure the uniformity of the layout pattern, active resistance distribution may be improved due to reduction in process variation.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME (18062251)===
| |
| | | | |
| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Sangmin Kang | | Sangmin Kang |
| | | | |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device that consists of two main parts: a peripheral circuit structure and a memory cell structure.
| |
| | | | |
| − | The peripheral circuit structure includes a first substrate, which is a base material for the device. On this substrate, there are circuit devices and a lower wiring structure that connects these devices electrically. The lower wiring structure is covered by a lower insulating layer, and on top of that, there is a diffusion barrier layer.
| + | ===SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME ([[US Patent Application 18070536. SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME simplified abstract|18070536]])=== |
| | | | |
| − | The memory cell structure is located on a second substrate, which is placed on top of the peripheral circuit structure. This structure has two regions: the first region and the second region. In the first region, there are gate electrodes that are stacked and spaced apart from each other in a vertical direction. These gate electrodes form a staircase shape in the second region, extending in a horizontal direction.
| |
| | | | |
| − | The gate electrodes have channel structures that penetrate them in the vertical direction. Each channel structure includes a channel layer.
| + | '''Main Inventor''' |
| | | | |
| − | The diffusion barrier layer in the peripheral circuit structure is made of a first material layer that has a lower permeability to hydrogen compared to silicon nitride.
| + | Donghoon KWON |
| | | | |
| − | '''Abstract'''
| |
| − | A semiconductor device includes a peripheral circuit structure including: a first substrate, circuit devices on the first substrate, a lower wiring structure electrically connected to the circuit devices, a lower insulating layer covering the lower wiring structure, and a diffusion barrier layer on the lower insulating layer; and a memory cell structure including a second substrate including first and second regions on the peripheral circuit structure, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate in the first region and extending in a second direction perpendicular to the first direction to form a staircase shape in the second region, and channel structures penetrating the gate electrodes in the first direction and each including a channel layer. The diffusion barrier layer includes a first material layer having a hydrogen permeability lower than a hydrogen permeability of silicon nitride.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME (18070536)=== | + | ===SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME ([[US Patent Application 18150415. SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract|18150415]])=== |
| | | | |
| − | '''Inventor'''
| |
| − | Donghoon KWON
| |
| | | | |
| − | '''Brief explanation''' | + | '''Main Inventor''' |
| − | This abstract describes a semiconductor device that consists of various structures. These structures include a source structure, two stack structures with gate electrodes, a dummy structure with additional gate electrodes, separation regions, channel structures, and source contact structures. The purpose of these structures is to allow for the proper functioning of the semiconductor device.
| |
| | | | |
| − | '''Abstract'''
| + | Donghoon KWON |
| − | A semiconductor device includes a source structure, first and second stack structures, including first gate electrodes stacked on the source structure to be spaced apart from each other; a dummy structure on the source structure between the first and the second stack structures, and including second gate electrodes stacked to be spaced apart from each other; first separation regions passing through the first and second stack structures, and spaced apart from each other; second separation regions extending between each of the first and second stack structures and the dummy structure; channel structures passing through the first and second stack structures, and respectively including a channel layer, connected to the source structure through the channel layer; and first source contact structures passing through the dummy structure, and respectively including a first contact layer connected to the source structure through a lower surface of the first contact layer.
| |
| | | | |
| − | ===SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME (18150415)===
| |
| | | | |
| − | '''Inventor'''
| + | ===VERTICAL SEMICONDUCTOR DEVICE ([[US Patent Application 18166854. VERTICAL SEMICONDUCTOR DEVICE simplified abstract|18166854]])=== |
| − | Donghoon KWON
| |
| | | | |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of two semiconductor structures. The first structure has a substrate, and the second structure is built on top of it. The second structure includes stacked gate electrodes, insulating layers, through-insulating regions, a capping insulating layer, and an upper insulating layer. There are also channel structures, contact plugs, bit lines, and conductive patterns. The conductive patterns have connection portions that are part of the contact plugs.
| |
| | | | |
| − | '''Abstract''' | + | '''Main Inventor''' |
| − | A semiconductor device includes a first semiconductor structure including a first substrate and a second semiconductor structure on the first semiconductor structure. The second semiconductor structure includes gate electrodes stacked on the second substrate, interlayer insulating layers alternately stacked with the gate electrodes, through-insulating regions passing through the gate electrodes in a second region, a capping insulating layer covering the gate electrodes and the interlayer insulating layers, an upper insulating layer on the capping insulating layer, channel structures passing through the capping insulating layer and the gate electrodes in a first region, upper contact plugs passing through the upper insulating layer, bit lines on the upper insulating layer, first contact plugs passing through the capping insulating layer, and conductive patterns including second contact plugs passing through each of the through-insulating regions in the second region. The conductive patterns include connection portions integral with the second contact plugs.
| |
| | | | |
| − | ===VERTICAL SEMICONDUCTOR DEVICE (18166854)===
| + | Sunggil KIM |
| | | | |
| − | '''Inventor'''
| |
| − | Sunggil KIM
| |
| | | | |
| − | '''Brief explanation'''
| + | ===NONVOLATILE MEMORY DEVICE ([[US Patent Application 18209983. NONVOLATILE MEMORY DEVICE simplified abstract|18209983]])=== |
| − | The abstract describes a vertical semiconductor device that consists of a substrate, a pattern structure, and a channel structure. The pattern structure is made up of insulation patterns and gate structures stacked vertically on the substrate. The channel structure runs through the pattern structure and extends vertically. It includes a data storage structure on the inner surface of the channel hole, a channel that contacts the data storage structure, a lower pattern positioned at the bottom of the channel hole, and a filling insulation pattern covering the channel and lower pattern. The channel has a cylindrical shape, and the lower pattern contains silicon and germanium in the form of oxide.
| |
| | | | |
| − | '''Abstract'''
| |
| − | A vertical semiconductor device may include a substrate, a pattern structure on the substrate, and a channel structure in a channel hole passing through the pattern structure. The pattern structure may include insulation patterns and gate structures alternately stacked in a vertical direction perpendicular to an upper surface of the substrate. The channel structure may extend in the vertical direction. The channel structure may include a data storage structure on an inner surface of the channel hole, a channel contacting the data storage structure, a lower pattern on the channel positioned at a lower portion of the channel hole, and a filling insulation pattern on the channel and the lower pattern. The channel may have a cylindrical shape. The lower pattern may include an oxide including silicon and germanium.
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| − | ===NONVOLATILE MEMORY DEVICE (18209983)===
| + | '''Main Inventor''' |
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| − | '''Inventor'''
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| | Gi Yong CHUNG | | Gi Yong CHUNG |
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| − | '''Brief explanation'''
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| − | The abstract describes a nonvolatile memory device that has a substrate with a cell array region. The device includes a first gate electrode with an opening on the cell array region, and above it, there are multiple second gate electrodes stacked. These second gate electrodes have convex portions that curve outward towards the substrate. Additionally, there is a word line cutting region that cuts through the opening and the convex portions.
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| − | '''Abstract'''
| + | ===SEMICONDUCTOR MEMORY DEVICES HAVING STACKED STRUCTURES THEREIN THAT SUPPORT HIGH INTEGRATION ([[US Patent Application 18333886. SEMICONDUCTOR MEMORY DEVICES HAVING STACKED STRUCTURES THEREIN THAT SUPPORT HIGH INTEGRATION simplified abstract|18333886]])=== |
| − | A nonvolatile memory device includes a substrate including a cell array region, a first gate electrode including an opening on the cell array region of the substrate, a plurality of second gate electrodes stacked above the first gate electrode and including convex portions having an outward curve extending toward the substrate, and a word line cutting region cutting the opening and the convex portions.
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| − | ===SEMICONDUCTOR MEMORY DEVICES HAVING STACKED STRUCTURES THEREIN THAT SUPPORT HIGH INTEGRATION (18333886)===
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| − | '''Inventor''' | + | '''Main Inventor''' |
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| | Sangjae Lee | | Sangjae Lee |
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| − | '''Brief explanation'''
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| − | This abstract describes a semiconductor device that consists of multiple layers stacked on top of each other. The device includes a channel structure that runs through these layers. The lower stack structure has two layers of electrodes - a first layer located at the interface between the lower and upper stack structures, and a second layer in the center of the lower stack structure. Similarly, the upper stack structure also has two layers of electrodes - a first layer at the interface and a second layer in the center. The first layer of either the lower or upper electrodes is thicker than the second layer. Additionally, there is at least one insulating layer between the first layer of the lower electrode and the first layer of the upper electrode.
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| − | '''Abstract'''
| + | ===ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME ([[US Patent Application 18332972. ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract|18332972]])=== |
| − | A semiconductor device includes an upper stack structure extending on a lower stack structure, which extends on an underlying substrate. A channel structure extends through the upper stack structure and the lower stack structure. The lower stack structure includes a first lower electrode layer disposed adjacent to an interface between the lower stack structure and the upper stack structure, and a second lower electrode layer disposed adjacent a center of the lower stack structure. The upper stack structure includes a first upper electrode layer disposed adjacent to the interface, and a second upper electrode layer disposed adjacent a center of the upper stack structure. At least one of the first lower electrode layer and the first upper electrode layer is thicker than the second lower electrode layer. At least one insulating layer is disposed between the first lower electrode layer and the first upper electrode layer.
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| − | ===ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME (18332972)===
| + | '''Main Inventor''' |
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| − | '''Inventor'''
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| | Jinseong HEO | | Jinseong HEO |
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| − | '''Brief explanation'''
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| − | The abstract describes an electronic device and a method of manufacturing it. The device has two regions on a substrate, each containing a different device. The first device has a layer with a ferroelectric domain and a gate electrode, while the second device has a different layer with a ferroelectric domain and a gate electrode. These two layers have different characteristics when it comes to polarization change caused by an electric field. The first layer exhibits a non-hysteretic behavior, meaning it does not retain any memory of the electric field, while the second layer exhibits a hysteretic behavior, meaning it retains memory of the electric field.
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| − | '''Abstract'''
| + | ===CHALCOGENIDE MATERIAL, SWITCHING DEVICE INCLUDING THE CHALCOGENIDE MATERIAL, AND MEMORY DEVICE INCLUDING THE SWITCHING DEVICE ([[US Patent Application 18176750. CHALCOGENIDE MATERIAL, SWITCHING DEVICE INCLUDING THE CHALCOGENIDE MATERIAL, AND MEMORY DEVICE INCLUDING THE SWITCHING DEVICE simplified abstract|18176750]])=== |
| − | Provided are an electronic device and a method of manufacturing the same. The electronic device may include a first device provided on a first region of a substrate; and a second device provided on a second region of the substrate, wherein the first device may include a first domain layer including a ferroelectric domain and a first gate electrode on the first domain layer, and the second device may include a second domain layer including a ferroelectric domain and a second gate electrode on the second domain layer. The first domain layer and the second domain layer may have different characteristics from each other at a polarization change according to an electric field. At the polarization change according to the electric field, the first domain layer may have substantially a non-hysteretic behavior characteristic and the second domain layer may have a hysteretic behavior characteristic.
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| − | ===CHALCOGENIDE MATERIAL, SWITCHING DEVICE INCLUDING THE CHALCOGENIDE MATERIAL, AND MEMORY DEVICE INCLUDING THE SWITCHING DEVICE (18176750)===
| + | '''Main Inventor''' |
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| − | '''Inventor'''
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| | Hajun SUNG | | Hajun SUNG |
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| − | '''Brief explanation'''
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| − | The abstract describes a type of chalcogenide material that contains specific elements such as germanium, arsenic, sulfur, selenium, and a group III metal (indium, gallium, or aluminum). The composition of the material is defined by the percentage of each element present. For example, the content of germanium is between 10% and 30%, arsenic is between 30% and 50%, selenium is between 20% and 60%, sulfur is between 0.5% and 10%, and the group III metal is between 0.5% and 10%.
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| − | '''Abstract'''
| + | ===SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME ([[US Patent Application 18149929. SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract|18149929]])=== |
| − | A chalcogenide material according to one embodiment includes germanium (Ge); arsenic (As); sulfur (S); selenium (Se), and at least one group III metal selected from indium (In), gallium (Ga), and aluminum (Al), wherein the content of the Ge may be greater than about 10 at % and less than or equal to about 30 at %, the content of the As may be greater than about 30 at % and less than or equal to about 50 at %, the content of Se is greater than about 20 at % and less than or equal to about 60 at %, the content of S is greater than about 0.5 at % and less than or equal to about 10 at %, and the content of the group III metal may be in the range of 0.5 at % to 10 at %.
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| − | ===SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME (18149929)===
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| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Bongyong LEE | | Bongyong LEE |
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| − | '''Brief explanation'''
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| − | This abstract describes a semiconductor device that consists of two substrate structures. The first substrate structure includes a substrate, circuit elements, and bonding layers. The second substrate structure is placed on top of the first one and includes a plate layer, an insulating layer made of silicon nitride, gate electrodes, and a channel structure with a semiconductor layer. The two substrate structures are connected through bonding layers. The channel hole in the second substrate structure has a narrower width in the portion passing through the gate electrodes and a wider width in the portion passing through the insulating layer.
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| − | '''Abstract'''
| + | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE ORGANIC LIGHT-EMITTING DEVICE ([[US Patent Application 18298794. ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE ORGANIC LIGHT-EMITTING DEVICE simplified abstract|18298794]])=== |
| − | A semiconductor device may include a first substrate structure including a substrate, circuit elements on the substrate, and first bonding layers on the circuit elements, and a second substrate structure on the first substrate structure. The second substrate structure may include a plate layer, an intermediate insulating layer below the plate layer and including silicon nitride, gate electrodes below the intermediate insulating layer and stacked to be spaced apart from each other in a vertical direction, a channel structure in a channel hole passing through the intermediate insulating layer and the gate electrodes and including a semiconductor layer, and second bonding layers connected to the first bonding layers. The channel hole may have a first width in a first portion passing through the gate electrodes and a second width, wider than the first width, in a second portion passing through the intermediate insulating layer.
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| − | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE ORGANIC LIGHT-EMITTING DEVICE (18298794)===
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| − | '''Inventor''' | + | '''Main Inventor''' |
| | + | |
| | Ohyun Kwon | | Ohyun Kwon |
| − |
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| − | '''Brief explanation'''
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| − | The abstract describes an organometallic compound, which is represented by a formula referred to as Formula 1. The abstract does not provide any further details about the compound or its properties.
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| − |
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| − | '''Abstract'''
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| − | An organometallic compound represented by Formula 1:
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