US Patent Application 18205715. CAPACITOR AND MEMORY DEVICE simplified abstract

CAPACITOR AND MEMORY DEVICE

Inventors

Cheoljin Cho of Hwaseong-si (KR)

Jaesoon Lim of Seoul (KR)

Jaehyoung Choi of Hwaseong-si (KR)

Jungmin Park of Seoul (KR)

CAPACITOR AND MEMORY DEVICE - A simplified explanation of the abstract

• This abstract for appeared for patent application number 18205715 Titled 'CAPACITOR AND MEMORY DEVICE'

Simplified Explanation

The abstract describes a capacitor and a DRAM (dynamic random-access memory) device. The capacitor consists of a lower electrode, a dielectric layer structure, and an upper electrode. The dielectric layer structure is made up of three layers stacked in sequence: a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer. The hafnium oxide layer has either a tetragonal crystal phase or an orthorhombic crystal phase.

Original Abstract Submitted

A capacitor and a DRAM device, the capacitor including a lower electrode; a dielectric layer structure on the lower electrode, the dielectric layer structure including a first zirconium oxide layer, a hafnium oxide layer, and a second zirconium oxide layer sequentially stacked; and an upper electrode on the dielectric layer structure, wherein the hafnium oxide layer has a tetragonal crystal phase or an orthorhombic crystal phase.