US Patent Application 18328322. SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

Inventors

YEONGKWON Ko of HWASEONG-SI (KR)

JAEEUN Lee of SUWON-SI (KR)

JUNYEONG Heo of SUWON-SI (KR)

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract

• This abstract for appeared for patent application number 18328322 Titled 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME'

Simplified Explanation

This abstract describes a semiconductor device that includes a semiconductor substrate with two opposing surfaces. On one surface, there are multiple semiconductor elements arranged in a specific area. The other surface is divided into two regions - one that overlaps with the area of the semiconductor elements and another that surrounds it. An insulating protective layer is placed on the second surface of the substrate, and it includes an edge pattern in the surrounding region. This edge pattern can have a thinner portion compared to the center portion of the protective layer or an open region that exposes the second surface of the substrate. Additionally, there is a connection pad located on the center portion of the protective layer, which is electrically connected to the semiconductor elements.

Original Abstract Submitted

A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, a plurality of semiconductor elements disposed on the first surface in a device region, an insulating protective layer, and a connection pad. The second surface is divided into a first region overlapping the device region, and a second region surrounding the first region. The insulating protective layer is disposed on the second surface of the semiconductor substrate, and includes an edge pattern positioned in the second region. The edge pattern includes a thinner portion having a thickness smaller than a thickness of a center portion of the insulating protective layer positioned in the first region and/or an open region exposing the second surface of the semiconductor substrate. The connection pad is disposed on the center portion of the insulating protective layer and is electrically connected to the semiconductor elements.