US Patent Application 18062251. SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME simplified abstract
Contents
SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
Inventors
Kyungwook Park of Suwon-si (KR)
SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME - A simplified explanation of the abstract
- This abstract for appeared for patent application number 18062251 Titled 'SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME'
Simplified Explanation
The abstract describes a semiconductor device that consists of two main parts: a peripheral circuit structure and a memory cell structure.
The peripheral circuit structure includes a first substrate, which is a base material for the device. On this substrate, there are circuit devices and a lower wiring structure that connects these devices electrically. The lower wiring structure is covered by a lower insulating layer, and on top of that, there is a diffusion barrier layer.
The memory cell structure is located on a second substrate, which is placed on top of the peripheral circuit structure. This structure has two regions: the first region and the second region. In the first region, there are gate electrodes that are stacked and spaced apart from each other in a vertical direction. These gate electrodes form a staircase shape in the second region, extending in a horizontal direction.
The gate electrodes have channel structures that penetrate them in the vertical direction. Each channel structure includes a channel layer.
The diffusion barrier layer in the peripheral circuit structure is made of a first material layer that has a lower permeability to hydrogen compared to silicon nitride.
Original Abstract Submitted
A semiconductor device includes a peripheral circuit structure including: a first substrate, circuit devices on the first substrate, a lower wiring structure electrically connected to the circuit devices, a lower insulating layer covering the lower wiring structure, and a diffusion barrier layer on the lower insulating layer; and a memory cell structure including a second substrate including first and second regions on the peripheral circuit structure, gate electrodes stacked and spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate in the first region and extending in a second direction perpendicular to the first direction to form a staircase shape in the second region, and channel structures penetrating the gate electrodes in the first direction and each including a channel layer. The diffusion barrier layer includes a first material layer having a hydrogen permeability lower than a hydrogen permeability of silicon nitride.
