US Patent Application 18204505. SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME simplified abstract

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

Inventors

YOUNGWOO Park of Cheonan-Si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A simplified explanation of the abstract

• This abstract for appeared for patent application number 18204505 Titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME'

Simplified Explanation

This abstract describes a semiconductor package that includes several layers to protect and enclose semiconductor chips. The package includes a substrate, a first semiconductor chip on the substrate, and an inner mold layer that partially encloses the first chip. There is also an inner shielding layer that encloses the inner mold layer and is electrically connected to a ground pad on the substrate. Additionally, there is a second semiconductor chip stack on the inner shielding layer, an outer mold layer that partially encloses the inner shielding layer and the second chip stack, and an outer shielding layer that partially encloses the outer mold layer. Both the inner and outer shielding layers are made of a conductive material.

Original Abstract Submitted

A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.