Micron Technology, Inc. patent applications published on November 9th, 2023

Summary of the patent applications from Micron Technology, Inc. on November 9th, 2023

Micron Technology, Inc. has recently filed several patents related to integrated circuits, memory systems, and microelectronic devices. These patents cover various aspects of memory arrays, memory cells, memory systems, transistors, and electronic systems. The organization's innovative technologies aim to improve memory performance, power efficiency, and error check functionality.

Summary: Micron Technology, Inc. has filed patents for: - Integrated circuits with memory arrays consisting of strings of memory cells made up of laterally-spaced memory blocks. - Apparatuses with multiple memory cells arranged in a memory cell array region, along with word lines and insulating walls in the peripheral region. - Memory systems that include memory components and a controller, which stores data items in separate memory regions based on their contexts. - Keeper devices used in hybrid loop unrolled DFE circuits, which selectively output signals from equalizers based on the previous bit value to save power. - Structures called inter-gate dielectric structures, placed between adjacent gates in transistors, memory devices, and systems. - Microelectronic devices with vertical inverters, pillar structures, and vertical transistors connected to conductive lines. - Methods, systems, and devices for self-repair verification in memory systems, involving replacing memory cells and comparing data to determine successful repair. - Error check functionality in memory devices that store encoded data, where intentional errors are introduced and an indicator is determined based on read results. - Methods for programming memory cells in blocks, involving precharging and applying programming voltages to selected cells. - Processing devices in memory systems that connect data blocks using wordline connections driven by a single string driver.

Notable Applications:

• Integrated circuits with memory arrays consisting of strings of memory cells made up of laterally-spaced memory blocks.
• Memory systems that store data items in separate memory regions based on their contexts.
• Microelectronic devices with vertical inverters, pillar structures, and vertical transistors connected to conductive lines.
• Methods for self-repair verification in memory systems, involving replacing memory cells and comparing data to determine successful repair.
• Error check functionality in memory devices that store encoded data, where intentional errors are introduced and an indicator is determined based on read results.
• Methods for programming memory cells in blocks, involving precharging and applying programming voltages to selected cells.
• Processing devices in memory systems that connect data blocks using wordline connections driven by a single string driver.

Patent applications for Micron Technology, Inc. on November 9th, 2023

ADAPTIVE MEDIA MANAGEMENT FOR MEMORY SYSTEMS (17739755)

Main Inventor

Zhenming Zhou

FREQUENCY REGULATION FOR MEMORY MANAGEMENT COMMANDS (17662187)

Main Inventor

Bryan David Kerstetter

MEMORY MANAGEMENT PROCEDURES FOR WRITE BOOST MODE (17630113)

Main Inventor

Xing Wang

REUSING OR REPURPOSING MICROELECTRONIC DEVICES, AND ASSOCIATED METHODS, DEVICES, AND SYSTEMS (17661973)

Main Inventor

Srinivasa Anuradha Bulusu

DISTRIBUTED POWER UP FOR A MEMORY SYSTEM (17737539)

Main Inventor

Giuseppe Cariello

MULTI-PARTITION FILE SYSTEM FOR STORING VIDEO STREAMS IN A MANAGED NON-VOLATILE MEMORY DEVICE (17842197)

Main Inventor

Lei PAN

MEMORY READ CALIBRATION BASED ON MEMORY DEVICE-ORIGINATED METADATA CHARACTERIZING VOLTAGE DISTRIBUTIONS (17735458)

Main Inventor

Dung Viet Nguyen

CONFIGURABLE BUFFERED I/O FOR MEMORY SYSTEMS (17735583)

Main Inventor

Jose Rey C. De Luna

ENABLING MULTIPLE DATA CAPACITY MODES AT A MEMORY SUB-SYSTEM (18349849)

Main Inventor

Fangfang Zhu

BOOT PROCESSES FOR STORAGE SYSTEMS (17661983)

Main Inventor

Sourin SARKAR

CUSTOM ERROR RECOVERY IN SELECTED REGIONS OF A DATA STORAGE DEVICE (18352613)

Main Inventor

Alex Frolikov

PERFORMANCE BENCHMARK FOR HOST PERFORMANCE BOOSTER (17597985)

Main Inventor

Bin Zhao

TECHNIQUES FOR A FRAGMENT CURSOR (17633523)

Main Inventor

Xu Zhang

MEMORY WRITE PERFORMANCE TECHNIQUES (17633525)

Main Inventor

Bin Zhao

VALIDITY MAPPING TECHNIQUES (17630453)

Main Inventor

Xing Wang

STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY (18223843)

Main Inventor

Sanjay Subbarao

PULSE BASED MULTI-LEVEL CELL PROGRAMMING (17740069)

Main Inventor

Hernan A. Castro

TECHNIQUES TO MITIGATE MEMORY DIE MISALIGNMENT (17629600)

Main Inventor

Jie Yang

SEMICONDUCTOR DEVICE HAVING POWER CONTROL CIRCUIT (17740200)

Main Inventor

Kazuhiro Yoshida

APPARATUSES AND METHODS FOR COMPENSATED SENSE AMPLIFIER WITH CROSS COUPLED N-TYPE TRANSISTORS (17662198)

Main Inventor

Jiyun Li

APPARATUSES FOR SENSE AMPLIFIER VOLTAGE CONTROL (17737999)

Main Inventor

Sang-Kyun Park

CORRECTIVE READS WITH IMPROVED RECOVERY FROM DATA RETENTION LOSS (18142112)

Main Inventor

Huai-Yuan Tseng

TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING (17740062)

Main Inventor

Innocenzo Tortorelli

PARTIAL BLOCK HANDLING IN A NON-VOLATILE MEMORY DEVICE (17739741)

Main Inventor

Zhongguang Xu

MEMORY PROGRAMMING USING CONSECUTIVE COARSE-FINE PROGRAMMING OPERATIONS OF THRESHOLD VOLTAGE DISTRIBUTIONS (18138551)

Main Inventor

Huai-Yuan Tseng

MEMORY SYSTEMS WITH FLEXIBLE ERASE SUSPEND-RESUME OPERATIONS, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS (17739789)

Main Inventor

Pitamber Shukla

MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM (18224179)

Main Inventor

Kalyan Chakravarthy Kavalipurapu

REDUCING PROGRAMMING DISTURBANCE IN MEMORY DEVICES (18195181)

Main Inventor

Aaron Yip

ERROR CHECK FUNCTIONALITY VERIFICATION USING KNOWN ERRORS (17738600)

Main Inventor

Francesco Lupo

SELF-REPAIR VERIFICATION (17735528)

Main Inventor

Takuya Tamano

MICROELECTRONIC DEVICES INCLUDING VERTICAL INVERTERS, AND ELECTRONIC SYSTEMS (17661979)

Main Inventor

Kamal M. Karda

FINFET ISOLATION DEVICE AND METHOD (17738521)

Main Inventor

Neng-Kuo Chen

HYBRID LOOP UNROLLED DECISION FEEDBACK EQUALIZER ARCHITECTURE (17736802)

Main Inventor

Jennifer E. Taylor

OPTIMIZATION OF DATA ACCESS AND COMMUNICATION IN MEMORY SYSTEMS (18351991)

Main Inventor

Parag R. Maharana

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME (17740064)

Main Inventor

Yuki Munetaka

Integrated Circuitry And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells (18218496)

Main Inventor

John D. Hopkins