US Patent Application 18223843. STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY simplified abstract
Contents
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
Organization Name
Inventor(s)
Sanjay Subbarao of Irvine CA (US)
STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18223843 titled 'STORING A LOGICAL-TO-PHYSICAL MAPPING IN NAND MEMORY
Simplified Explanation
The patent application describes a processing device that receives a request for a host-initiated operation on a specific part of a memory device.
- The processing device uses a second L2P table to map logical addresses to physical addresses in a different part of the memory device.
- The second L2P table helps identify the physical location within the memory device corresponding to the logical address.
- This physical location corresponds to a portion of a first L2P table that specifies the physical address within the desired part of the memory device.
- The processing device then performs the host-initiated operation at the identified physical address.
Original Abstract Submitted
A processing device receives a request specifying a logical address associated with a host-initiated operation directed at a first portion of a memory device. The processing device accesses a second L2P table comprising a mapping between logical addresses and physical addresses in a second portion of the memory device. A physical location within the second portion of the memory device is identified based on the second L2P table. The physical location corresponds to a portion of a first L2P table that specifies a physical address within the first portion of the memory device that corresponds to the logical address. The physical address is identified based on the portion of the first L2P table and the host-initiated operation is performed at the physical address.
