US Patent Application 18218496. Integrated Circuitry And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells simplified abstract

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Integrated Circuitry And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells

Organization Name

Micron Technology, Inc.


Inventor(s)

John D. Hopkins of Meridian ID (US)

Ayssa N. Scarbrough of Boise ID (US)

Integrated Circuitry And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells - A simplified explanation of the abstract

This abstract first appeared for US patent application 18218496 titled 'Integrated Circuitry And Method Used In Forming A Memory Array Comprising Strings Of Memory Cells

Simplified Explanation

The patent application describes an integrated circuit with a memory array that includes strings of memory cells.

  • The memory cells are made up of laterally-spaced memory blocks, each containing a vertical stack of alternating insulative and conductive tiers.
  • The conductive tiers have horizontally-elongated conductive lines.
  • The memory cells also have channel-material strings that extend through the insulative and conductive tiers.
  • The integrated circuit also includes a second vertical stack next to the first one.
  • The second vertical stack has an upper portion with alternating insulating tiers and a lower portion with a lowest insulator tier made of solid carbon and nitrogen-containing material.
  • There is an immediately-adjacent tier above the lowest insulator tier, made of a different composition.
  • The patent application also mentions other embodiments and methods related to the invention.


Original Abstract Submitted

Integrated circuitry comprising a memory array comprises strings of memory cells comprising laterally-spaced memory blocks that individually comprise a first vertical stack comprising alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The conductive tiers individually comprise a horizontally-elongated conductive line. A second vertical stack is aside the first vertical stack. The second vertical stack comprises an upper portion and a lower portion. The upper portion comprises alternating first insulating tiers and second insulating tiers. The lower portion comprises a lowest insulator tier directly above conductor material of a conductor tier. The lowest insulator tier comprises solid carbon and nitrogen-containing material. An immediately-adjacent tier is directly above the solid carbon and nitrogen-containing material of the lowest insulator tier. The immediately-adjacent tier comprises material that is of different composition from that of the lowest insulator tier. Other embodiments, including methods, are disclosed.

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