US Patent Application 17735528. SELF-REPAIR VERIFICATION simplified abstract
Contents
SELF-REPAIR VERIFICATION
Organization Name
Inventor(s)
Takuya Tamano of Boise ID (US)
Yoshinori Fujiwara of Boise ID (US)
SELF-REPAIR VERIFICATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 17735528 titled 'SELF-REPAIR VERIFICATION
Simplified Explanation
- This patent application describes methods, systems, and devices for self-repair verification in a memory system. - The memory system receives a command to initiate a repair operation, which involves replacing a first row of memory cells with a second row of memory cells. - The memory system writes first data to the second row of memory cells and reads second data from the second row of memory cells. - The memory system uses a stored indication associated with the replacement of rows to determine if the repair operation was successful. - If the second data matches the first data, the memory device outputs an error flag with a first value indicating that the repair operation was successfully performed.
Original Abstract Submitted
Methods, systems, and devices for self-repair verification are described. A memory system may receive, at a memory device, a command to initiate a repair operation. The memory system may perform the repair operation by replacing a first row of memory cells of the memory device with a second row of memory cells of the memory device. The memory system may write first data to the second row of memory cells, and read second data from the second row of memory cells, based on a stored indication associated with the replacement of rows. The memory device may output an error flag with a first value based at least in part on reading the second data, and the first value of the error flag may indicate that the repair operation was successfully performed based at least in part on the second data matching the first data.
