US Patent Application 17740062. TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING simplified abstract
Contents
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
Organization Name
Inventor(s)
Innocenzo Tortorelli of Cernusco Sul Naviglio (IT)
Alessandro Sebastiani of Piacenza (IT)
Mattia Robustelli of Milano (IT)
[[Matteo Impal� of Milano (IT)]]
TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17740062 titled 'TECHNIQUES FOR MULTI-LEVEL MEMORY CELL PROGRAMMING
Simplified Explanation
The patent application describes improved techniques for programming multi-level memory cells.
- The memory array receives a command to store a logic state in a memory cell capable of storing three or more logic states.
- An erase operation is performed by applying a pulse with a certain polarity to multiple memory cells, including the target memory cell, to store a different logic state in them.
- A write operation or an erase operation involves applying one or more pulses with a different polarity to the memory cell to store the desired logic state based on the initial pulse applied during the erase operation.
Original Abstract Submitted
Methods, systems, and devices for improved techniques for multi-level memory cell programming are described. A memory array may receive a first command to store a first logic state in a memory cell for storing three or more logic states. The memory array may apply, as part of an erase operation, a first pulse with a first polarity to a plurality of memory cells to store a second logic state different from the first logic state in the plurality of memory cells, where the plurality of memory cells includes the memory cell. The memory array may apply, as part of a write operation or as part of the erase operation, one or more second pulses with a second polarity to the memory cell to store the first logic state in the memory cell based on applying the first pulse.
