US Patent Application 17740200. SEMICONDUCTOR DEVICE HAVING POWER CONTROL CIRCUIT simplified abstract

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SEMICONDUCTOR DEVICE HAVING POWER CONTROL CIRCUIT

Organization Name

Micron Technology, Inc.


Inventor(s)

Kazuhiro Yoshida of Saitama-shi (JP)

Go Takashima of Sagamihara (JP)

Haruka Momota of Sagamihara (JP)

SEMICONDUCTOR DEVICE HAVING POWER CONTROL CIRCUIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17740200 titled 'SEMICONDUCTOR DEVICE HAVING POWER CONTROL CIRCUIT

Simplified Explanation

The patent application describes an apparatus that includes a semiconductor substrate with source and drain regions, as well as gate electrodes.

  • The apparatus has a semiconductor substrate with source and drain regions, which are connected to power supply lines.
  • The first drain region is positioned between the first and second source regions, while the second source region is positioned between the first and second drain regions.
  • The gate electrodes consist of a first gate electrode between the first source and drain regions, a second gate electrode between the first drain and second source regions, and a third gate electrode between the second source and drain regions.
  • The first and third gate electrodes are supplied with a first control signal, while the second gate electrode is supplied with a second control signal.


Original Abstract Submitted

Disclosed herein is an apparatus that includes: a semiconductor substrate including first and second source regions coupled to a first power supply line and first and second drain regions coupled to a second power supply line, the first drain region being arranged between the first and second source regions, the second source region being arranged between the first and second drain regions; and gate electrodes including a first gate electrode arranged between the first source region and the first drain region, a second gate electrode arranged between the first drain region and the second source region, and a third gate electrode arranged between the second source region and the second drain region. The first and third gate electrodes are supplied with a first control signal. The second gate electrode is supplied with a second control signal.