US Patent Application 17630453. VALIDITY MAPPING TECHNIQUES simplified abstract
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VALIDITY MAPPING TECHNIQUES
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VALIDITY MAPPING TECHNIQUES - A simplified explanation of the abstract
This abstract first appeared for US patent application 17630453 titled 'VALIDITY MAPPING TECHNIQUES
Simplified Explanation
The patent application describes methods, systems, and devices for validity mapping techniques in a memory device.
- The memory device uses a change log to update a mapping that indicates whether data stored at respective physical addresses is valid.
- When the memory device receives a command associated with data having a set of addresses, it sets an entry in the change log based on whether the addresses are consecutive.
- The memory device identifies whether the set of addresses are consecutive and sets a flag in the change log entry to indicate this.
- The memory device then updates one or more entries of the mapping corresponding to the change log entry to indicate whether the addresses store valid data.
Original Abstract Submitted
Methods, systems, and devices for validity mapping techniques are described. A memory device may use a change log to update a mapping that indicates whether data stored at respective physical addresses is valid. For example, the memory device may receive a command associated with data having a corresponding set of addresses (whether logical block addresses or physical addresses). The memory device may set an entry of the change log based on whether the set of addresses are consecutive. For example, the memory device may identify whether the set of addresses are consecutive and may set a flag in the entry of the change log to indicate whether the addresses are consecutive. Then, the memory device may update one or more entries of the mapping corresponding to the entry of the change log to indicate whether the addresses corresponding to the one or more entries of the mapping store valid data.
