US Patent Application 18349849. ENABLING MULTIPLE DATA CAPACITY MODES AT A MEMORY SUB-SYSTEM simplified abstract

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ENABLING MULTIPLE DATA CAPACITY MODES AT A MEMORY SUB-SYSTEM

Organization Name

Micron Technology, Inc.


Inventor(s)

Fangfang Zhu of San Jose CA (US)

Chih-Kuo Kao of Fremont CA (US)

Jiangli Zhu of San Jose CA (US)

Ying Yu Tai of Mountain View CA (US)

ENABLING MULTIPLE DATA CAPACITY MODES AT A MEMORY SUB-SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 18349849 titled 'ENABLING MULTIPLE DATA CAPACITY MODES AT A MEMORY SUB-SYSTEM

Simplified Explanation

The patent application describes a method for determining whether a memory sub-system operates at full capacity or reduced capacity.

  • The full capacity mode allows access to data through a set of memory devices using a number of physical data channels that matches the number of logical data channels.
  • The reduced capacity mode allows access to data through a fewer number of physical data channels compared to the logical data channels.
  • A data structure is updated to include mappings between physical and logical data channels based on the determination of the memory sub-system mode.
  • The updated data structure is used to execute memory access operations for accessing data items in memory cells of the memory devices.


Original Abstract Submitted

A determination is made of whether a memory sub-system operates in a full capacity mode or a reduced capacity mode. The full capacity mode corresponds to accessing data residing at a set of memory devices via a number of physical data channels that corresponds to a number of logical data channels. The reduced capacity mode corresponds to accessing the data via a number of physical data channels that is less than the number of logical data channels. A data structure is updated to include one or more mappings between physical data channels and logical data channels according to the determination. A memory access operation to access a data item at memory cells of at least one of the set of memory devices is executed based on the one or more mappings of the data structure.