Samsung Electronics Co., Ltd. patent applications published on October 19th, 2023

Summary of the patent applications from Samsung Electronics Co., Ltd. on October 19th, 2023

Samsung Electronics Co., Ltd. has recently filed several patents related to semiconductor memory devices and their fabrication methods. These patents describe various types of memory devices, including those using a variable resistance layer, a three-dimensional semiconductor integrated circuit, a 3D semiconductor memory device, and a memory core circuit. The patents also cover methods for making these devices.

Some notable applications of these patents include:

• A memory device with a variable resistance layer that allows for electric current to flow in a direction perpendicular to the stacking direction of two layers.
• A three-dimensional semiconductor integrated circuit with multiple dies, including a power supply circuit, an SRAM device, and a processor, connected through through-silicon-vias (TSVs).
• A semiconductor device with gate electrodes, vertical structures, and upper interconnection structures, including bit lines and back gate interconnections.
• A 3D semiconductor memory device built in a horizontal structure on top of a substrate, with stacked horizontal patterns, electrodes, vertical patterns, and a separation structure.
• A semiconductor memory device with a peripheral logic structure, a horizontal conductive substrate, stacked electrode pads, a plate contact plug, and a first penetration electrode.
• A memory core circuit with a memory cell array and a core control circuit, including sub peripheral circuits with multiple bitline sense amplifiers and rest circuits.
• A semiconductor memory device with a substrate, doped regions, gate electrodes, bit lines, spacers, contacts, landing pads, and data storing elements.
• A semiconductor device with a cell capacitor consisting of a first electrode, a dielectric layer structure, and a second electrode made of ferroelectric, antiferroelectric, and paraelectric materials.
• Semiconductor memory devices with peripheral circuit structures, cell array structures, and dielectric layers with different hydrogen concentrations.
• A semiconductor device with a substrate, a capacitor contact structure, a lower electrode with two layers, a capacitor insulating layer, and an upper electrode, with a specific element concentration difference between the inner and outer sidewalls of the lower electrode.

Overall, these patents demonstrate Samsung Electronics Co., Ltd.'s focus on developing innovative semiconductor memory devices and their fabrication methods, with a particular emphasis on three-dimensional integration, variable resistance layers, and improved performance and reliability.

Patent applications for Samsung Electronics Co., Ltd. on October 19th, 2023

CLEANER (18342225)

Main Inventor

Dongjin CHO

Brief explanation

The abstract describes a cleaner that has a housing, a filtering member, and a main body. The main body can be moved relative to the housing and includes a dirt removal member, an opening and closing device, and a connecting frame. The connecting frame has a guide rib that prevents rubbish from rotating inside the dust collecting chamber.

Abstract

A cleaner is provided. The cleaner includes a housing, a filtering member provided to form a dust collecting chamber inside the housing, and a main body configured to be moved relative to the housing. The main body includes a dirt removal member configured to be moved on the dust collecting chamber, an opening and closing device configured to open and close the dust collecting chamber and provided to interlock with the dirt removal member, and a connecting frame configured to connect the dirt removal member and the opening and closing device, the connecting frame including a guide rib provided to prevent rubbish, which is contained in air flowing into the dust collecting chamber, from rotating in the dust collecting chamber.

METHOD OF AUTOMATICALLY ADJUSTING STRENGTH OF SUCTION POWER OF SUCTION MOTOR AND CORDLESS VACUUM CLEANER THEREFOR (18136287)

Main Inventor

Seongu LEE

Brief explanation

The abstract describes a method used by a cordless vacuum cleaner to automatically adjust the suction power of its motor. The vacuum cleaner collects data from a pressure sensor to measure the flow path pressure and a load detection sensor to measure the load on the brush apparatus. This data is then used to determine the current usage environment of the brush apparatus using an AI model stored in the vacuum cleaner's memory. Based on this information, the suction power of the motor is adjusted accordingly.

Abstract

Provided is a method, performed by a cordless vacuum cleaner, of automatically adjusting the strength of a suction power of a suction motor. More specifically, the method may include obtaining data about a flow path pressure measured by a pressure sensor, obtaining data related to a load of the brush apparatus through a load detection sensor, identifying a current usage environment state of the brush apparatus by applying the data related to the flow path pressure and the data related to the load of the brush apparatus to an AI model stored in a memory of the cordless vacuum cleaner, and adjusting the strength of the suction power of the suction motor, based on the identified current usage environment state of the brush apparatus.

CLEANING DEVICE HAVING VACUUM CLEANER AND DOCKING STATION (18142829)

Main Inventor

Kyonghui JEON

Brief explanation

This abstract describes a cleaning device that consists of a vacuum cleaner and a docking station. The vacuum cleaner has a suction nozzle, a dust collector, and an extension pipe that connects the nozzle and the collector. The docking station is designed to charge the vacuum cleaner when it is docked. The docking station has a main body with a housing, a suction portion inside the body that can remove foreign substances from the dust collector when the vacuum cleaner is docked, a recessed portion inside the housing, and a supporter that holds the main body and creates an accommodation space. The recessed portion and accommodation space are designed so that when the vacuum cleaner is docked, a part of the extension pipe fits into the recessed portion and the suction nozzle is placed in the accommodation space on one side of the main body.

Abstract

A cleaning device including a vacuum cleaner and a docking station to which the vacuum cleaner is dockable. The vacuum cleaner includes a suction nozzle, a dust collector, and an extension pipe connecting the suction nozzle and the dust collector. The docking station is configured to, with the vacuum cleaner docked to the docking station, charge the vacuum cleaner. The docking station includes a main body including a housing, a suction portion inside the main body and configured to, with the vacuum cleaner docked to the docking station, remove foreign substances in the dust collector, a recessed portion recessed from an outside of the housing to an inside of the housing, and a supporter coupled to the housing to support the main body and forming an accommodation space. The recessed portion and the accommodation space are configured so that, to dock the vacuum cleaner to the docking station, a portion of the extension pipe is accommodated in the recessed portion and the suction nozzle is accommodated in the accommodation space at one side of the main body.

CORDLESS VACUUM CLEANER IN WHICH CLEANER BODY AND BRUSH DEVICE ARE ABLE TO COMMUNICATE (18135731)

Main Inventor

Seongu LEE

Brief explanation

The abstract describes a cordless vacuum cleaner that consists of a cleaner body and a brush device. The cleaner body has a processor that controls a switching device to send signals to the brush device and receive signals from it through a signal line. The brush device also has a processor that controls a switching device to send signals back to the cleaner body through the signal line.

Abstract

Provided is a cordless vacuum cleaner including a cleaner body including a first processor configured to control an operation of a first switching device connected to a signal line to transmit a first signal to a brush device through the signal line and receive a second signal from the brush device through the signal line, and the brush device including a second processor configured to control an operation of a second switching device connected to the signal line to transmit the second signal to the cleaner body through the signal line and receive the first signal from the cleaner body through the signal line.

CLEANING ROBOT AND CONTROLLING METHOD THEREOF (18107661)

Main Inventor

Jongsoo HONG

Brief explanation

The abstract describes a cleaning robot that has a main body, a motion driver to move the robot, a pad motor to rotate a cleaning pad underneath the robot, a light source to shine light on the pad, and a processor to control the rotation speed of the pad motor and the robot's movement based on the amount of light reflected from the pad. The processor can also guide the robot back to its docking station.

Abstract

A cleaning robot including a main body; a motion driver configured to move the main body; a pad motor configured to rotate a pad below a bottom surface of the main body; a light source configured to irradiate light to the pad; and at least one processor configured to, based on an amount of reflection of the light from the pad, control rotation speed of the pad motor and/or control the motion driver to return the cleaning robot to a docking station.

BIO IMAGING SYSTEMS AND BIO IMAGING METHODS (18342796)

Main Inventor

Gae Hwang LEE

Brief explanation

The abstract describes a bio imaging system that uses multiple light emitters to emit light and multiple sensors to detect the light reflected by the internal tissue of a living body. Each sensor consists of several photo-detecting elements that have different absorption peak wavelengths compared to each other.

Abstract

A bio imaging system includes a plurality of light emitters configured to irradiate light, and a plurality of sensors configured to detect light reflected by an internal tissue of a living body. Each sensor includes a plurality of photo-detecting elements having different absorption peak wavelengths in relation to each other.

APPARATUS AND METHOD FOR ESTIMATING BLOOD PRESSURE (17968309)

Main Inventor

Sang Kon BAE

Brief explanation

This abstract describes an apparatus designed to estimate blood pressure. The apparatus includes a sensor that measures a signal called photoplethysmogram (PPG) from an object, such as a person's finger. It also includes a force sensor that measures the force between the object and the PPG sensor. The apparatus uses a processor to divide a range of blood pressure values into different classes. It then takes the measured PPG signal and force signal and inputs them into a blood pressure estimation model. The model calculates probability values for each class based on the input signals. Finally, the apparatus estimates the blood pressure by using the obtained probability values for the different classes.

Abstract

An apparatus for estimating blood pressure includes: a photoplethysmogram (PPG) sensor configured to measure a PPG signal from an object; a force sensor configured to measure a force signal acting between the object and the PPG sensor; and a processor configured to (i) divide a predetermined blood pressure range into a plurality of classes, (ii) input the measured PPG signal and the measured force signal into a blood pressure estimation model to obtain the probability values for each of the classes, and (iii) estimate blood pressure based on the obtained probability values for the respective classes.

ELECTRONIC DEVICE AND WEARABLE DEVICE FOR PROVIDING PHYSICAL ABILITY MEASUREMENT MODE, AND METHODS OF OPERATING THE SAME (18339611)

Main Inventor

Kyungrock KIM

Brief explanation

This abstract describes an electronic device and/or a wearable device that can measure a person's physical abilities. The electronic device includes a communication module to receive data from the wearable device, a processor to calculate physical ability information based on the data, and a display module to show the information. The processor can calculate a temporal gait index using motion data from an inertial sensor, calculate a spatial gait index using hip joint angle data from an angle sensor, and then use these indices to determine the physical ability information.

Abstract

An electronic device and/or a wearable device for providing a physical ability measurement mode, and operating methods thereof are provided. The electronic device may include a communication module configured to receive sensor data from a wearable device, a processor configured to calculate physical ability information of a user based on the sensor data, and a display module configured to output the physical ability information. The processor may calculate a temporal gait index based on first sensor data including motion information of the user measured by an inertial sensor of the wearable device, calculate a spatial gait index based on second sensor data including a hip joint angle of the user measured by an angle sensor of the wearable device, and calculate the physical ability information based on the temporal gait index and the spatial gait index.

GRIP DEVICE AND CONTROLLING METHOD THEREOF (18210955)

Main Inventor

Hyunwoo KIM

Brief explanation

The abstract describes a grip device that has two fingers with a groove on their gripping surface. A middle member is inserted into the groove and covers the gripping surface. There are multiple force sensors positioned on the inclined surfaces of the groove to detect the force applied to the middle member. The device also has a motor to adjust the gripping force and a processor to calculate the force vector applied to the middle member based on the sensor readings. If the force component in a certain direction is below a certain value, the device will apply a stronger gripping force.

Abstract

A grip device includes a first finger with a groove on a gripping surface thereof; a second finger facing the first finger; a middle member inserted into the groove of the first finger and covering the gripping surface; a plurality of mono-axial force sensors each positioned on one of a plurality of inclined surfaces of the groove and configured to detect a force applied to the middle member; a driving motor configured to adjust a gripping force of the first finger and the second finger; and a processor. The processor is configured to calculate a force vector applied to the middle member based on sensing values received from the force sensors, and, based on a force component of the force vector in a direction parallel to a surface of the middle member being less than a preset value, apply a greater gripping force by the first and second fingers.

DISPLAY DEVICE AND METHOD FOR ASSEMBLING SAME (18210981)

Main Inventor

Bongsup LIM

Brief explanation

The abstract describes a display apparatus that includes a display with a stand mounting portion. It also includes a protective member that can be attached and detached from the display along one edge, covering at least that edge. The apparatus also includes a stand that can be mounted to the stand mounting portion of the display. The protective member has different parts, including a mounting portion that can be attached and detached from a portion of the display, a support portion that can be attached and detached from the lower end of the display, and a fall prevention portion that can be attached and detached from the side end of the display and the support portion.

Abstract

A display apparatus comprises a display including a stand mounting portion; a protective member coupleable to and decoupleable from the display along an edge of the display so that while the protective member is coupled to the display, the protective member covers at least the edge of the display; and a stand mountable to the stand mounting portion of the display along a front and rear direction of the display, the protective member includes a mounting portion protective member coupleable to and decoupleable from at least a portion of the display; a support protective member coupleable to and decoupleable from a portion of a lower end of the display; and a fall prevention protective member coupleable to and decoupleable from a side end of the display and coupleable to and decoupleable from a side end of the support protective member.

SLURRY COMPOSITION FOR POLISHING METAL AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE USING THE SAME (18096231)

Main Inventor

Inkwon KIM

Brief explanation

The abstract describes a slurry composition used for polishing metal in the manufacturing of integrated circuit devices. The composition includes various components such as a cationic polymer salt, an organic acid, an oxidizer, a pH adjuster, a small amount of inorganic abrasive, and water. The purpose of this slurry is to enhance the polishing process and achieve a desired surface finish on the metal.

Abstract

A slurry composition for polishing metal and a method of manufacturing an integrated circuit device, the slurry composition includes a first organic polishing booster including a cationic polymer salt that includes a quaternary ammonium cation; a second organic polishing booster including an organic acid; an oxidizer; a pH adjuster; 0 wt% to about 0.1 wt% of an inorganic abrasive; and water.

GAS SUPPLY APPARATUS (17721881)

Main Inventor

Beomsoo HWANG

Brief explanation

The abstract describes a gas supply apparatus that consists of a mounting portion, a gas supply portion, and a gas container fixing portion. The gas supply portion can be raised and lowered and includes a compressed gas association (CGA) fastening module. This module is detachable from the gas container and includes various components such as a case, an end cap housing, a CGA connector housing, a gasket detection sensor, and a power transmission portion. The purpose of this apparatus is to provide a convenient and efficient way to supply gas.

Abstract

A gas supply apparatus includes: a mounting portion installed on a cabinet; a gas supply portion installed on the mounting portion so as to be raisable and lowerable; and a gas container fixing portion fixing a gas container to the gas supply portion, wherein the gas supply portion includes a compressed gas association (CGA) fastening module that is installed on the mounting portion and is detachable from the gas container, and the CGA fastening module includes: a case; an end cap housing rotatably installed on the case; a CGA connector housing installed on the case so as to be disposed adjacent to the end cap housing; a gasket detection sensor installed on a sensor installation mount of the case and disposed under the CGA connector housing; and a power transmission portion spaced apart from the end cap housing and connected to the end cap housing and the CGA connector housing.

AIR CONDITIONER (18338913)

Main Inventor

Junseok KWON

Brief explanation

The abstract describes an air conditioner that has a fan and a duct. The air conditioner is designed to make it safe and easy for the user to clean the fan and the duct. It includes a fan assembly with a fan and a drive motor that rotates the fan. The fan assembly also has a wire groove where a wire is connected to the drive motor to supply power. The wire is partially placed inside the wire groove. The air conditioner also has a duct.

Abstract

An air conditioner capable of allowing a user to safely and easily clean a fan and a duct is provided. The air conditioner includes a fan assembly comprising a fan configured to suction and discharge air, a drive motor configured to rotate the fan, a fan frame to which the fan and the drive motor are mounted, and including a wire groove, and a wire connected to the drive motor to supply power to the drive motor, wherein at least a portion of the wire is disposed inside the wire groove, and a duct.

AIR PURIFIER (18213102)

Main Inventor

Jun HWANG

Brief explanation

This abstract describes an air cleaner that consists of two modules. The first module has a suctioner at the bottom and a discharger at the top, which releases air that has passed through a filter. The second module can be attached to the first module and has a suctioner at the top and a discharger at the bottom, which also releases filtered air. The first module has a specific arrangement direction from the suctioner to the discharger, while the second module has the opposite arrangement direction.

Abstract

An air cleaner including a first air cleaning module including a first body, a first suctioner disposed at a lower portion of the first body, and a first discharger disposed at an upper portion of the first body, wherein the first discharger discharges air that entered into the first suctioner and then passed through a first filter module, and a second air cleaning module configured to be detachably coupled to an upper end of the first air cleaning module and include a second body, a second suctioner disposed at an upper portion of the second body, and a second discharger disposed at a lower portion of the second body, wherein the second discharger discharges air that entered into the second suctioner and then passed through a second filter, a direction from a position at which the first suctioner is disposed toward a position at which the first discharger is disposed is provided as a first arrangement direction, and a second arrangement direction, that is a direction from a position at which the second suctioner is disposed toward a position at which the second discharger is disposed, is provided to be the direction opposite to the first arrangement direction.

REFRIGERATOR (18118864)

Main Inventor

Juno KWON

Brief explanation

The abstract describes a refrigerator with a unique inner door design. The inner door has an opening between its front and rear surfaces, as well as two side surfaces. There is also a dike that protrudes from the rear surface of the inner door, which has two inner surfaces. The front of the inner door is covered by an outer door that can be opened to access the opening. 

The refrigerator also includes a water supply unit, which consists of a water supply case, an outlet to supply water, and a water level sensor. The outlet is used to provide water to a detachable water bucket when it is installed in the water supply case. The water level sensor is responsible for detecting the water level in the water bucket.

The rear surface of the inner door has a spacing portion located between the second inner surface of the dike and the second opening side surface. The water supply unit is installed on the dike, specifically behind the spacing portion.

In summary, this refrigerator has a unique inner door design with an opening, a dike, and a water supply unit that can provide water to a detachable water bucket.

Abstract

A refrigerator having an inner door including an opening between the front and rear surfaces of the inner door, first and second opening side surfaces, and a dike protruding from the rear surface of the inner door and including first and second dike inner surfaces; an outer door on the front of the inner door to open to access the opening; and a water supply unit including a water supply case, an outlet to supply water to a detachable water bucket when the water bucket is installed in the water supply case, and a water level sensor to detect a water level of the water bucket. The rear surface of the inner door includes a spacing portion between the second dike inner surface and the second opening side surface, and the water supply unit is installed on the dike with a portion positioned behind the spacing portion.

REFRIGERATOR AND CONTROL METHOD THEREOF (18340425)

Main Inventor

Youna PARK

Brief explanation

This abstract describes a refrigerator that has a camera inside it, facing the storage area. The refrigerator also has a display, a distance sensor, and a control unit. The control unit uses the camera to identify the food stored in the refrigerator and then obtains a menu based on that information. If the user is far away from the refrigerator, the control unit displays a notification about the menu on the display. If the user is closer to the refrigerator, a different notification about the menu is displayed.

Abstract

A refrigerator is provided. The refrigerator includes a storage room, a camera having a field of view facing the storage room, a display, a distance sensor, and a control unit. The control unit may obtain image data of the storage room from the camera, identify food stored in the storage room on the basis of the image data, obtain a menu based on information regarding the identified food, control the display to display a first window frame including a notification regarding the menu, in response to a distance to a user being greater than or equal to a predetermined reference distance based on an output from the distance sensor, and control the display to display a second window frame including a notification regarding the menu, in response to the distance to the user being less than the reference distance on the basis of the output from the distance sensor.

REFRIGERATOR (18213657)

Main Inventor

Yeongjun LEE

Brief explanation

This abstract describes a refrigerator with a storage compartment, a shelf, and a drawer. The shelf is supported by a shelf frame, and there is a drawer cover between the shelf frame and the drawer. The drawer cover has a cold air blocking portion that extends towards the front of the storage compartment. There is also a support member that helps bear the weight of the shelf.

Abstract

A refrigerator includes a storage compartment; a shelf provided in the storage compartment; a shelf frame provided at a lower side of the shelf and configured to support the shelf; a drawer configured to be withdrawn at a lower side of the shelf frame; a drawer cover coupled to the shelf frame between the shelf frame and the drawer, the drawer cover including a cold air blocking portion extending toward a front of the storage compartment; and a support member contacting a portion of a bottom surface of the shelf frame and configured to support a load of the shelf

APPARATUS AND METHOD FOR INSPECTING AND MEASURING SEMICONDUCTOR DEVICE (18102514)

Main Inventor

Hyeongcheol LEE

Brief explanation

The abstract describes an apparatus used for inspecting and measuring a semiconductor device. The apparatus consists of a stage where the object to be measured is placed, a detector that detects a spectral image by capturing light reflected from the object, and a processor that generates a spectral matrix using the detected spectral image. The detector specifically includes a time delayed integration (TDI) sensor, which uses a TDI process to capture the spectral image.

Abstract

An apparatus for inspecting and measuring a semiconductor device includes a stage on which an object to be measured is provided, a detector configured to detect a spectral image from light reflected from the object to be measured, and a processor configured to generate a spectral matrix based on the spectral image detected by the detector, wherein detector includes a time delayed integration (TDI) sensor configured to detect the spectral image based on a TDI process.

INSPECTION SYSTEM AND INSPECTION METHOD FOR SEMICONDUCTOR DEVICE (18118350)

Main Inventor

Wookjin LEE

Brief explanation

The abstract describes an optical failure detection system that is used to test semiconductor devices. The system includes a test chamber with an opening, a substrate plate with a wafer on one side and an optical window in the center, and a temperature control device that can heat or cool the semiconductor devices on the wafer. There is also an optical device in the test chamber that emits light towards the semiconductor devices through the optical window.

Abstract

An optical failure detection system includes a test chamber having an accommodating space therein, the test chamber including an upper cover having an opening therein; a substrate plate provided in the opening of the upper cover, the substrate plate including: a first surface on which a wafer is disposed; a second surface opposite to the first surface; and an optical window formed in a central region of the substrate plate and through which the wafer is exposed; a temperature control device including a plurality of thermoelectric devices provided around the optical window of the substrate plate, the temperature control device being configured to heat or cool at least one semiconductor device of the wafer; and an optical device provided in the accommodating space of the test chamber, the optical device being configured to radiate light toward the at least one semiconductor device through the optical window.

ELECTRONIC DEVICE AND CONTROL METHOD THEREFOR (18343375)

Main Inventor

Hongseok CHOI

Brief explanation

The abstract describes an electronic device that uses ultrasonic and electromagnetic wave sensors to analyze clothing. The device emits ultrasonic waves towards the clothing and collects the reflected waves to gather sound information. It also emits electromagnetic waves towards the clothing and collects the reflected waves to gather spectrum information. The device then inputs the sound and spectrum information into a neural network model to determine the level of contamination on the clothing.

Abstract

An electronic device is provided. The electronic device includes an ultrasonic sensor, an electromagnetic wave sensor, a memory for storing at least one instruction, and a processor electronically connected to the memory, wherein the processor is configured to control an ultrasonic sensor to emit ultrasonic waves in a direction of clothing, based on the ultrasonic waves, which are reflected by the clothing, are received through the ultrasonic sensor, acquire sound information based on the received ultrasonic waves, control the electromagnetic wave sensor to emit the electromagnetic waves in the direction of the clothing, based on the ultrasonic waves, which are reflected by the clothing, are received through the ultrasonic sensor, acquire spectrum information based on the received electromagnetic waves, and input the sound information and the spectrum information in a neural network model to acquire contamination level information about the clothing.

FAN-OUT BUFFER WITH SKEW CONTROL FUNCTION, OPERATING METHOD THEREOF, AND PROBE CARD INCLUDING THE SAME (18075542)

Main Inventor

BYUNG-SUNG KIM

Brief explanation

The abstract describes a fan-out buffer that includes multiple channels with delay circuits to adjust the delay time of a calibration test signal. The buffer also includes edge-to-pulse converters to detect edges in a time domain reflectometry waveform and generate start pulse signals. Additionally, there is a stop pulse signal generator and a delay control signal generator to calculate phase differences and generate delay control signals. The purpose of this buffer is to provide accurate timing control for signals in a circuit.

Abstract

Disclosed is a fan-out buffer which includes a first channel that includes a first delay circuit adjusting a first delay time of a calibration test signal depending on a first delay control signal, a second channel that includes a second delay circuit adjusting a second delay time of the calibration test signal depending on a second delay control signal, a first edge-to-pulse converter that detects a first edge included in a first time domain reflectometry (TDR) waveform of an output terminal of the first channel and generates a first start pulse signal including a first pulse, a second edge-to-pulse converter that generates a second start pulse signal including a second pulse, a stop pulse signal generator that generates a stop pulse signal including a first stop pulse, and a first delay control signal generator that calculates a phase difference generates the first delay control signal.

FLIP-FLOP CIRCUITRY (18338237)

Main Inventor

Byoung Gon Kang

Brief explanation

The abstract describes a flip-flop circuit that consists of a clock generator, a master-slave latch circuit, and a feedback path. The clock generator generates two clock signals with different phases. The master latch includes a scan path and a data path. The scan path produces a scan path signal when a scan enable signal and a scan input signal are received. The data path generates a first latch signal based on a data signal and the scan path signal. The feedback path includes a tri-state inverter that is controlled by the clock signals. The tri-state inverter connects the data path output to a node of the scan path.

Abstract

A flip-flop circuit includes a clock generator configured to generate first and second clock signals having different phases relative to each other, and a master-slave latch circuit including master and slave latches. The master latch includes a scan path configured to output a scan path signal in response to a scan enable signal and a scan input signal, and a data path configured to output a first latch signal in response to a data signal and the scan path signal. A feedback path is provided, which includes a tri-state inverter responsive to the first and second clock signals. The tri-state inverter has an input terminal connected to an output terminal of the data path and an output terminal connected to a node of the scan path.

WIRELESS POWER RECEPTION DEVICE DISPLAYING WIRELESS CHARGING RANGE, AND OPERATING METHOD THEREOF (18338897)

Main Inventor

Beomwoo GU

Brief explanation

The abstract describes a method for operating a wireless power reception device. The device confirms its location relative to a wireless power transmission device and the charging range of the transmission device using signals received through a communication module. The device then displays its location and the charging range on its display using icons and lines or planes.

Abstract

According to various embodiments, a method of operating a wireless power reception device may comprise: confirming information about the location of the wireless power reception device with respect to a wireless power transmission device based on a first signal received from the wireless power transmission device using at least one communication module of the wireless power reception device; confirming information about a first charging range of the wireless power transmission device based on a second signal received from the wireless power transmission device using the at least one communication module; and displaying the location of the wireless power reception device as a first icon and the first charging range as a line or a plane on a display of the wireless power reception device based on the information about the location of the wireless power reception device and the information about the first charging range of the wireless power transmission device.

POLARIZATION SPECTRAL FILTER, POLARIZATION SPECTRAL FILTER ARRAY, AND POLARIZATION SPECTRAL SENSOR (18336502)

Main Inventor

Yeonsang PARK

Brief explanation

The abstract describes a polarization spectral filter that consists of two reflectors facing each other and a grating layer in between. The grating layer contains alternating first and second grating elements arranged perpendicular to the reflectors. The first grating elements are made of a dielectric material with a specific refractive index, while the second grating elements are made of a different dielectric material with a different refractive index.

Abstract

Provided is a polarization spectral filter, including: a first reflector and a second reflector disposed to face each other in a first direction; and a grating layer disposed between the first reflector and the second reflector. The grating layer includes a plurality of first grating elements and a plurality of second grating elements, the plurality of first grating elements and the plurality of second grating elements being alternately arranged in a second direction perpendicular to the first direction. The plurality of first grating elements include a first dielectric material having a first refractive index. The plurality of second grating elements include a second dielectric material having a second refractive index different from the first refractive index.

SPIN COATER (17964376)

Main Inventor

Sunghwan KIM

Brief explanation

The abstract describes a spin coater, a machine used in the manufacturing of electronic devices. The spin coater consists of a spin chuck, a nozzle, and two temperature controllers. The spin chuck is responsible for rotating the substrate while applying photoresist, a light-sensitive material used in the production process. The nozzle is positioned above the spin chuck and dispenses the photoresist onto the substrate. The first temperature controller regulates the temperature in one area of the spin chuck, while the second temperature controller controls the temperature in another area.

Abstract

A spin coater may include a spin chuck, a nozzle, a first temperature controller and a second temperature controller. The spin chuck may be configured make contact with a central portion of a lower surface of a substrate and may be configured to rotate the substrate when photoresist is on the substrate. The nozzle may be arranged over a central portion of the spin chuck and configured to provide a central portion of an upper surface of the substrate with photoresist. The first temperature controller may be configured to control a temperature in a first region of the spin chuck. The second temperature controller may be configured to control a temperature in a second region of the spin chuck.

WATERPROOF STRUCTURE AND ELECTRONIC DEVICE COMPRISING SAME (18341258)

Main Inventor

Jaechul LEE

Brief explanation

The abstract describes an electronic device that includes a physical button and a waterproof feature. The device has a body with a passage through which a rod of the physical button passes. The inner surface of the body has two convex surfaces, while the outer surface has a convex surface and a protruding surface. There is a through-hole formed by the inner surface, and a bottom surface between the inner and outer surfaces. A waterproof member with a convex surface is placed between the body and the rod.

Abstract

An electronic device is provided. The electronic device includes a body having a passage, a physical button having a rod passing through the passage, an inner surface having a first convex surface and a second convex surface formed to be spaced apart from the first convex surface, a through-hole formed by the inner surface, an outer surface having a third convex surface and a protruding surface formed to be spaced apart from the third convex surface, a bottom surface formed between the inner surface and the outer surface, and a waterproof member having a fourth convex surface formed in the direction facing the bottom surface, wherein the waterproof member is arranged between the body and the rod.

ELECTRONIC DEVICE AND METHOD FOR CONTROLLING THEREOF (18213959)

Main Inventor

Mideum CHOI

Brief explanation

The abstract describes an electronic device and a method for controlling it. The method involves identifying a path to a destination based on a map, detecting any obstacles in the path using sensors, finding an alternative path to avoid the obstacles based on their location and speed, and finally, if the obstacles are far enough, allowing the device to continue on the original path.

Abstract

Disclosed are an electronic device and a method for controlling thereof. A method of controlling an electronic device includes identifying a first traveling path heading to a preset destination based on a map corresponding to an environment in which an electronic device operates; identifying an object interfering with traveling according to the first traveling path based on at least one sensor while traveling according to the first traveling path; identifying an avoidance path to avoid the object based on at least one of a location and speed of the identified object and traveling according to the avoidance path; and based on the identified object being distant by a preset distance or more based on traveling according to the avoidance path, controlling the electronic device to travel according to the first traveling path based on a current location of the electronic device.

DISPLAY APPARATUS (18110680)

Main Inventor

Sanggoo LEE

Brief explanation

The abstract describes a display apparatus that includes a display panel, a support bracket, a support arm, and a support stand. The support arm is attached to the support bracket and can rotate between two orientations. The support stand holds the support arm and allows it to move up and down. The support arm has a rotating link that rotates as the arm moves and a locking link that can be inserted into a locking groove on the support bracket to restrict the rotation of the display panel or withdrawn from the groove to allow rotation.

Abstract

A display apparatus is provided. The display apparatus includes: a display panel; a support bracket coupled to a rear surface of the display panel and defining a locking groove; a support arm coupled to the support bracket and supporting the display panel, wherein the support arm is configured to rotate between a first and second orientations; and a support stand supporting the support arm and configured to allow the support arm to move along a vertical direction between first and second positions. The support arm includes: a rotating link configured to rotate as the support arm moves; and a locking link configured to move from a locked position in which the locking link is inserted into the locking groove to restrict rotation of the display panel, to an unlocked position in which the locking link is withdrawn from the locking groove to allow rotation of the display panel.

ELECTRONIC APPARATUS AND METHOD OF CONTROLLING THE SAME (18213326)

Main Inventor

Kangchun LEE

Brief explanation

The abstract describes an electronic device and a method for controlling it. The device includes a display and a processor. The processor controls the display to show an image and identifies the screen mode of the display, which can have different aspect ratios. It also provides information on the content that corresponds to the identified screen mode.

Abstract

Disclosed are an electronic apparatus and a method of controlling the same. The electronic apparatus includes: a display; and a processor configured to: control the display to display an image on the display, identify a screen mode of the display displaying an image among a plurality of screen modes having different aspect ratios, and provide information on content corresponding to the identified screen mode among a plurality of pieces of content.

ELECTRONIC DEVICE, METHOD, AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM FOR DISPLAYING VISUAL OBJECT FOR CHANGING SIZE OF DISPLAY REGION OF FLEXIBLE DISPLAY (18146722)

Main Inventor

Yunsung CHOI

Brief explanation

This abstract describes an electronic device that has a flexible display that can be slid into or out of the device's housing. The device also includes an actuator that can retract or extend the display. It has a memory and a processor that can display a visual object to guide the user in changing the display region to a specific reference state. This is done when the processor identifies that the current state of the display region is different from the desired reference state.

Abstract

An electronic device is provided. The electronic device includes a housing, a flexible display configured to slide into or out of the housing, an actuator configured to pull in at least a portion of the flexible display into the housing or pull out at least a portion of the flexible display from the housing, a memory, and a processor. The processor is configured to display a visual object for guiding to change a state of a display region to a reference state, based on identifying that the state of the display region is distinguished from the reference state.

ELECTRONIC DEVICE INCLUDING DISPLAY (18097654)

Main Inventor

Chulhyo YOON

Brief explanation

The abstract describes an electronic device that has a flexible display and an input module. The input module is located between two housings that support the flexible display. The input module has two layers called the first pattern layer and the second pattern layer. The first pattern layer is placed on the side of the input module facing the waterproof adhesives and includes signal patterns and dummy patterns. The second pattern layer is placed on the other side of the input module facing the flexible display. The purpose of this design is to provide a waterproof seal for the device while maintaining functionality.

Abstract

An electronic device includes: a flexible display; an input module disposed between a surface formed by a first housing and a second housing supporting the flexible display and the flexible display, and including a first pattern layer and a second pattern layer; and waterproof adhesives disposed on each of the first housing and the second housing, wherein the first pattern layer is disposed on a surface of the input module facing the waterproof adhesives, and includes first signal patterns and first dummy patterns disposed in an area corresponding to the waterproof adhesive, and wherein the second pattern layer is disposed on the other side of the input module facing the flexible display.

CHIP-ON-FILM PACKAGE, DISPLAY MODULE INCLUDING SAME, AND ELECTRONIC DEVICE INCLUDING SAME (18340681)

Main Inventor

Jeongkyu Ha

Brief explanation

The abstract describes a chip-on-film (COF) package, which is a type of electronic packaging used for mounting chips onto a flexible film. The package consists of a film with different areas - a reinforcement area, a bending area, and a chip mounting area. The film has a conductive pattern layer on it, which is used for connecting the chip. The chip is mounted on the conductive pattern layer in the chip mounting area. The package also includes two insulating layers - a first layer with a higher elastic modulus in the reinforcement area and a second layer with a lower elastic modulus in the bending area. This means that the first layer is stiffer and more rigid, while the second layer is more flexible. The film remains intact in the chip mounting area, meaning it is not damaged or broken.

Abstract

A chip-on-film (COF) package includes a film including a reinforcement area, a bending area and a chip mounting area, a conductive pattern layer disposed on the film in the reinforcement area and in the bending area, and at least partially in the chip mounting area, a chip mounted on a portion of the conductive pattern layer in the chip mounting area, a first insulating layer having a first elastic modulus and extending over the conductive pattern layer in the reinforcement area, and a second insulating layer having a second elastic modulus and extending over the conductive pattern layer in the bending area, wherein the first elastic modulus is greater than the second elastic modulus, and the film is intact in the chip mounting area.

ELECTRONIC DEVICE INCLUDING FIXING MEMBER (18212335)

Main Inventor

Donggyu OH

Brief explanation

This abstract describes an electronic device that has a housing with a protrusion and an opening. The device also includes an electronic component with a waterproof shield to cover the opening. A fixing member is used to secure the electronic component in place, pressing the waterproof shield against the opening. The fixing member has a surface that faces the protrusion and at least one other surface. The electronic component is attached to the protrusion, fitting between the two surfaces of the fixing member, ensuring that the waterproof shield covers the opening.

Abstract

An electronic device includes a housing including a protrusion protruding in one direction, and an opening portion communicating from the outside to the inside of the electronic device on one surface of the protrusion, an electronic component including a waterproof member to shield the opening portion, and a fixing member including a first surface disposed on an opposite surface to the one surface of the protrusion on which the opening portion is configured, and at least one second surface. The fixing member is disposed such that the waterproof member is forced against the opening portion by the first surface and the at least one second surface by fitting the protrusion and the electronic component between the first surface and the at least one second surface with the electronic component coupled to the protrusion portion such that the waterproof member shields the opening portion.

ELECTRONIC DEVICE PROVIDING STATUS INFORMATION BY CHANGING SHAPE OF ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING THE SAME (18303521)

Main Inventor

Youngjae MEEN

Brief explanation

This abstract describes a technology where an electronic device can detect an event related to itself and determine if it is in a certain state. If it is in that state, it can control a flexible display to move in a specific direction and show information about the event on the extended display.

Abstract

An electronic device identifies an occurrence of an event related to the electronic device, identifies whether a state of the electronic device is a first state based on the identified occurrence of the event, when the state of the electronic device is the first state, controls the driving module so that the flexible display moves in the second direction, and displays information related to the occurring event on the flexible display extended according to control of the driving module.

ACTIVE DISTURBANCE REJECTION BASED THERMAL CONTROL (18213704)

Main Inventor

Zhan Ping

Brief explanation

The abstract describes a system and method for controlling the temperature in a thermal zone using an active disturbance rejection thermal control (ADRC) controller. The controller receives temperature measurements from the thermal zone and uses an extended state observer (ESO) to estimate the disturbance and the temperature. Based on these estimations, the controller generates an output control signal to regulate a cooling element in order to maintain the desired temperature.

Abstract

A system and method for active disturbance rejection based thermal control is configured to receive, at a first active disturbance rejection thermal control (ADRC) controller, a first temperature measurement from a first thermal zone. The ADRC controller generates a first output control signal for controlling a first cooling element, wherein the first output control signal is generated according a first estimated temperature and a first estimated disturbance calculated by a first extended state observer (ESO) of the first ADRC controller.

DYNAMIC GESTURE RECOGNITION USING MMWAVE RADAR (18063055)

Main Inventor

Anum Ali

Brief explanation

This abstract describes a method for recognizing dynamic gestures using mmWave radar. The method involves activating a gesture recognition mode on an electronic device when certain conditions are met. Radar data, specifically time-velocity data (TVD), is collected while the gesture recognition mode is active. The start and end of a gesture are detected based on the TVD. To classify the gesture, a specific gesture from a predefined set is determined based on the TVD between the start and end points. An event indicator is then generated to indicate that the user of the electronic device performed the classified gesture.

Abstract

A method for end-to-end dynamic gesture recognition using mmWave radar is provided. The method includes triggering an electronic device to activate a gesture recognition mode in response to detecting that a condition for activating the gesture recognition mode is satisfied. The method includes obtaining radar data while the gesture recognition mode is activated, wherein the radar data includes time-velocity data (TVD). The method includes detecting a start and an end of a gesture based on the TVD of the obtained radar data. To classify the gesture, the method includes determining a gesture, from among a set of gesture, that corresponds to a portion of the TVD between the start and the end of the gesture. The method includes outputting an event indicator indicating that a user of the electronic device performed the gesture classified.

ELECTRONIC DEVICE, METHOD, AND NON-TRANSITORY COMPUTER READABLE STORAGE MEDIUM FOR IDENTIFYING SET OF INFORMATION ACCORDING TO CHANGE IN SIZE OF DISPLAY AREA OF FLEXIBLE DISPLAY (18099403)

Main Inventor

Kuenyoung SEO

Brief explanation

This abstract describes an electronic device that has a flexible display. The device includes a housing and the display can be slid into or out of the housing. The device also has a memory and a processor that is connected to the flexible display. The processor is programmed to display a user interface on the flexible display, showing different sets of information. The processor can also receive user input to change the size of the display area, making it smaller. This can be done while still displaying the user interface and the information sets.

Abstract

An electronic device include a housing, a flexible display capable of being slid into the housing and being slid out of the housing, a memory configured to store instructions, and a processor operably coupled with the flexible display. The processor is configured to, when the instructions are executed, display a user interface including sets of information in a display area of the flexible display exposed out of the housing. The processor is configured to, when the instructions are executed, receive a user input for changing size of the display area from first size to second size smaller than the first size, while displaying the user interface including the sets of the information.

MEMORY DEVICE, MEMORY CONTROLLER, AND MEMORY SYSTEM INCLUDING THE SAME (18340950)

Main Inventor

Wontaeck Jung

Brief explanation

The abstract describes a memory system that consists of a memory device and a memory controller. The memory device has multiple memory blocks, each containing several memory cells stacked vertically. The memory controller is responsible for controlling the memory operations of the memory device. It can choose and implement different control schemes for each memory block based on the number of not-open strings in each block.

Abstract

A memory system includes a first memory device including a plurality of first memory blocks each including a plurality of first memory cells stacked in a direction perpendicular to a substrate; and a memory controller configured to control a memory operation of the first memory device. The memory controller is configured to select and operate any one of different control schemes for each of the first memory blocks based on a number of first not-open (N/O) strings included in each of the first memory blocks, respectively.

DISPLAY MODULE, AND METHOD FOR TRANSMITTING CONTROL SIGNAL FOR DISPLAY MODULE (18341304)

Main Inventor

Junhyeong PARK

Brief explanation

The abstract describes a display module that is part of a larger system of multiple display modules. The display module receives an image signal and a trigger signal through antennas. It has a signal generation circuit that generates control signals based on the trigger signal, which are used to control the image signal. The display panel then displays the image signal using these control signals.

Abstract

A display module may comprise: at least one first antenna configured to receive an image signal corresponding to the display module, from among a plurality of display modules configured to display an entire image, which displays at least a part of the entire image, a second antenna configured to receive a trigger signal corresponding to the image signal, a signal generation circuit configured to generate a plurality of control signals for controlling the image signal from the trigger signal received through the second antenna, and a display panel configured to display the image signal received from the first antenna on the basis of the plurality of generated control signals.

ACCELERATOR, METHOD OF OPERATING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE SAME (18337723)

Main Inventor

Wookeun JUNG

Brief explanation

The abstract describes a method implemented by a processor to accelerate the execution of instructions. It involves reading an instruction from memory, retrieving input data from memory based on the instruction, and performing an inference task using the input data and a parameter value specified in the instruction.

Abstract

A processor-implemented accelerator method includes: reading, from a memory, an instruction to be executed in an accelerator; reading, from the memory, input data based on the instruction; and performing, on the input data and a parameter value included in the instruction, an inference task corresponding to the instruction.

GARBAGE COLLECTION - AUTOMATIC DATA PLACEMENT (18135729)

Main Inventor

Rajinikanth PANDURANGAN

Brief explanation

The abstract describes a Solid State Drive (SSD) that uses flash memory to store data. The SSD has a controller that manages the reading and writing of data to the flash memory. It also includes a feature called automatic stream detection logic, which helps in selecting a stream identifier based on the attributes of the data. Additionally, the SSD has a garbage collection logic that selects an erase block and moves valid data from that block to a second block, based on the stream ID determined by the automatic stream detection logic. The stream ID is determined after the garbage collection logic has already selected the erase block for garbage collection.

Abstract

A Solid State Drive (SSD) is disclosed. The SSD may include flash memory to store data. An SSD controller may manage reading and writing data to the flash memory. The SSD may include an automatic stream detection logic to select a stream identifier responsive to attributes of data. A garbage collection logic may select an erase block and program valid data in the erase block into a second block responsive to a stream ID determined the automatic stream detection logic. The stream ID may be determined after the garbage collection logic has selected the erase block for garbage collection.

MEMORY CONTROLLER AND STORAGE DEVICE EACH USING FRAGMENTATION RATIO, AND OPERATING METHOD THEREOF (18330936)

Main Inventor

Dongeun Shin

Brief explanation

The abstract describes a method for operating a memory controller that controls a memory device with multiple memory blocks. The method involves transferring a program command to the memory device based on a write request from a host. It also includes updating a valid page bitmap, which represents the validity of multiple pages, based on valid page information received from the memory device. The method further involves calculating a fragmentation ratio, which represents the degree of segmentation between valid and invalid pages in a memory block, based on the valid page bitmap. The method then determines the source blocks among the memory blocks in ascending order of fragmentation ratios and performs garbage collection on these source blocks.

Abstract

An operating method of a memory controller configured to control a memory device including memory blocks each for storing a plurality of pages is provided. The operating method includes transferring a program command to the memory device based on a write request from a host, updating a valid page bitmap representing validity of a plurality of pages based on valid page information received from the memory device, calculating a fragmentation ratio representing a segmentation degree between at least one valid page and at least one invalid page of a memory block based on the valid page bitmap, determining source blocks among the memory blocks in ascending order of fragmentation ratios, and performing garbage collection on the source blocks.

SYSTEMS AND METHODS FOR A CROSS-LAYER KEY-VALUE STORE ARCHITECTURE WITH A COMPUTATIONAL STORAGE DEVICE (17839439)

Main Inventor

Naga Sanjana Bikonda

Brief explanation

The abstract describes a data storage system that consists of a host and a storage device. The host has a cache portion called the host cache, which stores metadata that indicates the location of a data node. The data node itself is stored in a different cache portion called the kernel cache, which is located in a common memory area of the storage device.

Abstract

Provided is a data storage system including a host including a host cache portion of a mirror cache, the host cache portion for storing metadata indicating a location of a data node that is stored in a kernel cache portion of the mirror cache, and a storage device including the kernel cache portion located in a common memory area.

SYSTEMS AND METHODS FOR A CROSS-LAYER KEY-VALUE STORE WITH A COMPUTATIONAL STORAGE DEVICE (17839429)

Main Inventor

Naga Sanjana Bikonda

Brief explanation

The abstract describes a method for storing data in a key-value store. The method involves a host receiving a request to access a specific data node stored on a storage device. The host then checks its cache to find the address corresponding to the requested data node. If the data node is found in the host cache, it can be accessed directly. However, if the data node is not in the host cache, it is determined that the data node is stored in a kernel cache on the storage device.

Abstract

Provided is a method of data storage, the method including receiving, at a host of a key-value store, a request to access a data node stored on a storage device of the key-value store, locating an address corresponding to the data node in a host cache on the host, and determining that the data node is in a kernel cache on the storage device.

SYSTEMS AND METHODS FOR ADDRESS TRANSLATION (17850904)

Main Inventor

Daniel Lee HELMICK

Brief explanation

The abstract describes a system and method for prepopulating a cache that translates addresses provided by a host. The method involves receiving a cache entry and an input-output command by a storage device. The storage device then executes the command by accessing a memory location based on the cache entry and the command.

Abstract

A system and method for host provided address translation cache prepopulation. In some embodiments, the method includes: receiving, by a persistent storage device, a first address translation cache entry; receiving, by the persistent storage device, an input-output command; and executing the input-output command, by the persistent storage device, the executing of the input-output command including performing direct memory access of a memory location at an address calculated based on the input-output command and based on the first address translation cache entry.

METHOD AND APPARATUS FOR DATA EFFICIENT SEMANTIC SEGMENTATION (18341050)

Main Inventor

Qingfeng LIU

Brief explanation

The abstract describes a method and system for training a neural network. It involves taking an input image and applying data augmentation methods to it, which are selected from a pool of available methods. This generates an augmented image. Additionally, a mixed image is created by combining the original input image with the augmented image.

Abstract

A method and system for training a neural network are provided. The method includes receiving an input image, selecting at least one data augmentation method from a pool of data augmentation methods, generating an augmented image by applying the selected at least one data augmentation method to the input image, and generating a mixed image from the input image and the augmented image.

ELECTRONIC DEVICE FOR UPSCALING IMAGE AND METHOD FOR CONTROLLING SAME (18313755)

Main Inventor

Bongsoo JUNG

Brief explanation

The abstract describes an electronic device that has a memory, a display, and a processor. The processor is able to divide an input image into smaller parts, analyze the characteristics of each part, and select a deep learning model to upscale each part based on its characteristics. The processor then combines the upscaled parts to create a larger, upscaled image, which is displayed on the device's screen.

Abstract

An example electronic device includes a memory; a display; and at least one processor operatively coupled to the memory and the display. The at least one processor may be configured to divide an input image into a plurality of divided images, acquire image characteristics included in each of the plurality of divided images, identify at least one deep learning model to process each of the plurality of divided images from among a plurality of deep learning models for upscaling stored in a memory on the basis of the image characteristics, acquire a plurality of upscaled segmented images corresponding respectively to the plurality of divided images through the at least one deep learning model, merge the plurality of upscaled divided images to obtain an upscaled image, and display the upscaled image on the display.

SUPPORT OF VISUAL VOLUMETRIC VIDEO-BASED CODING (V3C) IN IMMERSIVE SCENE DESCRIPTION (18299667)

Main Inventor

Youngkwon Lim

Brief explanation

This abstract describes an apparatus that includes a communication interface and a processor. The communication interface has a buffer, and the processor is connected to the communication interface. The processor is designed to receive a scene description for visual volumetric video-based coding (V3C) content, which includes information about a media stream for a V3C atlas and media streams for V3C components. The processor also receives multiple media streams of the V3C content. It then renders these media streams based on the scene description provided.

Abstract

An apparatus includes a communication interface and a processor operably coupled to the communication interface. The communication interface includes a buffer. The processor is configured to receive, via the communication interface, a scene description for visual volumetric video-based coding (V3C) content, wherein the scene description indicates a media stream for a V3C atlas and media streams for V3C components. The processor is also configured to receive, via the communication interface, a plurality of media streams of the V3C content. The processor is further configured to render the plurality of media streams based on the scene description for the V3C content.

ELECTRONIC DEVICE AND METHOD FOR DISPLAYING CONTENT BASED ON TRANSFORMATION OF DISPLAY (18120717)

Main Inventor

Yoonjung CHOI

Brief explanation

The abstract describes a technology where a processor in an electronic device can identify different subjects in content and display them in a specific order. It can also adjust the size and magnification of the content based on the active area of the display. This technology aims to provide a more organized and user-friendly viewing experience.

Abstract

According to an embodiment, a processor of an electronic device identifies a plurality of subjects associated with the content, based on a request to display content within an active area of the display. The processor obtains a sequence of the plurality of subjects based on the plurality of subjects from the content. The processor displays a plurality of visual objects corresponding to each of the plurality of subjects based on the sequence and display the content according to a first magnification. The processor displays, among a first portion of the content corresponding to at least one subject selected based on the sequence among the plurality of subjects, or a second portion of the content different from the first portion, the first portion in the active area, based on a size of the active area controlled by the actuator by adjusting a magnification of the content to a second magnification.

METHOD AND APPARATUS WITH IMAGE PROCESSING (18193769)

Main Inventor

Heesae LEE

Brief explanation

This abstract describes a method and apparatus for image processing. The method involves determining sample points on a camera ray based on view-generation information, determining the location statuses of these sample points using a virtual cylindrical coordinate system, projecting and rendering a pixel value for the camera ray based on the location statuses, applying the view-generation information to two neural networks (one trained for foreground images and the other for background images) to generate rendering results, and finally blending these results to generate a rendered image.

Abstract

A method and apparatus with image processing are provided. A method includes determining sample points sampled on a camera ray, wherein the camera ray is based on view-generation information comprising a scene viewing-position and a scene-viewing direction, determining location statuses of the respective sample points based on a virtual cylindrical coordinate system defined by a center and a radius, projecting and rendering a value of a pixel corresponding to the camera ray by, according the location statuses, applying the view-generation information to a first neural network to generate a first rendering result and to a second neural network to generate a second rendering result, wherein the first neural network has been trained to generate foreground images and the second neural network has been trained to generate background images, and generating a rendered image based on blending the first rendering result and the second rendering result.

VISION SENSORS, IMAGE PROCESSING DEVICES INCLUDING THE VISION SENSORS, AND OPERATING METHODS OF THE VISION SENSORS (18341968)

Main Inventor

Jongseok SEO

Brief explanation

This abstract describes a vision sensor that consists of a pixel array, an event detection circuit, an event rate controller, and an interface circuit. The pixel array is made up of pixels arranged in a matrix, and each pixel can generate an electrical signal when it detects a change in incident light intensity. The event detection circuit processes these electrical signals to determine if any changes in light intensity have occurred at any pixels, and generates event signals accordingly. The event rate controller selects a subset of these event signals that correspond to a specific region of interest on the pixel array. Finally, the interface circuit connects the sensor to an external processor and transmits the selected event signals to the processor.

Abstract

A vision sensor includes a pixel array comprising pixels arranged in a matrix, an event detection circuit, an event rate controller, and an interface circuit. Each pixel is configured to generate an electrical signal in response to detecting a change in incident light intensity. The event detection circuit detects whether a change in incident light intensity has occurred at any pixels, based on processing electrical signals received from one or more pixels, and generates one or more event signals corresponding to one or more pixels at which a change in intensity of incident light is determined to have occurred. The event rate controller selects a selection of one or more event signals corresponding to a region of interest on the pixel array as one or more output event signals. The interface circuit communicates with an external processor to transmit the one or more output event signals to the external processor.

ILLUMINANT ESTIMATION METHOD AND APPARATUS FOR ELECTRONIC DEVICE (18213073)

Main Inventor

Dongning HAO

Brief explanation

This abstract describes a method for estimating the position of an illuminant (light source) in an image. The method involves capturing two image frames that are a certain distance apart. Shadows in the image frames are detected and analyzed to determine their characteristics. Point cloud information is obtained for both the shadows and multiple objects in the image. By matching the point clouds of the shadows and objects, the corresponding shadows associated with each object are identified. Finally, the position of the illuminant is determined based on the relationship between the objects and their corresponding shadows.

Abstract

An illuminant estimation method, including acquiring two image frames, wherein a distance between the two image frames is greater than a predetermined distance; detecting shadows included in the two image frames, extracting pixel feature points corresponding to the shadows, determining point cloud information about the shadows, and distinguishing a point cloud of each shadow based on the point cloud information about the shadows; acquiring point cloud information about multiple objects, and distinguishing a point cloud of each object based on the point cloud information corresponding to the multiple objects; matching the point cloud of the each shadow and the point cloud of the each object in order to determine corresponding shadows associated with the multiple objects; and determining a position of an illuminant according to a positional relation between the multiple objects and the corresponding shadows.

INFORMATION ACQUISITION METHOD BASED ON ALWAYS-ON CAMERA (18341245)

Main Inventor

Sanghun LEE

Brief explanation

The abstract describes a method performed by an electronic device. The device uses an always-on camera to obtain image data and collects sensor data. It then combines the image data and sensor data based on their respective timestamps. The combined data is used to extract at least one feature, which is then used to generate and store a feature set. The device performs clustering on the feature set and stores the result of the clustering.

Abstract

According to the present disclosure, a method performed by an electronic device may include: obtaining image data using an always-on camera, obtaining sensor data, obtaining combined data from the image data and the sensor data based on an obtained time of the image data and an obtained time of the sensor data, extracting at least one feature based on the combined data, generating and storing at least one feature set based on the at least one feature, performing clustering on the at least one feature set, and storing a result of performing the clustering.

FACE VERIFICATION METHOD AND APPARATUS (18339484)

Main Inventor

Changyong SON

Brief explanation

The abstract describes a method and device for verifying faces. It involves analyzing a current frame of an image, determining if it is suitable for verification, and checking if it meets certain validity conditions. Based on the result, a feature is extracted from the frame and compared to a registered feature using a verification threshold.

Abstract

Disclosed is a face verification method and apparatus. The method including analyzing a current frame of a verification image, determining a current frame state score of the verification image indicating whether the current frame is in a state predetermined as being appropriate for verification, determining whether the current frame state score satisfies a predetermined validity condition, and selectively, based on a result of the determining of whether the current frame state score satisfies the predetermined validity condition, extracting a feature from the current frame and performing verification by comparing a determined similarity between the extracted feature and a registered feature to a set verification threshold.

METHOD FOR CONTROLLING REFRESH RATE, AND ELECTRONIC DEVICE SUPPORTING SAME (18338356)

Main Inventor

Hojin KIM

Brief explanation

The abstract describes an electronic device with a display and a processor. The processor is programmed to analyze the brightness of the display and determine if it meets a certain level. If the display is bright enough, the processor then analyzes the frames per second (FPS) of an image and the motion information of the scene to be displayed. Based on this analysis, the processor determines the appropriate refresh rate for the display. If the display is not bright enough, the processor simply sets the refresh rate to match the FPS of the image and displays the scene accordingly.

Abstract

An electronic device includes a display, and at least one processor. The at least one processor is configured to obtain an image; identify whether or not the luminance of the display equals to or is higher than a predetermined luminance; when the luminance of the display equals to or is higher than the predetermined luminance, identify the FPS of the image and the motion information of a scene of the image to be displayed by means of the display, and determine a refresh rate of the display based on the FPS of the image and the motion information of the scene; and, when the luminance of the display is lower than the predetermined luminance, determine a refresh rate corresponding to the FPS of the image as the refresh rate of the display, and display the scene of the image by means of the display based on the determined refresh rate.

DISPLAY DRIVER (18083055)

Main Inventor

Chanbong YU

Brief explanation

The abstract describes a display driver that is used in a display panel. The display driver includes multiple source amplifiers that are connected to source lines in the display panel. One of the source amplifiers has an input stage and an output stage that is responsible for outputting a grayscale voltage to one of the source lines. The display driver also includes a decoder circuit that provides gamma voltages to the input stage based on image data. The output stage consists of multiple unit circuits that are connected in parallel between the input stage and an output pad that is connected to the source line. Each unit circuit includes a buffer switch and an output buffer that are connected to the input stage, and is connected to the output pad through a resistor.

Abstract

A display driver is provided. The display driver includes: a plurality of source amplifiers connected to a plurality of source lines of a display panel, wherein one of the plurality of source amplifiers includes an input stage and an output stage configured to output a grayscale voltage to a source line of the plurality of source lines; and a decoder circuit configured to provide at least one of a plurality of gamma voltages to the input stage based on image data. The output stage includes a plurality of unit circuits connected to each other in parallel between the input stage and an output pad connected to the source line. Each of the plurality of unit circuits includes a buffer switch and an output buffer connected to the input stage, and is connected to the output pad through a resistor.

DISPLAY APPARATUS AND CONTROL METHOD THEREOF (18211095)

Main Inventor

Minhoon LEE

Brief explanation

This abstract describes a display apparatus that includes a display panel, a communication interface, and a processor. The display panel is capable of showing content at a certain resolution and frame rate. The communication interface allows the apparatus to receive content. The processor is responsible for adjusting the received content to a different resolution if the frame rate of the content is higher than what the display panel can handle. It also controls the display panel to show the adjusted content at the new resolution and frame rate.

Abstract

An example display apparatus includes a display panel configured to drive a frame of a first resolution at a first frame rate, a communication interface comprising circuitry configured to receive content, and a processor configured to, based on a frame rate of the received content being greater than the first frame rate, adjust the received content to a second resolution, and to control the display panel to display a content of the second resolution at a second frame rate, the second frame rate being greater than the first frame rate.

ELECTRONIC DEVICE FOR DRIVING PLURALITY OF DISPLAY AREAS OF DISPLAY AT DIFFERENT DRIVING FREQUENCIES (18341235)

Main Inventor

Yongkoo HER

Brief explanation

This abstract describes an electronic device and a method for driving different display areas of a display at different frequencies. The device can determine the driving frequency and position of each application's execution screen, and drive the display panel accordingly. This allows for efficient and simultaneous display of multiple applications on different portions of the screen.

Abstract

An electronic device and a method for driving a plurality of display areas of a display at different driving frequencies are provided. The electronic device can determine a first driving frequency of a first application, and the position of a first portion on which a first execution screen of the first application is to be displayed, determine a second driving frequency of a second application, and the position of a second portion on which a second execution screen of the second application is to be displayed, determine a third driving frequency of a third application, and the position of a third portion on which a third execution screen of the third application is to be displayed, and drive a first area of the display panel based on a first partial scan rate, and drive a second area of the display panel based on a second partial scan rate.

DISPLAY DRIVING CIRCUIT AND OPERATING METHOD THEREOF (18213632)

Main Inventor

Jiyong JEONG

Brief explanation

The abstract describes a display driving circuit that is used to drive a display panel. The circuit includes a data driver integrated circuit that drives the data lines of the display panel. The data driver integrated circuit has two main components: a driving block and a sensing block. 

The driving block consists of multiple digital-analog converters (DACs) that convert digital sub-pixel data into analog output voltages. These output voltages are then provided to the data lines of the display panel.

The sensing block has two operation modes. In the first mode, it measures the grayscale voltages that are output from the DACs. In the second mode, it measures the pixel voltages of the sub-pixels that are received from the sensing lines of the display panel.

Overall, this display driving circuit is responsible for converting digital sub-pixel data into analog voltages and measuring the voltages for accurate display performance.

Abstract

A display driving circuit is provided. The circuit drives a display panel that includes data lines, sensing lines, and sub-pixels connected to the data lines and the sensing lines. The display driving circuit includes a data driver integrated circuit that drives the data lines. The data driver integrated circuit includes a driving block and a sensing block. The driving block includes plural digital-analog converters (DACs) each performing digital-analog conversion with respect to received sub-pixel data to generate output voltages and provide the output voltages of the DACs to the data lines. The sensing block measures grayscale voltages output from the DACs in a first operation mode and measures pixel voltages of the sub-pixels received from the sensing lines in a second operation mode.

DISPLAY DEVICE AND LIGHT SOURCE DEVICE THEREOF (18215027)

Main Inventor

Sungyeol KIM

Brief explanation

This abstract describes a display device that uses a liquid crystal panel and multiple light sources to emit light. The light sources are divided into different groups called dimming blocks, each containing one or more light sources. A driver provides a current to each light source, and a processor controls the driver based on image data. The processor calculates the average current value for each dimming block and reduces the current provided to the light sources based on certain conditions, such as the number or arrangement of dimming blocks with an average current value above a certain threshold.

Abstract

A display device includes a liquid crystal panel; a plurality of light sources configured to emit light toward the liquid crystal panel, wherein the plurality of light sources are divided into a plurality of dimming blocks, each dimming block including one or more light sources; a driver configured to provide a current to each light source of the plurality of light sources; and a processor configured to: control the driver to provide the current to the one or more light sources included in each dimming block of the plurality of dimming blocks based on image data, obtain an average current value of currents provided to the one or more light sources included in each dimming block of the plurality of dimming blocks for a reference time based on the image data, and control the driver to provide a reduced current to the plurality of light sources based on at least one of a predetermined number of first dimming blocks or an arrangement of the first dimming blocks having the average current value being greater than or equal to a first reference current value.

ELECTRONIC DEVICE AND METHOD OF GENERATING TEXT-TO-SPEECH MODEL FOR PROSODY CONTROL OF THE ELECTRONIC DEVICE (18213929)

Main Inventor

Junesig SUNG

Brief explanation

This abstract describes an electronic device that can generate a text-to-speech (TTS) model. The device receives training data that includes different speech sounds called phenomes. It then determines the prosody value (the rhythm and intonation) for each phenome and groups them into clusters based on these values. The device also extracts the sequence of phenomes corresponding to a given text and selects the appropriate prosody cluster for each phenome based on the speech patterns in the text. Finally, it generates a TTS model using both the phenome sequence and the prosody cluster index sequence.

Abstract

According to certain embodiments, an electronic device, comprises: a memory storing therein instructions; and a processor electrically connected to the memory and configured to execute the instructions, wherein, when the instructions are executed by the processor, the processor receives training data comprising a plurality of phenomes; determines a prosody value for each one of the plurality of phenomes in the training data; clusters the plurality of phenomes based on the prosody value for each one of the plurality of phenomes in the training data, thereby resulting in a plurality of prosody clusters; extracts a phoneme sequence corresponding to a text in the training data; extracts a prosody cluster index sequence corresponding to an utterance of the text by selecting one of the plurality of clusters based on prosody values of the utterance of the text; and generates a text-to-speech (TTS) model based on the phoneme sequence and the prosody cluster index sequence.

METHOD AND DEVICE FOR PROCESSING VOICE INPUT OF USER (18118502)

Main Inventor

Heekyoung SEO

Brief explanation

This abstract describes a method performed by an electronic device to process voice inputs from a user. The method involves obtaining two audio signals from the user's voice inputs, with the second audio signal potentially being used to correct any errors in the first audio signal. If the second audio signal is indeed for correcting the first one, the method identifies and extracts corrected words or syllables from it. These corrected audio signals are then used to process the original first audio signal.

Abstract

A method, performed by an electronic device, of processing a voice input of a user. The method includes obtaining a first audio signal from a first user voice input, obtaining a second audio signal from a second user voice input that is obtained subsequent to the first audio signal, identifying whether the second audio signal is an audio signal for correcting the obtained first audio signal, when the obtained second audio signal is an audio signal for correcting the obtained first audio signal, obtaining, from the obtained second audio signal, at least one of one or more corrected words or one or more corrected syllables, based on the at least one of the one or more corrected words or the one or more corrected syllables, identifying at least one corrected audio signal for the obtained first audio signal, and processing the at least one corrected audio signal.

ELECTRONIC DEVICE AND METHOD FOR PROVIDING CONVERSATIONAL SERVICE (18210696)

Main Inventor

Jina HAM

Brief explanation

This abstract describes a method performed by an electronic device to provide a conversational service. The method involves receiving an input, identifying a time expression in the input, determining a time point based on the expression, selecting a database corresponding to that time point from multiple databases storing conversation history, interpreting the input based on the conversation history information, generating a response message, and outputting the response message.

Abstract

A method, performed by an electronic device, of providing a conversational service includes: receiving an utterance input; identifying a temporal expression representing a time in a text obtained from the utterance input; determining a time point related to the utterance input based on the temporal expression; selecting a database corresponding to the determined time point from among a plurality of databases storing information about a conversation history of a user using the conversational service; interpreting the text based on information about the conversation history of the user, the conversation history information being acquired from the selected database; generating a response message to the utterance input based on a result of the interpreting; and outputting the generated response message.

MULTI-MODAL INTERACTION WITH INTELLIGENT ASSISTANTS IN VOICE COMMAND DEVICES (18332479)

Main Inventor

Jeffrey C. OLSON

Brief explanation

The abstract describes a method for waking up an intelligent assistant on an electronic device when it is activated. The method also involves determining the amount of vocabulary the intelligent assistant uses during a listening mode, based on the type of activation.

Abstract

A method comprising detecting an activation of an intelligent assistant on an electronic device, waking up the intelligent assistant from a sleep mode in response to the activation, and determining an amount of vocabulary the intelligent assistant acts upon during a listening mode based on a type of the activation.

HUB DEVICE, MULTI-DEVICE SYSTEM INCLUDING THE HUB DEVICE AND PLURALITY OF DEVICES, AND METHOD OF OPERATING THE SAME (18336652)

Main Inventor

Yeonho LEE

Brief explanation

The abstract describes a hub device and a system that includes the hub device, as well as a method of operating them. The hub device converts voice input into text and then identifies another device capable of performing an operation based on the text. It also determines which device stores a function determination model corresponding to the identified device. If the identified device is different from the hub device, the hub device transmits the text to the identified device.

Abstract

A hub device, a multi-device system including the hub device, and a method of operating the same may include: converting, by the hub device, received voice input into text; identifying, by the hub device, a device capable of performing an operation corresponding to the text; identifying which device stores a function determination model corresponding to the device capable of performing the operation corresponding to the text, from among the hub device, and a plurality of other devices connected to the hub device; and based on the identified device that stores the function determination model being a device that is different from the hub device, transmitting at least part of the text to the identified device.

MEMORY DEVICE INCLUDING RACETRACK AND OPERATING METHOD THEREOF (18177982)

Main Inventor

Youngnam Hwang

Brief explanation

The abstract describes a memory device and its operating method. The memory device consists of multiple racetracks, each containing a series of domains. A bit line driver is connected to one side of the racetracks, and a domain index controller is used to shift the domains within the racetracks. The device also includes magnetic tunnel junction (MTJ) devices and cell transistors connected to the racetracks. A source line driver is connected to the cell transistors through source lines. The domains within the racetracks are divided into sections, and the MTJ devices are located adjacent to these sections.

Abstract

A memory device and an operating method of the memory device are provided. The memory device includes a plurality of first racetracks each including a series of domains, a bit line driver connected to first sides of ones of the plurality of first racetracks, a first domain index controller configured to shift domains of ones of the plurality of first racetracks, a plurality of first magnetic tunnel junction (MTJ) devices adjacent to the plurality of first racetracks, a plurality of first cell transistors respectively connected to ones of the plurality of first MTJ devices, and a source line driver connected to the plurality of first cell transistors by a plurality of first source lines, wherein the series of domains includes a series of domain sections, and the plurality of first MTJ devices are respectively adjacent to the series of domain sections.

SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC DEVICES INCLUDING THE SEMICONDUCTOR MEMORY DEVICES (17964092)

Main Inventor

Seunghan Kim

Brief explanation

This abstract describes a semiconductor memory device that includes various components such as a data input/output (I/O) buffer, a data first-in/first-out (FIFO) circuit, and an address comparing circuit. The data I/O buffer is responsible for providing write data to the memory cell array. The data FIFO circuit consists of multiple data FIFO buffers that store read data obtained from the memory cell array during different read operations. The data FIFO circuit then outputs the data stored in one of these buffers based on a set of sub matching signals. The address comparing circuit keeps track of previous addresses along with first commands that specify the read operations, and it generates the sub matching signals by comparing these previous addresses with the current address accompanied by a second command for the present read operation.

Abstract

A semiconductor memory device includes a data input/output (I/O) buffer, a data first-in/first-out (FIFO) circuit, an address comparing circuit. The data I/O buffer provides a memory cell array with write data. The data FIFO circuit includes plurality of data FIFO buffers which store read data that is read from the memory cell array in each of a plurality of read operations. The data FIFO circuit outputs data stored in one of the plurality of data FIFO buffers based on a plurality of sub matching signals. The address comparing circuit sequentially stores previous addresses accompanied by first commands designating the plurality of read operations and generates the plurality of sub matching signals based on a comparison of the previous addresses and a present address accompanied by a second command designating a present read operation.

STORAGE SYSTEM (18212825)

Main Inventor

TongSung KIM

Brief explanation

This abstract describes a storage system that includes a memory controller, a buffer, a register, a sampler, a nonvolatile memory, a second data code generation circuit, and a data strobe signal generator. The memory controller provides a clock signal and a chip selection signal. The buffer receives the clock signal and the chip selection signal, performs a first duty correction operation on the clock signal using a first data code, and outputs a first corrected clock signal. The register stores the first data code related to the chip selection signal. The sampler receives a data signal and a data strobe signal, and outputs a data stream. The nonvolatile memory receives the first corrected clock signal from the buffer, performs a second duty correction operation on the first corrected clock signal using a second data code, and outputs a second corrected clock signal. The second data code generation circuit generates the second data code based on the second corrected clock signal. The data strobe signal generator generates the data strobe signal based on the second corrected clock signal and provides it to the buffer.

Abstract

A storage system includes a memory controller providing a clock signal; a buffer having a first duty cycle corrector to receive the clock signal and a chip selection signal from the memory controller, perform a first duty correction operation on the clock signal using a first data code and output a first corrected clock signal, a register to store the first data code regarding the chip selection signal, and a sampler to receive a data signal and a data strobe signal regarding the data signal and output a data stream; and a nonvolatile memory having a second duty cycle corrector to receive the first corrected clock signal from the buffer and perform a second duty correction operation on the first corrected clock signal using a second data code and out a second corrected clock signal, a second data code generation circuit to generate the second data code based on the second corrected clock signal, and a data strobe signal generator to generate the data strobe signal based on the second corrected clock signal and provide the data strobe signal to the buffer.

SEMICONDUCTOR MEMORY DEVICE INCLUDING COMMAND LOG REGISTER AND COMMAND LOG OUTPUT METHOD THEREOF (17949000)

Main Inventor

Youngsan Kang

Brief explanation

This abstract describes a semiconductor memory device that has a memory core with memory cells. The memory core can output data stored in the memory cells when a read request is received. The device also includes a command decoder that can decode commands from an external device. There is a command log register that can store the commands sequentially when a register enable signal is received. The command log register can then output the stored commands as a command log when a command log read signal is received. Additionally, there is a mode register set that can generate the register enable signal or the command log read signal when a mode register set command is transmitted to the command decoder.

Abstract

A semiconductor memory device includes: a memory core including memory cells and configured to output core data stored in the memory cells in response to a read request, a command decoder configured to decode at least one command input from an external device, a command log register configured to sequentially store the at least one command in response to a register enable signal and output the at least one command as a command log in response to a command log read signal, and a mode register set configured to generate the register enable signal or the command log read signal in response to a mode register set command transmitted to the command decoder.

ELECTRONIC APPARATUS FOR PROVIDING COACHING AND OPERATING METHOD THEREOF (18213148)

Main Inventor

Jeongja KIM

Brief explanation

The abstract describes an electronic device and its method of operation. The device is designed to detect coaching events and display coaching messages accordingly. It identifies emotions related to the coaching message and selects a visual element that represents those emotions based on user context information. The device then includes the selected visual element in the coaching message and displays it.

Abstract

Disclosed are an electronic device and an operation method thereof. An electronic device configured to detect occurrence of a coaching event, and determine a coaching message to be displayed based on the coaching event. The electronic device identifies at least one emotion tag related to the coaching message, and determines, based on user context information, a representative visual element from a visual element candidate group corresponding to the at least one emotion tag. The electronic device includes the representative visual element in the coaching message and displays the coaching message.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE (18337202)

Main Inventor

Hyungjun Jeon

Brief explanation

This abstract describes a method for bonding two substrates together using bonding chucks. The first substrate is fixed to the first bonding chuck and the second substrate is fixed to the second bonding chuck. The two chucks are then aligned and the substrates are bonded together. During the bonding process, a process gas is injected between the substrates using a process gas injector, and an air curtain forming gas is used to create an air curtain around the substrates. This method combines the use of the process gas injector and the air curtain generator to facilitate the bonding process.

Abstract

A bonding method for bonding a first substrate to a second substrate includes fixing the first substrate to a first surface of a first bonding chuck and fixing the second substrate to a second surface of a second bonding chuck, the second surface facing the first surface; aligning the second bonding chuck above the first bonding chuck in a vertical direction or in a horizontal direction; bonding the first substrate to the second substrate to make a bonded substrate; and wherein, in the bonding the first substrate to the second substrate, injecting a process gas between the first substrate and the second substrate using a process gas injector surrounding at least one selected from the first bonding chuck and the second bonding chuck in a plan view and injecting an air curtain forming gas to form an air curtain surrounding the first substrate and the second substrate using an air curtain generator are performed in combination.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE (18341087)

Main Inventor

JUBIN SEO

Brief explanation

This abstract describes a semiconductor device that has a semiconductor substrate with two surfaces. On the first surface, there is an active pattern that includes a source/drain region and a power rail connected to it. On the second surface, there is a power delivery network. The device also includes a penetration via structure that goes through the substrate and connects the power rail to the power delivery network. The penetration via structure has two conductive patterns, with the first pattern made of a different material than the second pattern.

Abstract

A semiconductor device includes a semiconductor substrate having a first surface and a second surface, which are opposite to each other, an active pattern protruding from the first surface of the semiconductor substrate, the active pattern including a source/drain region, a power rail electrically connected to the source/drain region, a power delivery network disposed on the second surface of the semiconductor substrate, and a penetration via structure penetrating the semiconductor substrate and electrically connected to the power rail and the power delivery network. The penetration via structure includes a first conductive pattern electrically connected to the power rail and a second conductive pattern electrically connected to the power delivery network. The first conductive pattern includes a material different from the second conductive pattern.

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME (18164851)

Main Inventor

Dae Hun Lee

Brief explanation

The abstract describes a semiconductor package that consists of multiple layers and components. It includes a wiring structure with insulating layers and wiring pads, a semiconductor chip, and an interposer. The interposer also has insulating layers and wiring pads. The package has a connecting structure made of metal layers that connect the wiring pads. There is also a mold layer between the wiring structure and the interposer.

Abstract

A semiconductor package includes a wiring structure including a first insulating layer and a first wiring pad. The first wiring pad is in the first insulating layer. The package includes a semiconductor chip on the wiring structure, and an interposer on the semiconductor chip. The interposer includes a second insulating layer and a second wiring pad, and the second wiring pad is in the second insulating layer. The package includes a first connecting structure including a first metal layer and a second metal layer surrounding the first metal layer. The first metal layer includes a lower metal layer adjacent to the wiring structure and an upper metal layer adjacent to the interposer, and the first connecting structure connects the first wiring pad and the second wiring pad. The package includes a mold layer between the wiring structure and the interposer.

STRIP SUBSTRATE AND SEMICONDUCTOR PACKAGE (18339742)

Main Inventor

Sunnyeong JUNG

Brief explanation

The abstract describes a strip substrate that consists of a dielectric layer divided into separate unit regions and a saw line region. The dielectric layer has conductive dummy patterns on the unit regions and saw line patterns on the saw line region. A protection pattern covers the dielectric layer. The ends of the conductive dummy patterns and saw line patterns are spaced apart from each other in different directions. The protection pattern is located between the ends of the conductive dummy patterns and saw line patterns.

Abstract

Disclosed is a strip substrate including a dielectric layer that has a plurality of unit regions spaced apart from each other in a first direction and a saw line region between the unit regions, a plurality of conductive dummy patterns on corresponding unit regions of the dielectric layer, a plurality of saw line patterns on the saw line region of the dielectric layer and extending in a second direction that intersects the first direction, and a protection pattern that covers the dielectric layer. Ends of the conductive dummy patterns are spaced apart from each other in a direction parallel to the first direction. Ends of the saw line patterns are spaced apart from each other in a direction parallel to the second direction. The protection pattern is between the ends of the conductive dummy patterns and between the ends of the saw line patterns.

FILM PACKAGE (18108364)

Main Inventor

Seunghyun CHO

Brief explanation

The abstract describes a film package for a semiconductor chip. The package includes a film substrate, a wiring pattern connected to the chip, and a protective layer covering the wiring pattern. The protective layer has two openings, one for the chip and another separate one. A thermally conductive resin is applied to cover the chip in the first opening, and a thermally conductive film is placed on top of the protective layer. The film has two through-holes, one exposing the resin covering the chip and the other exposing the resin in the separate opening.

Abstract

A film package includes a film substrate, a semiconductor chip disposed on the film substrate, a wiring pattern electrically connected to the semiconductor chip and including an input pattern and an output pattern, a protective layer disposed on the film substrate to cover at least a portion of the wiring pattern and having a first opening in which the semiconductor chip is disposed, and a second opening spaced apart from the first opening, a thermally conductive resin including a first resin disposed on the first opening to cover the semiconductor chip and a second resin disposed on the second opening, and a thermally conductive film disposed on the protective layer and having a first through-hole exposing a portion of the first resin, and a second through-hole exposing a portion of the second resin.

SEMICONDUCTOR DEVICE (18153550)

Main Inventor

Jung Ho Do

Brief explanation

This abstract describes a semiconductor device that includes various components such as power rails, substrates, wells, source/drain regions, contacts, and wiring. These components are arranged in a specific configuration to enable the device to function properly. The abstract does not provide any specific details about the purpose or application of the device, but rather focuses on the arrangement and connectivity of its various parts.

Abstract

According to some embodiments of the present disclosure, a semiconductor device includes a first power rail configured to provide a first voltage and extending in a first direction, a substrate comprising a first well having a first conductivity type and a second well having a second conductivity type, a first well tap having the first conductivity type, on the first well; a first source/drain region having the second conductivity type, on the first well; a first source/drain contact extending in a second direction and electrically connected to the first power rail, on the first source/drain region, a first connection wiring electrically connected to the first source/drain contact and extending in the first direction, and a first well contact electrically connected to the first connection wiring, on the first well tap.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME (18214172)

Main Inventor

Junghwa KIM

Brief explanation

The abstract describes a semiconductor package that consists of two packages stacked on top of each other. The first package contains two semiconductor chips and a core member with a hole. One of the chips is placed inside the hole. An encapsulant is filled in the hole. A redistribution layer is placed above the core member and connects the chips. Another redistribution layer is placed below the core member and connects the chips to an external printed circuit board (PCB). Core vias penetrate the core member and connect the two redistribution layers. The second package is placed on top of the first package and contains a third semiconductor chip. Electrical connection structures connect the first and second packages, and additional electrical connection structures connect the semiconductor package to the external PCB.

Abstract

A semiconductor package includes a first package having a first semiconductor chip, a second semiconductor chip and a core member including a through-hole. At least one of the first and second semiconductor chips is disposed in the through-hole. An encapsulant is disposed in the through-hole. A first redistribution layer is disposed above the core member and is electrically connected to the first and second semiconductor chips. A second redistribution layer is disposed under the core member and electrically connects the first and second semiconductor chips with an external PCB. Core vias penetrate the core member and electrically connect the first and second redistribution layers. A second package is disposed on the first package and includes a third semiconductor chip. A plurality of first electrical connection structures electrically connects the first and second packages. A plurality of second electrical connection structures electrically connects the semiconductor package with the external PCB.

NONVOLATILE MEMORY DEVICES, METHODS OF MANUFACTURING NONVOLATILE MEMORY DEVICE, AND ELECTRONIC SYSTEMS INCLUDING NONVOLATILE MEMORY DEVICE (18149709)

Main Inventor

EUN-JI KIM

Brief explanation

The abstract describes nonvolatile memory devices and the methods used to create them. These devices consist of different regions, including an array region, an extension region, and a pad region. The devices are built on a substrate that includes a source plate. A mold structure is formed on the front surface of the substrate, consisting of gate electrodes and mold insulating films stacked in a stair-like shape in the extension region. The mold structure also includes a channel structure and a cell contact. A first insulator is placed on top of the mold structure, and a second insulator is placed on the rear surface of the substrate. A pad is then added on top of the second insulator. A contact is formed through the first insulator, and a via is created by etching the second insulator and the substrate in the pad region. Importantly, the source plate does not overlap with the cell contact or the contact in a vertical direction.

Abstract

Nonvolatile memory devices and methods of forming the same are provided. The devices may include an array region, an extension region, and a pad region and may include a substrate including a source plate. The devices may also include a mold structure that is on a front surface of the substrate and includes gate electrodes and mold insulating films alternately stacked in a stair shape in the extension region, a channel structure extending through the mold structure, a cell contact extending through the mold structure, a first insulator on the mold structure, a second insulator on a rear surface of the substrate, an pad on the second insulator, an contact extending through the first insulator, and a via formed by etching the second insulator and the substrate in the pad region. The source plate does not overlap the cell contact and the contact in a vertical direction.

SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME (18338372)

Main Inventor

YANGGYOO JUNG

Brief explanation

The abstract describes a semiconductor package that consists of multiple layers and components. It includes a package substrate, an interposer substrate, and a semiconductor chip. The interposer substrate has two base layers with circuit patterns and an integrated device embedded in one of the base layers. The first base layer is in contact with the second base layer.

Abstract

A semiconductor package may include a package substrate, a first interposer substrate mounted on the package substrate, and a first semiconductor chip disposed on the first interposer substrate. The first interposer substrate may include a first base layer, a second base layer disposed on the first base layer, circuit patterns provided in each of the first base layer and the second base layer, and an integrated device embedded in the first base layer and connected to at least one of the circuit patterns. A top surface of the first base layer may contact a bottom surface of the second base layer.

LIMITED LATERAL GROWTH OF S/D EPI BY OUTER DIELECTRIC LAYER IN 3-DIMENSIONAL STACKED DEVICE (17866343)

Main Inventor

Inchan Hwang

Brief explanation

This abstract describes an integrated circuit that consists of two semiconductor devices placed next to each other. Each semiconductor device has two transistors, one on top of the other. These transistors have different regions called source, drain, and channel. The circuit also includes two dielectric spacers, one on each side of the channel region of each transistor. Additionally, there is an interconnect contact between the two semiconductor devices.

Abstract

An integrated circuit includes a first semiconductor device and a second semiconductor device adjacent to the first semiconductor device. Each of the first and second semiconductor devices includes a lower transistor and an upper transistor on the lower transistor, and the upper and lower transistors each include a source region, a drain region, and a channel region extending between the source region and the drain region. The integrated circuit also includes a first dielectric spacer extending along an inner sidewall of the channel region of the upper and/or lower transistor of the first semiconductor device, a second dielectric spacer facing the first dielectric spacer and extending along an inner sidewall of the channel region of the upper and/or lower transistor of the second semiconductor device. The integrated circuit also includes an interconnect contact between the first semiconductor device and the second semiconductor device.

METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT DEVICE (18212304)

Main Inventor

Junggil YANG

Brief explanation

This abstract describes an integrated circuit device that includes a substrate with two device regions. Each device region has a fin active region, which is covered by an isolation film. On top of the isolation film, there are gate cut insulating patterns and a gate line that extends across the fin active regions. The length of the gate line is limited by the gate cut insulating patterns. Additionally, there is an inter-region insulating pattern on the isolation film between the fin active regions. This inter-region insulating pattern partially penetrates the gate line in a vertical direction and has a bottom surface near the substrate, a top surface away from the substrate, and a side wall that extends from the bottom to the top surface.

Abstract

An integrated circuit device including a substrate including first and second device regions; a first fin active region on the first device region; a second fin active region on the second device region; an isolation film covering side walls of the active regions; gate cut insulating patterns on the isolation film on the device regions; a gate line extending on the fin active regions, the gate line having a length limited by the gate cut insulating patterns; and an inter-region insulating pattern on the isolation film between the fin active regions and at least partially penetrating the gate line in a vertical direction, wherein the inter-region insulating pattern has a bottom surface proximate to the substrate, a top surface distal to the substrate, and a side wall linearly extending from the bottom to the top surface.

STEP-STACKED NANOWIRE CMOS STRUCTURE FOR LOW POWER LOGIC DEVICE AND METHOD OF MANUFACTURING THE SAME (17841510)

Main Inventor

Byounghak Hong

Brief explanation

The abstract describes a CMOS device, which is a type of integrated circuit technology commonly used in electronic devices. This device includes a substrate with a shallow trench isolation region, which helps to isolate different components on the substrate. It also includes an nFET (n-channel field-effect transistor) and a pFET (p-channel field-effect transistor).

The nFET consists of a source region, a drain region, and a channel region. The channel region is made up of a series of nanowires that extend from the source region to the drain region. Surrounding these nanowires is a gate region. The nanowires are organized into two columns - a first column and a second column adjacent to the first column.

The pFET also has a source region, a drain region, and a channel region. The channel region extends from the source region to the drain region, and it has a gate region on top.

Overall, this CMOS device is designed to perform electronic functions using both nFET and pFET components, with the nFET utilizing nanowires in its channel region.

Abstract

A CMOS device including a substrate comprising a shallow trench isolation region, an nFET on the substrate above the shallow trench isolation region, and a pFET. The nFET includes a source region, a drain region, a channel region including a series of nanowires extending from the source region to the drain region, and a gate region around the series of nanowires of the channel region. The nanowires include a first series of nanowires in a first column and a second series of nanowires in a second column adjacent to the first column. The pFET includes a source region, a drain region, a channel region extending from the source region to the drain region, and a gate region on the channel region.

SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT, AND MULTI-VALUED LOGIC DEVICE INCLUDING THE SAME (18136464)

Main Inventor

Sungil PARK

Brief explanation

The abstract describes a semiconductor device that has two common source/drain regions, which are separated from each other in one direction. There are two channel structures between these common source/drain regions, with one being above the other. Each channel structure is surrounded by a gate structure. The second channel structure is positioned higher than the first channel structure.

Abstract

A semiconductor device includes a first common source/drain and a second common source/drain spaced apart from each other in a first direction; a first channel structure between the first common source/drain and the second common source/drain, and a second channel structure between the first common source/drain and the second common source/drain and spaced apart from the first channel structure in a vertical direction; a first gate structure surrounding an upper surface, a lower surface, and side surfaces of the first channel structure; and a second gate structure surrounding an upper surface, a lower surface, and side surfaces of the second channel structure, and spaced apart from the first gate structure, wherein a level of the second channel structure is higher than a level of the first channel structure.

SEMICONDUCTOR DEVICE (18117891)

Main Inventor

Sunki Min

Brief explanation

This abstract describes a semiconductor device that includes various components such as an active pattern, gate structure, source/drain region, interlayer insulating layer, and contact structure. The contact structure consists of a contact plug, insulating liner, and conductive barrier layer. The conductive barrier layer has a portion that extends downward from the insulating liner.

Abstract

A semiconductor device includes: an active pattern extending in a first direction, parallel to an upper surface of a substrate, on the substrate; a gate structure extending in a second direction, intersecting the first direction, on the active pattern; a source/drain region disposed in a region, adjacent to the gate structure, on the active pattern; an interlayer insulating layer covering the gate structure and the source/drain region; and a contact structure penetrating through the interlayer insulating layer and contacting the source/drain region. The contact structure may include a contact plug, an insulating liner surrounding a sidewall of the contact plug, and a conductive barrier layer disposed between the insulating liner and the contact plug and on a bottom surface of the contact plug. The conductive barrier layer may have a barrier extension portion extending downwardly from a lower end of the insulating liner.

SEMICONDUCTOR DEVICE HAVING ACTIVE FIN PATTERN AT CELL BOUNDARY (18336754)

Main Inventor

Sanghoon BAEK

Brief explanation

The abstract describes a semiconductor device that consists of two rows of standard cells placed on a substrate. The first row has cells with a certain height, while the second row has cells with a different height. There is also a power line that runs along the boundary between the first and second standard cells in a specific direction.

Abstract

A semiconductor device includes a first standard cell disposed on a substrate in a first row and having a first cell height; a second standard cell disposed on the substrate in a second row, adjacent to the first row, second standard cell having a second cell height, different from the first cell height; and a power line extending in a first direction along a boundary between the first standard cell and the second standard cell.

SEMICONDUCTOR DEVICES (18079057)

Main Inventor

Wonhyuk Lee

Brief explanation

This abstract describes a semiconductor device that includes several components. These components include a gate structure, a gate spacer, a source/drain layer, and a first contact plug. The gate structure consists of a first conductive pattern with a lower and upper portion, a second conductive pattern, and a gate insulating pattern. The first contact plug is in contact with the outer sidewall of the gate spacer and is at the same level as the upper surface of the first conductive pattern.

Abstract

A semiconductor device includes a gate structure on a substrate, a gate spacer on a sidewall of the gate structure, a source/drain layer on a portion of the substrate adjacent to the gate structure, and a first contact plug on the source/drain layer and contacting an outer sidewall of the gate spacer. The gate structure includes a first conductive pattern having a lower portion and an upper portion on the lower portion with a width greater than the lower portion and in contact with an inner sidewall of the gate spacer, a second conductive pattern on a lower surface and a sidewall of the lower portion of the first conductive pattern, and a gate insulating pattern on a lower surface and an outer sidewall of the second conductive pattern. An upper surface of the first conductive pattern is substantially coplanar with an upper surface of the first contact plug.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE (17989936)

Main Inventor

Chankyo PARK

Brief explanation

This abstract describes a method of manufacturing a semiconductor device. The method involves several steps, including forming dummy gate structures on a substrate, applying a first oxide layer on the dummy gate structures, etching the upper portion of the first oxide layer and the dummy gate to create a recess region, adding a first nitride layer in the recessed region, applying a second oxide layer on top of the first nitride layer and the first oxide layer, partially removing the upper portions of the first oxide layer and the second oxide layer, and finally adding a second nitride layer on top of the first and second oxide layers.

Abstract

A method of manufacturing a semiconductor device is provided. The method includes: forming, on a substrate, dummy gate structures extending in a first direction, spaced apart from one another along a second direction, forming a first oxide layer on the dummy gate structures, etching an upper portion of the first oxide layer and the dummy gate to form a recess region, providing a first nitride layer in the recessed region, forming a second oxide layer on the first nitride layer and the first oxide layer, partially removing upper portions of the first oxide layer and the second oxide layer and providing a second nitride layer on the first and second oxide layers.

AVALANCHE PHOTODETECTORS AND IMAGE SENSORS INCLUDING THE SAME (18338631)

Main Inventor

Sanghyun JO

Brief explanation

The abstract describes a small-sized photodetector that is highly efficient in detecting both visible light and infrared rays. It consists of several layers including electrodes, a collector layer, a tunnel barrier layer, a graphene layer, and an emitter layer. This photodetector can be used in an image sensor or a LiDAR system. The image sensor is made up of a substrate, an insulating layer, and multiple photodetectors aligned in a parallel or perpendicular direction on the insulating layer.

Abstract

A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.

NANOROD LIGHT-EMITTING DIODE, DISPLAY APPARATUS INCLUDING THE NANOROD LIGHT-EMITTING DIODE, AND METHOD OF MANUFACTURING THE NANOROD LIGHT-EMITTING DIODE (17960531)

Main Inventor

Youngchul LEEM

Brief explanation

The abstract describes a type of nanorod light-emitting diode (LED) that has a cylindrical body with a hexagonal pyramid shape on top. The LED includes different layers, such as a semiconductor layer, an active layer, a second semiconductor layer, an electrode layer, and an insulating layer. The insulating layer surrounds the side surface of the LED and exposes a lower region of the body.

Abstract

A nanorod light-emitting diode includes a first conductivity-type semiconductor layer including a body having a cylindrical shape, and a hexagonal pyramid shape provided on the body, an active layer covering an upper surface of the hexagonal pyramid shape, a second conductivity-type semiconductor layer covering an upper surface of the active layer, an electrode layer covering an upper surface of the second conductivity-type semiconductor layer, and an insulating layer formed to surround a side surface of the body and to expose a lower region of the side surface of the body.

POWER AMPLIFIER AND ELECTRONIC DEVICE INCLUDING SAME IN WIRELESS COMMUNICATION SYSTEM (18335594)

Main Inventor

Hyunchul PARK

Brief explanation

The abstract describes a Doherty power amplifier for a wireless communication system, specifically for a pre-5G or 5G system. This amplifier is designed to support higher data rates compared to the previous 4G LTE system. It consists of a differential carrier amplifier, a differential peaking amplifier, and an output matching circuit. The output matching circuit includes a primary tuning capacitor, a transformer, and a secondary tuning capacitor. The differential carrier amplifier is connected to the primary tuning capacitor through a carrier capacitor and inductors at the output terminal. The differential peaking amplifier is also connected to the primary tuning capacitor. The primary tuning capacitor, inductors, and carrier capacitor are configured to function as a quarter-wave transformer.

Abstract

The disclosure relates to a pre-5-Generation (5G) or 5G communication system to be provided for supporting higher data rates beyond a 4-Generation (4G) communication system such as long term evolution (LTE). A Doherty power amplifier in a wireless communication system is provided. The Doherty power amplifier includes a differential carrier amplifier, a differential peaking amplifier, and an output matching circuit. The output matching circuit may include a primary tuning capacitor, a transformer, and a secondary tuning capacitor. The differential carrier amplifier may be connected to the primary tuning capacitor through a carrier capacitor, and inductors, of an output terminal of the differential carrier amplifier. The differential peaking amplifier may be connected to the primary tuning capacitor. The primary tuning capacitor, the inductors, and the carrier capacitor may be configured to function as a quarter-wave transformer.

HARD DECISION DECODING OF NON-VOLATILE MEMORY USING MACHINE LEARNING (17720941)

Main Inventor

Amit BERMAN

Brief explanation

This abstract describes a memory system that includes memory cells and a memory controller. The memory controller can read data from the memory cells and perform a decoding process on the data. The processor in the memory controller applies the decoded data and additional raw data to a machine learning algorithm to generate reliability information. This reliability information is then used to perform another decoding process on the raw data, resulting in a second set of decoded data.

Abstract

A memory system includes a plurality of memory cells each storing multiple bits and a memory controller having a processor. The memory controller is configured to read outputs from the memory cells in response to a read command from a host to generate first raw data of a first page and second raw data of a second page adjacent to the first page. The memory controller is further configured to perform a hard decision (HD) decoding on the first raw data to generate first decoded data. The processor is configured to apply the first decoded data and the second raw data as input features to a machine learning algorithm to generate reliability information. The memory controller is further configured to perform a HD decoding on the second raw data using the reliability information to generate second decoded data.

ELECTRONIC DEVICE INCLUDING ANTENNA (18082138)

Main Inventor

Sungsun KIM

Brief explanation

The abstract describes an electronic device with a housing that has at least one opening. Inside the housing, there is a support member and a display attached to it. The device also includes a first printed circuit board with multiple layers. On one surface of the board, there is a wireless communication circuit, and on the other surface, there is a feeding structure that is connected to the wireless circuit. The device also has a waveguide that is used to transmit signals from the wireless circuit to the outside of the housing. The waveguide runs along the surface of the support member starting from the feeding structure. The abstract mentions that there are other possible embodiments of this device.

Abstract

An electronic device according to an embodiment includes a housing including at least one opening; a support member in the housing; a display disposed on the support member; a first printed circuit board including a plurality of layers; a first wireless communication circuit disposed on a first surface of the first printed circuit board; a feeding structure on another surface of the first printed circuit board electrically connected to the first wireless communication circuit; and a waveguide configured to transmit a signal provided from the first wireless communication circuit to an outside of the housing, and the waveguide extends along one surface of the support member from the feeding structure. Other embodiments are possible.

DEVICE AND METHOD FOR CONTROLLING BEAMFORMER IN WIRELESS COMMUNICATION SYSTEM (18141812)

Main Inventor

Yongyun CHOI

Brief explanation

The abstract describes a method used by a base station in a wireless communication system. The base station selects an antenna that meets a certain power threshold and generates a beamformer for that antenna. The beamformer is then adjusted using an overlap coefficient matrix. The adjusted beamformer is combined with the original beamformer to create a third beamformer. Finally, the base station transmits a signal using this third beamformer.

Abstract

A method performed by a base station in a wireless communication system, includes: determining, from among a plurality of antennas of the base station, a first antenna that meets a power threshold, based on a first beamformer scaled according to a power limit; generating a second beamformer corresponding to the first antenna; applying an overlap coefficient matrix to the second beamformer; generating a third beamformer by combining the second beamformer to which the overlap coefficient matrix has been applied and the first beamformer; and transmitting a signal using the third beamformer.

REPORTING OF CHANNEL STATE INFORMATION (18154751)

Main Inventor

Hoda SHAHMOHAMMADIAN

Brief explanation

The abstract describes a method for a User Equipment (UE) to report channel state information to a network node. The UE receives two Channel State Information Reference Signals (CSI-RS) and uses them to calculate a predicted channel state information. This predicted information is then transmitted to the network node in the form of a first precoding matrix.

Abstract

Systems and methods for reporting channel state information. In some embodiments, the method includes: receiving, by a UE, a first Channel State Information Reference Signal (CSI-RS); receiving, by the UE, a second CSI-RS; calculating, by the UE, a first predicted channel state information based on the first CSI-RS and the second CSI-RS; and transmitting, to a network node (gNB), a first precoding matrix corresponding to the first predicted channel state information.

TECHNIQUE AND APPARATUS FOR MANAGING MOBILITY OF TERMINAL IN SATELLITE COMMUNICATION SYSTEM (18245664)

Main Inventor

Sunhyun KIM

Brief explanation

The abstract describes a communication system, specifically for 5G or 6G, that supports higher data rates compared to the previous 4G system (LTE). It introduces a satellite communication cell management apparatus that is responsible for managing satellite communication cells of one or more satellites. This apparatus includes a transceiver and at least one processor. The processor is designed to establish connections between the satellite communication cells and base stations (BSs), as well as update these connections based on the movement of the satellite relative to the ground.

Abstract

The present disclosure relates to a 5generation (5G) or 6generation (6G) communication system for supporting a data rate higher than a 4generation (4G) communication system such as long term evolution (LTE). The present disclosure provides a satellite communication cell management apparatus for managing satellite communication cells of at least one satellite, the satellite communication cell management apparatus including a transceiver, and at least one processor, wherein the at least one processor is configured to connect the satellite communication cells to base stations (BSs), and update connections between the satellite communication cells and the BSs, according to a relative movement of the at least one satellite with respect to the ground.

METHOD AND APPARATUS FOR CONTENTION WINDOW ADJUSTMENT ON SIDELINK (18296293)

Main Inventor

Hongbo Si

Brief explanation

This abstract describes methods and devices for adjusting the contention window (CW) on a sidelink (SL) in a wireless communication system. The method involves a user equipment (UE) determining if hybrid automatic repeat request (HARQ) feedback is available after the last update of the CW size. If HARQ feedback is available, the UE determines a set of HARQ feedback corresponding to physical sidelink shared channels (PSSCHs) during a reference duration. Based on this set of HARQ feedback, the UE determines a first condition. If the first condition is satisfied, the CW is reset to the minimum allowed value. If the first condition is not satisfied, the CW is increased to the next higher allowed value. The method also includes performing a SL channel access procedure based on the CW and performing a SL transmission over a channel after successfully performing the SL channel access procedure.

Abstract

Methods and apparatuses for contention window adjustment on a sidelink (SL) in a wireless communication system. A method of a user equipment (UE) includes determining whether hybrid automatic repeat request (HARQ) feedback is available after a last update of a contention window size (CW); determining a set of HARQ feedback corresponding to physical sidelink shared channels (PSSCHs) in a reference duration when the at least one HARQ feedback is determined as available; and determining a first condition based on the set of HARQ feedback. The method further includes determining to: reset the CW to a minimum allowed value when the first condition is satisfied or increase the CW to a next higher allowed value when the first condition is not. The method further includes performing a SL channel access procedure based on the CW and performing a SL transmission over a channel after successfully performing the SL channel access procedure.

PUCCH TRANSMISSIONS WITH MULTICAST HARQ-ACK INFORMATION (18296887)

Main Inventor

Aris Papasakellariou

Brief explanation

The abstract describes a method and apparatus for transmitting a physical uplink control channel (PUCCH) with multicast hybrid automatic repeat request acknowledgement (HARQ-ACK) information. The method involves receiving information for a set of PUCCH resources and first physical downlink shared channels (PDSCHs) that provide transport blocks (TBs). The method then determines HARQ-ACK information bits associated with the TBs and provides them only when at least one PUCCH resource overlaps in time with a transmission of a first physical uplink shared channel (PUSCH). The value of each HARQ-ACK information bit corresponds to positive acknowledgement (ACK). Finally, the method transmits the first PUSCH, which includes the HARQ-ACK information bits when the PUCCH resource overlaps in time with the PUSCH.

Abstract

Apparatuses and methods for transmitting a physical uplink control channel (PUCCH) with multicast hybrid automatic repeat request acknowledgement (HARQ-ACK) information. A method includes receiving information for a set of PUCCH resources and first physical downlink shared channels (PDSCHs) that provide first transport blocks (TBs). The method further includes determining first hybrid automatic repeat request acknowledgement (HARQ-ACK) information bits associated with the first TBs and to provide the first HARQ-ACK information bits only when at least one PUCCH resource from the set of PUCCH resources overlaps in time with a transmission of a first physical uplink shared channel (PUSCH). A value for each of the first HARQ-ACK information bits corresponds to positive acknowledgement (ACK). The method further includes transmitting the first PUSCH. The first PUSCH includes the first HARQ-ACK information bits when the at least one PUCCH resource overlaps in time with the first PUSCH.

METHOD AND DEVICE FOR CONTROL AND DATA INFORMATION TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM (17778719)

Main Inventor

Sungjin PARK

Brief explanation

The abstract describes a communication technique that combines 5G and IoT technology to support high-speed data transmission. This technology can be applied to various intelligent services such as smart homes, buildings, cities, cars, healthcare, education, retail, and security. The abstract also mentions a method and device for transmitting feedback for downlink data transmission. Specifically, it discusses a method for configuring feedback bits when a terminal wants to transmit multiple acknowledgments within one slot through an uplink.

Abstract

The present disclosure relates to a communication technique that combines a 5G communication system for supporting a higher data transmission rate than a 4G system with IoT technology, and a system therefor. The present disclosure may be applied to intelligent services (for example, smart homes, smart buildings, smart cities, smart cars or connected cars, healthcare, digital education, retail businesses, security and safety-related services, etc.) on the basis of 5G communication technology and IoT-related technology. Furthermore, the present disclosure provides a method and device for transmitting HARQ-ACK feedback for downlink data transmission. Specifically, disclosed are a method for configuring HARQ-ACK feedback bits when a terminal intends to transmit multiple HARQ-ACKs within one slot through an uplink, and a device therefor.

METHOD AND APPARATUS FOR DOWNLINK OFDMA HAVING DFT-PRECODING APPLIED THERETO (18341200)

Main Inventor

Seunghyun LEE

Brief explanation

The abstract describes a communication system, specifically for 5G or 6G networks, that supports faster data transfer rates compared to 4G LTE. The system involves a method performed by a base station, which includes determining the number of chunks on which a specific type of data processing called DFT precoding is performed. The base station also determines a power backoff value for its power amplifier. It then transmits information about the number of DFT-precoding chunks to a terminal device. Additionally, the base station sends downlink control information (DCI) to the terminal, which includes a field for allocating resources based on the number of DFT-precoding chunks. Finally, the base station transmits data to the terminal according to the resource allocation field in the DCI.

Abstract

The disclosure relates to a 5G or 6G communication system for supporting a higher data transfer rate beyond a 4G communication system, such as LTE. A method by a base station in a communication system according to an embodiment may include: determining the number of DFT-precoding chunks on which DFT precoding is performed; determining a power backoff value of a power amplifier (PA) of the base station; transmitting information indicating the number of DFT-precoding chunks to a terminal; transmitting downlink control information (DCI) including a resource allocation field, configured based on the number of DFT-precoding chunks, to the terminal; and transmitting data to the terminal according to the resource allocation field included in the DCI.

METHOD AND APPARATUS FOR REDUCING LATENCY OF STREAMING SERVICE BY NETWORK SLICES PARALLEL IN WIRELESS COMMUNICATION SYSTEM (18333042)

Main Inventor

Grzegorz Pawel GRZESIAK

Brief explanation

The abstract describes a method for operating a streaming service client (SSC) node in a wireless communication system, specifically in the context of 5G or 6G technology. The method involves establishing a connection to a streaming service provider (SSP) using two types of services: enhanced mobile broadband (eMBB) and ultra reliable low latency communication (URLLC). The SSC node receives first data from the SSP via eMBB and simultaneously receives second data, which is metadata of the first data, via URLLC. The method also includes determining whether the first data is successfully received and, if not, producing a data stream using the second data.

Abstract

The disclosure relates to the 5th generation (5G) or 6th generation (6G) communication system to support a high data transmission rate than before. A method of operating a streaming service client (SSC) node in a wireless communication system is provided. The method includes an operation of establishing a connection to a streaming service provider (SSP) via two types of services that are enhanced mobile broadband (eMBB) and ultra reliable low latency communication (URLLC), an operation of receiving first data from the SSP via the eMBB, and simultaneously receiving second data via the URLLC, wherein the second data is metadata of the first data, and operation of determining whether the first data is successfully received, and an operation of producing a data stream using the second data in a case in which the first data is not successfully received.

ELECTRONIC DEVICE INCLUDING AN ANTENNA (18213067)

Main Inventor

Moohyun Baek

Brief explanation

This abstract describes an electronic device that includes a communication module, a printed circuit board (PCB), and a housing. The housing supports the PCB and consists of an inner supporter made of a conductive material and an outer casing. The inner supporter includes a main body made of a conductive sheet, a bridge extending from the main body, at least one antenna radiator extending from the bridge along the outer edge of the housing, a contact portion facing inside the housing, and a connecting member made of a non-conductive material that fixes the antenna radiator.

Abstract

An electronic device includes a communication module; a printed circuit board (PCB) provided with the communication module; and a housing supporting the PCB, and including an inner supporter made of a conductive material and an outer casing supporting the inner supporter. The inner supporter includes: a main body made of a conductive sheet; a bridge extended from an outer edge of the main body in a certain direction; at least one antenna radiator extended from the bridge along an outer edge of the housing; a contact portion provided from the at least one antenna radiator and facing toward an inside of the housing; and a connecting member made of a non-conductive material and fixing the at least one antenna radiator.

APPARATUS HAVING SLOT ANTENNA USING CAMERA COVER IN ELECTRONIC DEVICE (18212696)

Main Inventor

Minkyung LEE

Brief explanation

This abstract describes an electronic device that includes a camera cover, a wireless communication circuit, and three frames. The frames are connected to the camera cover and extend along the periphery of the camera cover. The second frame is positioned away from the first frame and forms part of the second surface, while also extending to form part of the third surface. The third frame has a gap from the first frame in a specific direction in one area and is connected to the first frame in another area. The wireless communication circuit can receive signals of a specific frequency band by utilizing a slot structure created by the gap between the first and third frames.

Abstract

An electronic device includes a camera cover, a wireless communication circuit, a first frame, a second frame and a third frame, extends from a second surface along a part not included in a first surface and the second surface among the periphery of the camera cover, and is connected to the camera cover. The second frame is positioned away from the first frame to form a part of the second surface, and extends from the second surface to form a part of a third surface. The third frame has a gap from the first frame in a specific direction in a first area and is connected to the first frame in a second area. The wireless communication circuit can receive a signal of a specific frequency band by feeding power to a slot structure comprising the gap between the first frame and the third frame.

ELECTRONIC DEVICE HAVING FLEXIBLE DISPLAY MODULE (18152467)

Main Inventor

Jaehong WON

Brief explanation

The abstract describes an electronic device with a flexible display module that has a patterned window. The patterned window consists of multiple sections, each with at least three corners that have a specific curvature. The upper side of the patterned window has first curved corners, while the lower side has second curved corners. The first and second curvatures are different from each other.

Abstract

An electronic device including a flexible display module is provided. The flexible display module includes a patterned window. The patterned window includes a plurality of patterned portions. The plurality of patterned portions each have at least three corners having a predetermined curvature. One or more first corners formed on an upper side of the patterned window have a first curvature, and one or more second corners formed on a lower side of the patterned window have a second curvature, the first curvature and the second curvature being different from each other.

ELECTRONIC DEVICE INCLUDING MULTIPLE PCBS AND ANTENNAS PRINTED ON PCBS (18338854)

Main Inventor

Taejin KANG

Brief explanation

The abstract describes an electronic device with a housing that has two plates, a display inside the housing, and three printed circuit boards. The first and second printed circuit boards are positioned between the display and the second plate, while the third printed circuit board connects the first and second printed circuit boards. The device also includes a first antenna connected to the first printed circuit board, and the third printed circuit board may have a second antenna connected to the first antenna.

Abstract

An electronic device is provided. The electronic device includes a housing including a first plate facing a first direction and a second plate facing a second direction opposite to the first direction, and forming a space between the first plate and the second plate, a display disposed inside the housing and exposed through the first plate, a first printed circuit board disposed between the display and the second plate, a second printed circuit board disposed between the display and the second plate, a third printed circuit board which is disposed between the display and the second plate and electrically connects the first printed circuit board and the second printed circuit board, and a first antenna coupled to the first printed circuit board, wherein the third printed circuit board may include a second antenna electrically connected to the first antenna.

FOLDABLE ELECTRONIC APPARATUS AND METHOD FOR SUPPLYING ELECTRICAL POWER TO EXTERNAL ELECTRONIC APPARATUS BY USING FOLDABLE ELECTRONIC APPARATUS (18338349)

Main Inventor

Seyeon LEE

Brief explanation

This abstract describes an electronic device that has a sensor module to determine if it is unfolded or folded. It also checks if a hidden surface becomes visible when unfolded and is placed on a surface. If these conditions are met, it checks if another electronic device is present on a charging unit. If so, it turns on a sub display and wirelessly supplies power to the external device while keeping the sub display on.

Abstract

An electronic apparatus uses a sensor module to check whether the electronic apparatus is in an unfolded state, uses the sensor module to check whether a first surface, which is concealed in a folded state and externally visible in the unfolded state, is lying on an external ground surface, checks, in response to the electronic apparatus being in the unfolded state and the first surface lying on the external ground surface, whether the external electronic apparatus is present on a charging unit, turns on a screen of a sub display, which is facing in the opposite direction as the first surface, in response to the external electronic apparatus being present on the charging unit, uses the charging unit to wirelessly supply electrical power to the external electronic apparatus, and keeps the screen of the sub display on while electrical power is being supplied to the external electronic apparatus.

V3C VIDEO COMPONENT TRACK ALTERNATIVES (18336824)

Main Inventor

Youngkwon Lim

Brief explanation

This abstract describes an apparatus that includes a communication interface and a processor. The communication interface receives a compressed bitstream containing multiple tracks. The processor identifies an atlas track that corresponds to a point cloud compression (PCC) component. It also identifies a set of first component tracks that are referenced by the atlas track, as well as at least one second component track, which is an alternative version of a first component track. The processor determines which tracks are appropriate versions of the PCC component and decodes the appropriate version from the set of first component tracks and the at least one second component track.

Abstract

An apparatus includes a communication interface and a processor operably coupled to the communication interface. The communication interface receives a plurality of tracks in a compressed bitstream. The processor identifies an atlas track corresponding to a point cloud compression (PCC) component and identifies a set of first component tracks that is referenced by the atlas track and at least one second component track, each of the at least one second component track is an alternative version of a first component track of the set of first component tracks. The processor also determines which of the set of first component tracks and the at least one second component track are appropriate versions of the PCC component. The processor further decodes the appropriate version of the PCC component from among the set of first component tracks and the at least one second component track.

METHOD FOR ENCODING AND DECODING MOTION INFORMATION, AND APPARATUS FOR ENCODING AND DECODING MOTION INFORMATION (18336672)

Main Inventor

Seung-soo JEONG

Brief explanation

This abstract describes a method for decoding motion information. The method involves obtaining information about the disparity distance, which is used to determine a prediction motion vector for a current block. The disparity distance is scaled based on a comparison between a base pixel unit and the smallest pixel unit indicated by the motion vector of the current block. A prediction motion vector candidate is then determined by changing the base motion vector of the current block using the scaled disparity distance. Finally, the motion vector of the current block is determined using the prediction motion vector.

Abstract

A method of decoding motion information according to an embodiment includes: obtaining information indicating a disparity distance for determining a prediction motion vector of a current block; scaling the disparity distance corresponding to the obtained information, based on a comparison result between a base pixel unit and a smallest pixel unit indicatable by a motion vector of the current block; determining a prediction motion vector candidate changed by the scaled disparity distance from a base motion vector of the current block from among one or more prediction motion vector candidates as the prediction motion vector of the current block; and determining the motion vector of the current block by using the prediction motion vector.

VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM (18341966)

Main Inventor

Jaehong JUNG

Brief explanation

The abstract describes a video signal decoding apparatus that includes a processor. The processor is designed to perform several tasks. Firstly, it parses a syntax element that is related to a secondary transform of a coding unit. This parsing is based on whether the prediction method of the coding unit is MIP (Matrix based Intra Prediction). Next, it checks whether the secondary transform is applied to a transform block within the coding unit, using the parsed syntax element. If the secondary transform is applied, the processor obtains one or more inverse transform coefficients by performing an inverse transform of the secondary transform. Finally, the processor obtains a residual sample for the transform block based on the obtained inverse transform coefficients.

Abstract

A video signal decoding apparatus, comprising a processor, wherein the processor is configured to: parse a syntax element related to a secondary transform of a coding unit based on whether a prediction method of the coding unit is MIP (Matrix based Intra Prediction), check whether or not the secondary transform is applied to a transform block included in the coding unit based on the parsed syntax element, obtain one or more inverse transform coefficients based on an inverse transform of the secondary transform when the secondary transform is applied to the transform block, obtain a residual sample for the transform block based on the one or more inverse transform coefficients.

APPARATUS AND SYSTEM FOR PROVIDING CONTENT BASED ON USER UTTERANCE (18211129)

Main Inventor

Jibum MOON

Brief explanation

The abstract describes a display device that includes a voice signal receiver, a display screen, memory to store an application and instructions, a communication circuit to connect with external servers, and a processor. The device supports a contents providing service that offers two types of content files.

Abstract

An example display device may include a voice signal receiver, a display, at least one memory storing an application supporting a contents providing service and storing instructions, a communication circuit communicating with at least one external server supporting the contents providing service, and at least one processor. The contents providing service may provide contents files of a first type and contents files of a second type.

IMAGE SENSING SYSTEM FOR CONVERTING AN IMAGE SIGNAL TO HAVE A SPECIFIC PATTERN (18341000)

Main Inventor

Jang Ho MOON

Brief explanation

The abstract describes an image sensing system that consists of a camera module and an application processor. The camera module includes an image sensor with a pixel array, which has color filters arranged in a specific pattern. The image sensor captures light and generates an image signal with the same pattern as the color filters. The camera module also has two converters that convert the image signal into different patterns. The application processor then performs image processing on the final pattern of the image signal.

Abstract

An image sensing system includes a camera module and an application processor. The camera module includes: an image sensor including a pixel array, the pixel array including color filters having a first pattern, the image sensor being configured to sense light incident on the pixel array to generate a first pattern image signal having the first pattern; a first converter configured to convert the first pattern image signal into a second pattern image signal having a second pattern different from the first pattern; and a second converter configured to convert the second pattern image signal into a third pattern image signal having a third pattern different from the first pattern and the second pattern. The application processor is configured to perform image processing on the third pattern image signal.

ELECTRONIC DEVICE COMPRISING MICROPHONE MODULE (18338806)

Main Inventor

Heejun RYU

Brief explanation

The abstract describes an electronic device that includes a rear plate with a hole, a flash member with a lens and support structure, and a support member with another hole. The flash member is placed in the hole of the rear plate, and the support member is placed under the flash member. A microphone module is also included and is positioned under the support member, covering its hole.

Abstract

An electronic device is provided. The electronic device includes a rear plate which includes a first through-hole, a flash member which includes a flash lens and a support structure accommodating the flash lens and including a second through-hole opposite to the rear plate, and at least a part of which is disposed in the first through-hole, a support member which supports the flash member and includes a third through-hole opposite to at least a part of the second through-hole, and a microphone module which is disposed under the support member and covers the third through-hole.

ELECTRONIC DEVICE FOR PROCESSING AUDIO DATA AND OPERATION METHOD THEREFOR (18337987)

Main Inventor

Gupil CHEONG

Brief explanation

This abstract describes an electronic device that can establish wireless communication with two external devices. It can receive audio data and transmit it to the respective external devices. In case there are issues with the second external device or if the user removes the device, the audio data will be transmitted to the first external device, which will then transmit it to the second external device.

Abstract

An electronic device may include: a communication module supporting wireless communication; and a processor. The processor may be configured to: establish, through the communication module, a first communication link with a first external electronic device, and a second communication link with a second external electronic device; acquire first audio data and second audio data on the basis of a command for outputting stereo audio; transmit the first audio data to the first external electronic device by using the first communication link, and transmit the second audio data to the second external electronic device by using the second communication link; and in response to identification of at least one of a communication deterioration in the second external electronic device, releasing of a connection, and releasing of wearing by a user, transmit the first audio data and the second audio data to the first external electronic device by using the first communication link so that the first external electronic device transmits the second audio data to the second external electronic device.

ELECTRONIC DEVICE FOR CONFIGURING GEOFENCE AND OPERATION METHOD THEREOF (18339651)

Main Inventor

Sunggyu YIM

Brief explanation

This abstract describes an electronic device that has a communication circuit and a processor. The processor is able to receive location information of the device and determine if the amount of location information is equal to or greater than a certain reference amount. If it is, the device can adjust its geofence configuration based on the accuracy of the location information. The accuracy is determined by the probability that the device is actually located in a specific area.

Abstract

An electronic device may include a communication circuit and a processor electrically connected to the communication circuit, where the processor may be configured to receive location information of the electronic device, identify whether an amount of the location information is greater than or equal to a reference amount, and change a geofence configuration based on a location accuracy radius of the location information, in case that the location information amount is equal to or greater than the reference amount, and the location accuracy radius may be determined based on a probability that the electronic device is actually located in a specific area.

ELECTRONIC DEVICE, AND METHOD FOR GROUPING EXTERNAL DEVICES BY SPACE IN ELECTRONIC DEVICE (18213467)

Main Inventor

Hyungrae CHO

Brief explanation

The abstract describes an electronic device that has a communication module, a depth camera module, and a processor. The device can obtain distance and direction information of an external device using the communication module, and it can also obtain distance information between the device and an object in a specific space using the depth camera module. If the external device is within a certain distance range, the device can identify that the external device is in the specific space and group it as a device in that space.

Abstract

An electronic device includes a first communication module, a depth camera module, and a processor. The processor may be configured to: obtain distance information and direction information of a first external device by using the first communication module; and obtain first distance information between the electronic device and an object in a first space that distinguishes the first space from other spaces, by using the depth camera module, When it is identified that the first external device is located within a distance range indicating the first distance information, on the basis of the distance information and direction information of the first external device and the first distance information, the electronic device can identify that the first external device is located in the first space; and group the first external device as a device in the first space. Various other embodiments may be provided.

METHOD AND APPARATUS FOR CONTROLLING COMMUNICATION OF PLURALITY OF DEVICES BELONGING TO COMMUNICATION GROUP (18340557)

Main Inventor

Michal WODCZAK

Brief explanation

This abstract describes a method for controlling communication among multiple devices in a wireless communication system. The method involves requesting the creation of a communication group and receiving information from an artificial intelligence entity about specific devices within the group that will engage in cooperative transmission. Based on this information, the method identifies the devices and the modulation methods they should use for the cooperative transmission. Finally, the method requests the identified devices to perform data modulation according to the specified modulation methods.

Abstract

A method of controlling communication of a plurality of devices belonging to a communication group in a wireless communication system is provided. The method includes requesting generation of the communication group, receiving, from a distributed artificial intelligence entity, information about terminals that are to perform cooperative transmission among the plurality of terminals included in the communication group, identifying, based on the information about the terminals that are to perform the cooperative transmission, the terminals that are to perform the cooperative transmission and modulation methods to be requested for the terminals that are to perform the cooperative transmission, respectively, for the cooperative transmission, and requesting the terminals that are to perform the cooperative transmission, to perform data modulation according to the identified modulation methods, respectively.

ELECTRONIC DEVICE PERFORMING VERIFICATION USING EMBEDDED SIM AND OPERATING METHOD THEREFOR (18340410)

Main Inventor

Sanghwi LEE

Brief explanation

This abstract describes an electronic device that includes a processor and an embedded subscriber identity module (eSIM). The device is capable of checking the eSIM for testing, obtaining a profile from the device's memory or an external device, writing the profile to the eSIM, activating the profile, associating a protocol stack with the eSIM for testing, performing a test operation using the profile and protocol stack, deactivating the profile after the test is completed, and deleting the profile.

Abstract

An electronic device is provided. The electronic device includes at least one processor and at least one embedded subscriber identity module (eSIM), wherein the at least one processor can be set to check an eSIM for testing among the at least one eSIM, obtain a profile for writing to the eSIM from a memory of the electronic device and/or an external device different from a SM-DP+ server, write the profile to the eSIM, activate the profile, perform an operation for associating, with the eSIM, a protocol stack corresponding to a port for testing among a plurality of ports associated with the at least one processor, perform a test operation using the profile and the protocol stack associated with the eSIM, upon completion of the performance of the test operation, deactivate the profile, and delete the profile.

SECONDARY CELL DISCOVERY IN ENERGY SAVING NETWORK (18114685)

Main Inventor

Liang HU

Brief explanation

The abstract describes a system and method for communication using light signals. When a synchronization signal block (SSB) is not detected, the system receives a light reference signal (RS) on a specific frequency. It then measures the light RS and sends a report based on this measurement. Finally, it starts receiving at least one SSB on the same frequency based on the report.

Abstract

A system and a method are disclosed for performing communication by receiving a light reference signal (RS) on a carrier frequency where a synchronization signal block (SSB) is not detected; in response to receiving the light RS, obtaining a light RS measurement and transmitting a light RS measurement report based on the light RS measurement; and starting to receive at least one SSB on the carrier frequency based on the light RS measurement report.

METHOD AND APPARATUS FOR CSI REPORT CONFIGURATION FOR CSI PREDICTIONS IN ONE OR MORE DOMAINS (18300709)

Main Inventor

Caleb K. Lo

Brief explanation

This abstract describes apparatuses and methods for configuring a CSI report for CSI predictions in one or more domains. The method involves a user equipment (UE) transmitting information about its capability to support machine learning (ML) based channel state information (CSI) prediction. The UE then receives configuration information specifying parameters for ML based CSI prediction. It also receives CSI reference signals (RSs) and measures them. Using the configuration information and the measured CSI-RSs, the method determines multiple CSI predictions in the specified domains. It then creates a CSI report that includes some of these predictions and information about the dependencies between them. Finally, the UE transmits the CSI report.

Abstract

Apparatuses and methods for a CSI report configuration for CSI predictions in one or more domains. A method performed by a user equipment (UE) includes transmitting capability information indicating capability of the UE to support machine learning (ML) based channel state information (CSI) prediction in one or more domains, receiving configuration information that indicates parameters for ML based CSI prediction in the one or more domains; receiving CSI reference signals (RSs), and measuring the CSI-RSs. The method further includes determining, based on the configuration information and the measured CSI-RSs, a plurality of CSI predictions in the one or more domains; determining a CSI report including one or more of the plurality of CSI predictions and dependency information indicating dependencies between CSI predictions in the plurality of CSI predictions; and transmitting the CSI report.

METHOD AND APPARATUS FOR CONFIGURING A RELAY NODE (18341167)

Main Inventor

Weiwei WANG

Brief explanation

The abstract describes a communication system that supports higher data rates than the current 4G LTE system. It introduces a method and apparatus for configuring a relay node in this system. The method involves transmitting a message from a first node to a second node, which contains information about a radio bearer for a user accessing the second node. This configuration allows for data transmission in a multi-hop network.

Abstract

The disclosure relates to a pre-5-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE). The disclosure provides a method and apparatus for configuring a relay node. A first node transmits to a second node a message that carries information on a radio bearer for a user accessing the second node. Configuration of the radio bearer for data transmission in a multi-hop network is realized through the above method and apparatus.

METHOD FOR SUPPORTING HANDOVER AND CORRESPONDING APPARATUS (18340706)

Main Inventor

Lixiang XU

Brief explanation

The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology. This allows for higher data rates and supports various intelligent services such as smart home, smart city, and connected car. The method focuses on enabling a smooth transition from a 4G system to a 5G system, ensuring data continuity and avoiding data loss during the handover process.

Abstract

The present disclosure relates to a communication method and system for converging a 5-Generation (5G) communication system for supporting higher data rates beyond a 4-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The present disclosure provides a method of a base station for supporting an inter-system handover from an evolved packet system (EPS) system to a 5th generation (5G) system. The method solves the data forwarding problem during the movement of a UE between an LTE system and a 5G system, so that the loss of data is avoided and the continuity of services is ensured.

METHODS AND APPARATUS FOR LOW POWER WAKE-UP SIGNAL WAVEFORM DESIGN AND MULTIPLEXING WITH NEW RADIO WAVEFORM (18120205)

Main Inventor

Seyed Mohsen HOSSEINIAN

Brief explanation

The abstract describes a method used by a gNB (gNodeB) in wireless communication. The gNB encodes a low power wake up signal (LP-WUS) payload using a line coding scheme. This encoded signal is then mapped to baseband symbols using a keying modulation technique. The symbols from the modulation are further mapped to baseband LP-WUS blocks. Finally, these baseband LP-WUS blocks are transmitted to at least one UE (User Equipment).

Abstract

Disclosed is a method of a gNB, including encoding a low power wake up signal (LP-WUS) payload using a line coding scheme, mapping a line coding output of the line coding scheme to baseband symbols using a keying modulation, mapping symbols of the keying modulation to baseband LP-WUS blocks, and transmitting the baseband LP-WUS blocks to at least one UE

SIDELINK SYNCHRONIZATION FOR INTRA-BAND COEXISTENCE (18111177)

Main Inventor

Yaser Mohamed Mostafa Kamal FOUAD

Brief explanation

This abstract describes a system and method for synchronization in a coexistence band where two different communication schemes are used. The method involves determining if a base station or another user equipment (UE) synchronized with the base station is detected. If neither is detected, the method then determines if a first UE, which has a modem for the first communication scheme, is resending a synchronization reference signal based on a second synchronization reference signal of the second communication scheme. If the first UE is detected, the method synchronizes to that UE.

Abstract

A system and a method are disclosed for synchronization performed by a UE in a coexistence band of a first communication scheme and a second communication scheme. A method includes determining if a base station or another UE synchronized with the base station is detected, in response to determining that neither the base station nor the another UE synchronized with the base station is detected, determining if a first UE that is resending a first synchronization reference signal based on a second synchronization reference signal of the second communication scheme is detected, wherein the first UE includes a modem corresponding to the first communication scheme, and in response to detecting the first UE that is resending the first synchronization reference signal, synchronizing to the first UE.

METHODS FOR POSITIONING IN LOW-POWER REDUCED CAPABILITY USER EQUIPMENT (18184611)

Main Inventor

Yuhan Zhou

Brief explanation

This abstract describes a system and method for positioning a user equipment (UE). The UE receives a radio resource control (RCC) signal that includes a measurement request. It also receives at least two positioning reference signals (PRSs), each corresponding to different fractions of an operating frequency range. The UE determines that the PRSs can be combined coherently and aggregates them in one measurement gap. Finally, the UE reports measurements based on the aggregated PRSs.

Abstract

A system and a method for positioning by a user equipment (UE) may include receiving, by the UE, a radio resource control (RCC) signal comprising a measurement request, receiving, by the UE, at least two positioning reference signals (PRSs), each of the at least two PRSs corresponding to different fractions of an operating frequency range, determining that the at least PRSs are coherently combinable, aggregating, by the UE, the at least two PRSs in one measurement gap, and reporting, by the UE, measurements based on the aggregating the at least two PRSs.

METHOD AND APPARATUS FOR INTER-USER EQUIPMENT COORDINATION SIGNALING (18339223)

Main Inventor

Emad N. Farag

Brief explanation

The abstract describes methods and devices for coordinating signaling between user equipment (UE) in a wireless communication system. The UE performs SL sensing to determine a set of SL resources, and then selects one or more resources from this set for reservation. Information about these reserved resources is transmitted, and the UE receives information indicating if there are conflicts with other UEs. If there are no conflicts, the UE transmits on the reserved resource. If conflicts exist, the UE determines a new set of resources and selects one or more from this set for transmission and reservation.

Abstract

Methods and apparatuses for inter user equipment (UE) coordination signaling. A method of operating a UE includes determining a first set of first sidelink (SL) resources based on SL sensing and resource exclusion; selecting a first one or more SL resources within the first determined set for reservation, transmitting information about the first one or more SL resources, and receiving inter UE co-ordination information indicating whether a SL resource in the first one or more SL resources has a conflict. The method further includes transmitting on one of the first one or more SL resources, when the one SL resource does not have a conflict; and determining a second set of SL resources based on SL sensing and resource exclusion, and selecting a second one or more SL resources within the second set for transmission and reservation, when all of the first one or more SL resources have a conflict.

METHOD AND APPARATUS FOR INTER-USER EQUIPMENT COORDINATION SIGNALING (18339225)

Main Inventor

Emad N. Farag

Brief explanation

The abstract describes methods and devices for coordinating signaling between user equipment (UE) in a wireless communication system. The UE performs SL sensing to determine a set of SL resources, and then selects one or more resources from this set for reservation. Information about these reserved resources is transmitted, and the UE receives information indicating if there is a conflict with any other UE. If there is no conflict, the UE transmits on the reserved resource. If there is a conflict, the UE determines a new set of SL resources and selects one or more resources from this new set for transmission and reservation.

Abstract

Methods and apparatuses for inter user equipment (UE) coordination signaling. A method of operating a UE includes determining a first set of first sidelink (SL) resources based on SL sensing and resource exclusion; selecting a first one or more SL resources within the first determined set for reservation, transmitting information about the first one or more SL resources, and receiving inter UE co-ordination information indicating whether a SL resource in the first one or more SL resources has a conflict. The method further includes transmitting on one of the first one or more SL resources, when the one SL resource does not have a conflict; and determining a second set of SL resources based on SL sensing and resource exclusion, and selecting a second one or more SL resources within the second set for transmission and reservation, when all of the first one or more SL resources have a conflict.

HARQ PROCESS MANAGEMENT METHOD AND APPARATUS FOR SLOT AGGREGATION (18311548)

Main Inventor

Euichang Jung

Brief explanation

The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology. This allows for higher data rates and supports various intelligent services such as smart home, smart city, and healthcare. The method involves a terminal receiving control information and data from a base station, and transmitting an acknowledgement back to the base station.

Abstract

The present disclosure relates to a communication method and system for converging a fifth generation (5G) communication system for supporting higher data rates beyond a fourth generation (4G) system with a technology for Internet of things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method of operating a terminal for a slot aggregation signaling is provided. The method includes receiving control information including slot aggregation information from a base station, receiving data in aggregated slots based on the slot aggregation information from the base station, and transmitting an acknowledgement (ACK) corresponding to the data to the base station.

METHOD AND DEVICE FOR COMMUNICATION IN WIRELESS COMMUNICATION SYSTEM SUPPORTING GROUPCAST (18341355)

Main Inventor

Sungjin PARK

Brief explanation

The abstract describes a method used by a user equipment (UE) in a wireless communication system. The UE receives downlink control information (DCI) from a base station on a physical downlink control channel (PDCCH). This DCI schedules downlink data for the UE. The UE then receives the downlink data on a physical downlink shared channel (PDSCH) based on the received DCI. In response to receiving the downlink data, the UE transmits hybrid automatic repeat request acknowledgement (HARQ-ACK) information to the base station. However, if the downlink data is multicast data, a specific PDSCH processing capability associated with transmitting the HARQ-ACK information is not applied to the PDSCH scheduled for the UE.

Abstract

Disclosed is a method performed by a user equipment (UE) in a wireless communication system, including receiving, from a base station, downlink control information (DCI) on a physical downlink control channel (PDCCH), the DCI scheduling downlink data for the UE, receiving the downlink data on a physical downlink shared channel (PDSCH) based on the received DCI, and transmitting, to the base station, hybrid automatic repeat request acknowledgement (HARQ-ACK) information in response to the reception of the downlink data, wherein a specific PDSCH processing capability associated with the transmission of the HARQ-ACK information is not applied to the PDSCH scheduled for the UE in case that the downlink data is multicast data.

DYNAMIC SPECTRUM SHARING (18163863)

Main Inventor

Jung Hyun BAE

Brief explanation

The abstract describes a system and method for dynamic spectrum sharing. It explains that the method involves a User Equipment (UE) processing a transmission that overlaps with a Long Term Evolution Cell Specific Reference Signal (LTE CRS) transmission in an orthogonal frequency division multiplexing (OFDM) symbol and a Resource Block (RB). The first transmission can include a Physical Downlink Control Channel (PDCCH) Demodulation Reference Symbol (DMRS) transmission, a Physical Downlink Shared Channel (PDSCH) DMRS transmission, or a PDCCH data transmission.

Abstract

A system and a method are disclosed for dynamic spectrum sharing. In some embodiments, the method includes: processing, by a User Equipment (UE), a first transmission overlapping, in an orthogonal frequency division multiplexing (OFDM) symbol and in a Resource Block (RB), a Long Term Evolution Cell Specific Reference Signal (LTE CRS) transmission, the first transmission including: a Physical Downlink Control Channel (PDCCH) Demodulation Reference Symbol (DMRS) transmission, or a Physical Downlink Shared Channel (PDSCH) DMRS transmission, or a PDCCH data transmission.

SYSTEMS AND METHODS FOR COLLISION HANDLING AND SEMI-PERSISTENTLY SCHEDULED PHYSICAL DOWNLINK SHARED CHANNEL RELEASE (18207574)

Main Inventor

Hamid Saber

Brief explanation

The abstract describes a method for releasing a type of data channel called a semi-persistently scheduled physical downlink shared channel (PDSCH). The method involves receiving a control signal called a semi-persistently scheduled release physical downlink control channel (PDCCH) in a specific cell. This control signal identifies a number of PDSCH configurations that need to be released. The method then identifies a time slot in the cell where the control signal overlaps with the end of a specific symbol. It also identifies a subset of the PDSCH configurations that are scheduled in that time slot. Finally, the method releases a specific number of PDSCH configurations from the subset based on the position of the end symbol in the control signal.

Abstract

A method for releasing a semi-persistently scheduled (SPS) physical downlink shared channel (PDSCH) includes: receiving, by a PDSCH manager of a user equipment, a SPS release physical downlink control channel (PDCCH) in a scheduling cell, the SPS release PDCCH identifying N SPS PDSCH configuration indices to be released; identifying a slot of a scheduled cell, where the slot of the scheduled cell overlaps with the end of an ending symbol of the SPS release PDCCH; identifying M SPS PDSCH configuration indices including all configuration indices from among the N SPS PDSCH configuration indices that are scheduled in the slot; and releasing L SPS PDSCH configuration indices among the M SPS PDSCH configuration indices based on determining that the ending symbol of the SPS release PDCCH is before a corresponding ending symbol associated with each of the L SPS PDSCH configuration indices of the slot.

METHOD AND APPARATUS FOR DYNAMIC DOWNLINK MULTI-BEAM OPERATIONS (18313216)

Main Inventor

Md. Saifur Rahman

Brief explanation

This abstract describes a method for operating a user equipment (UE) in a wireless communication system. The UE receives configuration information about a transmission configuration indicator (TCI) state indication through a downlink control information (DCI). The configuration information includes a set of TCI states and information for configuring the DCI from either a downlink DCI (DL-DCI) or a DL-TCI-DCI. The DL-DCI schedules a DL physical shared channel assignment, while the DL-TCI-DCI is a dedicated DCI for TCI state indication. The UE decodes the configured DCI to obtain a TCI state update and determines a receive beam based on this update. The receive beam is then applied for the reception of either a downlink control or downlink data.

Abstract

A method for operating a user equipment (UE) comprises receiving configuration information about a transmission configuration indicator (TCI) state indication via a downlink control information (DCI), the configuration information including a set of TCI states and information for configuring the DCI from one of a downlink (DL) DCI (DL-DCI) and a DL-TCI-DCI, wherein the DL-DCI schedules a DL physical DL shared channel (PDSCH) assignment and the DL-TCI-DCI is a dedicated DCI for TCI state indication; receiving, based on the configuration information, the configured DCI; decoding the configured DCI to obtain a TCI state update; determining a receive beam based on the TCI state update; and applying the receive beam for a reception of a DL control or a DL data.

METHOD AND APPARATUS FOR DYNAMIC ADAPTATION ON PERIODIC OR SEMI-PERSISTENT UPLINK TRANSMISSIONS (18295816)

Main Inventor

Hongbo Si

Brief explanation

This abstract describes apparatuses and methods for dynamic adaptation on periodic or semi-persistent uplink transmissions in a wireless communication system. The method involves a user equipment (UE) receiving a set of configurations from a higher layer. From this set, the UE identifies a first set of configurations that indicate resources for a periodic or semi-persistent uplink transmission. The UE also identifies a second set of configurations for a physical downlink control channel (PDCCH) that includes a downlink control information (DCI) format with adaptation information.

The method further involves the UE performing the periodic or semi-persistent uplink transmission based on the first set of configurations. The UE then receives the PDCCH with the DCI format based on the second set of configurations. Using the adaptation information, the UE identifies a third set of configurations that indicate the resources for the periodic or semi-persistent uplink transmission. Finally, the UE performs the periodic or semi-persistent uplink transmission based on the third set of configurations.

Abstract

Apparatuses and methods for dynamic adaptation on periodic or semi-persistent uplink transmissions are provided. A method of user equipment (UE) in a wireless communication system includes receiving a set of configurations from a higher layer, identifying, from the set of configurations, a first set of configurations indicating resources for a periodic or semi-persistent uplink transmission, and identifying, from the set of configurations, a second set of configurations for a physical downlink control channel (PDCCH) including a downlink control information (DCI) format, wherein the DCI format includes adaptation information. The method further includes performing the periodic or semi-persistent uplink transmission based on the first set of configurations, receiving the PDCCH including the DCI format based on the second set of configurations, identifying, based on the adaptation information, a third set of configurations indicating the resources for the periodic or semi-persistent uplink transmission, and performing the periodic or semi-persistent uplink transmission based on the third set of configurations.

TARGET WAKE TIME OPERATION FOR ENHANCED MULTI-LINK MULTI-RADIO OPERATION (18295807)

Main Inventor

Rubayet Shafin

Brief explanation

The abstract describes methods and devices for supporting a target wake time operation in a wireless communication system. This involves a non-access point (AP) device with multiple stations forming links with multiple APs. The device establishes an enhanced multi-link multi-radio (EMLMR) mode of operation with the APs and sets up a restricted target wake time (r-TWT) schedule on one of the links. The device determines its operating mode with the APs and schedules traffic on the links based on the r-TWT schedule.

Abstract

Methods and apparatuses for supporting target wake time operation for enhanced multi-link multi-radio operation. A method for wireless communication performed by a non-access point (AP) multi-link device (MLD) that comprises stations (STAs), the method comprising: forming a first enhanced multi-link multi-radio (EMLMR) link for an EMLMR mode of operation with a first AP of an AP MLD; forming a second EMLMR link for the EMLMR mode of operation with a second AP of the AP MLD; establishing a first restricted target wake time (r-TWT) schedule that has an r-TWT service period (SP) is established on the first EMLMR link; determining that the non-AP MLD is operating in the EMLMR mode of operation with the AP MLD; and determining, based on the r-TWT SP, scheduling for traffic on the first EMLMR link and the second EMLMR link.

APPARATUS AND METHOD FOR SLICE CONTROL AND CELL CONTROL IN WIRELESS COMMUNICATION SYSTEM (18310783)

Main Inventor

Junhyuk SONG

Brief explanation

The abstract describes a communication system that supports higher data rates than the previous 4G system (LTE). The system involves a distributed unit (DU) transmitting resource policy information to a near-real time (near-RT) radio access network (RAN) intelligent controller (RIC). The DU then receives a control message from the RT RIC based on the resource policy information.

Abstract

The disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a higher data rate after a 4th generation (4G) communication system such as long-term evolution (LTE). According to various embodiments of the disclosure, a method performed by a distributed unit (DU) may include: transmitting, to a near-real time (near-RT) radio access network (RAN) intelligent controller (RIC), an E2 report message including resource policy information related to a shared resource, a prioritized resource, and a dedicated resource of a radio resource for a rRMPolicyMemberList; receiving, from the RT RIC, an E2 control message generated based on the resource policy information; and

ELECTRONIC DEVICE THAT CARRIES OUT COMMUNICATION AND OPERATION METHOD THEREFOR (18337859)

Main Inventor

Misun KIM

Brief explanation

This abstract describes an electronic device that is capable of communication and provides a method for its operation. The device includes a short-range communication circuit and one or more processors connected to it. The processors can establish a communication connection with an external device, transmit information related to this connection to another external device, receive notification from the second external device about the establishment of a new communication connection, and then terminate the initial connection.

Abstract

An electronic device that carries out communication and an operation method therefor are provided. The electronic device includes a short-range communication circuit and at least one processor operatively connected to the short-range communication circuit, wherein the at least one processor may be configured to establish a first communication connection to a first external electronic device via the short-range communication circuit, transmit, to a second external electronic device via the short-range communication circuit, first information associated with the first communication connection, if an event requiring a second communication connection between the second external electronic device and the first external electronic device occurs in the second external electronic device, receive, from the second external electronic device via the short-range communication circuit, second information notifying that the second communication connection will be established, and disestablish the first communication connection via the short-range communication circuit.

RELATING TO NETWORK INTERCONNECTIVITY (18341180)

Main Inventor

Himke VAN DER VELDE

Brief explanation

The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology. This allows for higher data rates than the previous 4G system and enables various intelligent services such as smart home, smart city, and connected car. The method involves a telecommunication system with multiple connections, where one node uses one type of radio technology and another node uses a different type. A User Equipment (UE) is configured based on its capabilities with each node.

Abstract

The present disclosure relates to a communication method and system for converging a 5-Generation (5G) communication system for supporting higher data rates beyond a 4-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. Disclosed is a method of operating a telecommunication system operating in a multi-connectivity configuration, wherein a first node operates a first radio connection using a first Radio Access Technology, RAT, and a second node operates a second radio connection using a second RAT, wherein a User Equipment, UE, operable to communicate over first and second radio connections, is configured on the basis of its capabilities with respect to the first node and its capabilities with respect to the second node.

TUNNELED DIRECT-LINK SETUP CHANNEL SWITCHING WITH NON-SIMULTANEOUS TRANSMIT AND RECEIVE OPERATION (17842668)

Main Inventor

Rubayet Shafin

Brief explanation

This abstract describes methods and devices used to avoid violating NSTR (Non-Scheduled Traffic Request) constraints in a wireless local area network. Specifically, it focuses on the issue of TDLS (Tunneled Direct Link Setup) channel switching and link enablement in multi-link operation (MLO). 

The methods involve determining when to switch the frequency channel used by a TDLS direct link from one channel to another. This direct link is established between a station (STA) of a non-access point (AP) multi-link device (MLD) and a corresponding peer STA.

To facilitate the channel switch, a TDLS channel switch notification message is generated. This message includes an indication that the TDLS direct link is switching from the first frequency channel to the second frequency channel.

Finally, the TDLS channel switch notification message is transmitted to an AP MLD (to which the non-AP MLD is associated) on an MLO link. MLO links are formed between STAs of the non-AP MLD and APs of the AP MLD.

In summary, this abstract presents a solution for managing TDLS channel switching and link enablement in a wireless network to avoid violating NSTR constraints.

Abstract

Methods and apparatuses for facilitating avoidance of NSTR constraint violation caused by TDLS channel switching and link enablement in multi-link operation (MLO) in a wireless local area network. The methods include determining to switch a frequency channel used by a first tunneled direct link setup (TDLS) direct link from a first frequency channel to a second frequency channel, wherein the TDLS direct link is formed between a station (STA) of a non-access point (AP) multi-link device (MLD) and a corresponding peer STA, generating a TDLS channel switch notification message that includes an indication that the first TDLS direct link is switching from the first to the second frequency channel, and transmitting, to an AP MLD with which the non-AP MLD is associated, on an MLO link, the TDLS channel switch notification message, wherein MLO links are formed between STAs of the non-AP MLD and APs of the AP MLD.

METHOD AND SYSTEM FOR RELEASING PDU SESSION (18042732)

Main Inventor

Lalith KUMAR

Brief explanation

The abstract describes a method and a User Equipment (UE) for releasing a Packet Data Unit (PDU) session. The UE detects that it is in a restricted service area and in response, it releases the PDU session's Packet Traffic Identifier (PTI) that it had allocated. The UE then locally releases the PDU session. Additionally, the UE sends information about the PDU session to the network when a registration procedure is triggered later on.

Abstract

Present disclosure relates to a method and a UE for releasing PDU session. The UE identifies that the UE is in a restricted service area. Upon identifying that the UE is in the restricted service area, the UE releases PTI allocated by the UE and performs a local release of the PDU session. Further, the UE provides, to a network, information related to the PDU session, based on a subsequent trigger of a registration procedure.

METHOD AND APPARATUS FOR NETWORK SWITCHING (17788207)

Main Inventor

David Gutierrez ESTEVEZ

Brief explanation

The abstract describes a communication system that supports higher data rates beyond the current 4G LTE system. The system involves a network node (NG-RAN), a core node, and a content provider. The method involves transmitting data from the content provider to a user equipment (UE) using a first data transmission mode in a first session. Then, a decision is made by the UE, NG-RAN node, core node, or content provider to switch to a second data transmission mode. The core node initializes a second session for the second data transmission mode and switches from the first mode to the second mode. Finally, the NG-RAN node transmits second data from the content provider to the UE using the second data transmission mode in the second session.

Abstract

The present disclosure relates to a pre-5G or 5G communication system to be provided for supporting higher data rates beyond 4G communication system such as LTE. A method for switching from a first data transmission mode to a second data transmission mode comprising a NG-RAN node, a core node and a content provider, wherein method comprises transmitting, by NG-RAN node, first data from content provider to a UE according to first data transmission mode in a first session; deciding, by UE or NG-RAN node or core node or content provider, to switch from first data transmission mode to second data transmission mode; initializing, by core node, a second session for second data transmission mode; switching, by core node, from first data transmission mode to second data transmission mode; and transmitting, by NG-RAN node, second data from content provider to UE according to second data transmission mode in second session.

DISPLAY APPARATUS (18110704)

Main Inventor

Sanggoo LEE

Brief explanation

The abstract describes a display apparatus that includes a display panel, a support bracket, a support arm, and a support stand. The support arm is able to rotate between two orientations, and the support stand allows the support arm to move vertically. The support arm has a limiting link that is positioned differently depending on the orientation of the display panel.

Abstract

A display apparatus is provided. The display apparatus includes: a display panel; a support bracket coupled to the display panel; a support arm coupled to the support bracket and supporting the display panel, wherein the support arm is configured to rotate between a first and second orientations; and a support stand supporting the support arm and defining a limiting groove, the support stand being configured to allow the support arm to move along a vertical direction. The support arm includes a limiting link configured to be in a first position that is offset from the limiting groove when the display panel is in the first orientation and a second position extending into the limiting groove when the display panel is in the second orientation.

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME (17968464)

Main Inventor

Jihoon AN

Brief explanation

This abstract describes a semiconductor device that consists of a substrate, a capacitor contact structure, and a lower electrode. The lower electrode is made up of two layers, with the second layer on top of the first layer. The first layer contains a specific element from a particular group. The device also includes a capacitor insulating layer and an upper electrode. The first layer of the lower electrode has an outer sidewall in contact with the capacitor insulating layer and an inner sidewall in contact with the second layer. The concentration of the group element in the inner sidewall is higher than in the outer sidewall.

Abstract

A semiconductor device includes a substrate, a capacitor contact structure electrically connected to the substrate, and a lower electrode connected to the capacitor contact structure. The lower electrode includes a first electrode layer and a second electrode layer, the second electrode layer is on the first electrode layer, and the first electrode layer includes a group  element. The device includes a capacitor insulating layer covering the lower electrode, and an upper electrode covering the capacitor insulating layer. The first electrode layer includes an outer sidewall in contact with the capacitor insulating layer, the first electrode layer includes an inner sidewall in contact with the second electrode layer, and a concentration of the group  element in the inner sidewall of the first electrode layer is higher than a concentration of the group  element in the outer sidewall of the first electrode layer.

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME (17981719)

Main Inventor

MIN HEE CHO

Brief explanation

The abstract describes semiconductor memory devices and their fabrication methods. These devices consist of a peripheral circuit structure with peripheral circuits on a semiconductor substrate and a first dielectric layer on top of the circuits. There is also a cell array structure on the substrate, with a shield layer between the peripheral circuit structure and the cell array structure. The cell array structure includes bit lines, first and second active patterns on the bit lines, first and second word lines that extend in a second direction on the active patterns, data storage patterns on the active patterns, and a second dielectric layer on the substrate. The first dielectric layer has a higher hydrogen concentration than the second dielectric layer.

Abstract

Disclosed are semiconductor memory devices and their fabrication methods. The semiconductor memory device comprises a peripheral circuit structure including peripheral circuits on a semiconductor substrate and a first dielectric layer on the peripheral circuits, a cell array structure on the semiconductor substrate, and a shield layer between the peripheral circuit structure and the cell array structure. The cell array structure includes bit lines, first and second active patterns on the bit lines, first word lines that extend in a second direction on the first active patterns, second word lines that extend in the second direction on the second active patterns, data storage patterns on the first and second active patterns, and a second dielectric layer on the semiconductor substrate. A hydrogen concentration of the first dielectric layer is greater than that of the second dielectric layer.

SEMICONDUCTOR DEVICE (18300180)

Main Inventor

Jungmin PARK

Brief explanation

The abstract describes a semiconductor device that has a cell capacitor. The capacitor consists of a first electrode, a dielectric layer structure, and a second electrode. The dielectric layer structure is made up of three layers. The first layer is made of a ferroelectric material, the second layer is made of an antiferroelectric material, and the third layer contains dielectric particles made of a paraelectric material. These layers are arranged on top of each other and are placed on a substrate.

Abstract

A semiconductor device includes a cell capacitor disposed on a substrate and that and includes a first electrode, a dielectric layer structure, and a second electrode. The dielectric layer structure includes a first dielectric layer disposed on the first electrode and that includes a ferroelectric material, a second dielectric layer disposed on the first dielectric layer and that includes an antiferroelectric material, and dielectric particles dispersed in at least one of the first dielectric layer or the second dielectric layer and that include a paraelectric material.

SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME (18337134)

Main Inventor

Minsu Choi

Brief explanation

The abstract describes a semiconductor memory device and a method of making it. The device includes a substrate with a pattern of doped regions. There is a gate electrode that crosses the pattern between the doped regions. A bit line also crosses the pattern and is connected to one of the doped regions. A spacer is present on the side of the bit line. There is a first contact that is connected to another doped region and is separated from the bit line by the spacer. A landing pad is located on the first contact, and a data storing element is placed on the landing pad. The other doped region has a top surface, an upper side surface, and a curved top surface that extends from the top surface to the upper side surface. The first contact is in contact with the curved top surface and the upper side surface.

Abstract

Disclosed are a semiconductor memory device and a method of fabricating the same. The device includes a substrate including an active pattern with doped regions, a gate electrode crossing the active pattern between the doped regions, a bit line crossing the active pattern and being electrically connected to one of the doped regions, a spacer on a side surface of the bit line, a first contact coupled to another of the doped regions and spaced apart from the bit line with the spacer interposed therebetween, a landing pad on the first contact, and a data storing element on the landing pad. The another of the doped regions has a top surface, an upper side surface, and a curved top surface that extends from the top surface to the upper side surface. The first contact is in contact with the curved top surface and the upper side surface.

MEMORY CORE CIRCUIT HAVING CELL ON PERIPHERY STRUCTURE AND MEMORY DEVICE INCLUDING THE SAME (18211807)

Main Inventor

Jaepil LEE

Brief explanation

The abstract describes a memory core circuit that consists of a memory cell array and a core control circuit. The core control circuit includes sub peripheral circuits located beneath each sub cell array. Each sub peripheral circuit has a sense amplifier region with multiple bitline sense amplifiers and a rest circuit region with other circuits. First-type bitline sense amplifiers are connected to first-type bitlines and are located in the sense amplifier region of each sub peripheral circuit. The first-type bitlines are positioned above the sense amplifier region. Second-type bitline sense amplifiers, connected to second-type bitlines, are located in the sense amplifier region of a neighboring sub peripheral circuit adjacent to the first sub peripheral circuit. The second-type bitlines are positioned above the rest region of each sub peripheral circuit.

Abstract

A memory core circuit includes a memory cell array including sub cell arrays and a core control circuit, which includes sub peripheral circuits that are disposed under each sub cell array. Each sub peripheral circuit includes a sense amplifier region, which includes a plurality of bitline sense amplifiers, and a rest circuit region, which includes other circuits. First-type bitline sense amplifiers, which are connected to first-type bitlines, are disposed in the sense amplifier region of each sub peripheral circuit, and the first-type bitlines are disposed above the sense amplifier region of each sub peripheral circuit. Second-type bitline sense amplifiers, which are connected to second-type bitlines, are disposed in the sense amplifier region of a neighboring sub peripheral circuit adjacent in the column direction to a first sub peripheral circuit of the sub peripheral circuit, and the second-type bitlines are disposed above the rest region of each sub peripheral circuit.

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME (18339881)

Main Inventor

Ga Eun Kim

Brief explanation

The abstract describes a semiconductor memory device and a method for making it. The device includes a peripheral logic structure on a substrate, a horizontal conductive substrate, a stacked structure of electrode pads, a plate contact plug, and a first penetration electrode. The upper surfaces of the plate contact plug and the first penetration electrode are on the same plane. The plate contact plug and the first penetration electrode have upper and lower parts that are directly connected to each other. As you move away from the upper surfaces, the widths of the upper parts increase and the widths of the lower parts decrease.

Abstract

A semiconductor memory device and a method for fabricating a semiconductor memory device, the device including a peripheral logic structure on a substrate; a horizontal conductive substrate on the peripheral logic structure; a stacked structure including a plurality of electrode pads stacked in a vertical direction; a plate contact plug connected to the horizontal conductive substrate; and a first penetration electrode connected to the lower connection wiring body, wherein upper surfaces of the plate contact plug and the first penetration electrode are on a same plane, the plate contact plug includes an upper part and a lower part directly connected to each other, the first penetration electrode includes an upper part and a lower part directly connected to each other, moving away from upper surfaces of the first penetration electrode and the plate contact plug, widths of the upper parts increase and widths of the lower parts decrease.

THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES (18340059)

Main Inventor

SEUNGWOO NAM

Brief explanation

The abstract describes a type of 3D semiconductor memory device that is built in a horizontal structure on top of a substrate. It consists of stacked horizontal patterns, electrodes, vertical patterns, and a separation structure. The lowermost electrode has inner sidewalls facing each other with the separation structure in between, as does the second horizontal pattern. The maximum distance between the inner sidewalls of the lowermost electrode is smaller than the maximum distance between the inner sidewalls of the second horizontal pattern.

Abstract

3D semiconductor memory devices may include a horizontal structure that may be on an upper surface of a substrate and may include first and second horizontal patterns sequentially stacked on the upper surface of the substrate, a stack structure including electrodes stacked on the horizontal structure, a vertical pattern extending through the electrodes and connected to the first horizontal pattern, and a separation structure intersecting the stack structure and the horizontal structure and protruding into the upper surface of the substrate. A lowermost electrode may have first inner sidewalls facing each other with the separation structure interposed therebetween. The second horizontal pattern may have second inner sidewalls facing each other with the separation structure interposed therebetween. A maximum distance between the first inner sidewalls in the first direction may be less than a maximum distance between the second inner sidewalls in the first direction.

SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME (18152310)

Main Inventor

Hyunmog PARK

Brief explanation

The abstract describes a semiconductor device that includes gate electrodes, vertical structures, and upper interconnection structures. The vertical structures consist of a back gate electrode, a ferroelectric material layer, a channel layer, and a gate insulating layer. The upper interconnection structures include bit lines, contact plugs, and back gate interconnections. The first upper interconnection structure connects to the first vertical structure, while the second upper interconnection structure connects to the second vertical structure.

Abstract

A semiconductor device includes gate electrodes extending in a first direction, first and second vertical structures passing through the gate electrodes, a first upper interconnection, and a second upper interconnection structure, the first and second vertical structures including a back gate electrode, a ferroelectric material layer, a channel layer, and a gate insulating layer, the first upper interconnection structure including bit lines extending in a second direction, a first contact plug connected to a lower surface of a first back gate electrode of the first vertical structure, and a first back gate interconnection extending between the bit lines in the second direction and connected to the first contact plug, and the second upper interconnection structure including a second contact plug connected to an upper surface of a second back gate electrode of the second vertical structure, and a second back gate interconnection extending in the second direction and connected to the second contact plug.

SRAM DEVICE AND 3D SEMICONDUCTOR INTEGRATED CIRCUIT THEREOF (18126761)

Main Inventor

Ho Young TANG

Brief explanation

The abstract describes a three-dimensional semiconductor integrated circuit and a static random access memory (SRAM) device. The circuit includes multiple dies, with the first die containing a power supply circuit, the second die containing an SRAM with a through-silicon-via (TSV) bundle region, and the third die containing a processor. The TSVs connect the TSV bundle region to the third die. The SRAM device consists of a bank array with sub-bit-cell arrays and a local peripheral circuit region arranged in a cross shape. It also includes a global peripheral circuit region with a tail peripheral circuit region extending in one direction and a head peripheral circuit region extending in another direction, forming a T shape.

Abstract

Provided are a three-dimensional (3D) semiconductor integrated circuit and a static random access memory (SRAM) device. The three-dimensional (3D) semiconductor integrated circuit includes: a first die including a power supply circuit a second die including an SRAM with a through-silicon-via (TSV) bundle region; a third die including a processor; and TSVs, each of which is provided on the TSV bundle region and extends from the TSV bundle region to the third die. The SRAM device includes: a bank array with banks, each of which includes sub-bit-cell arrays and a local peripheral circuit region arranged in a cross (+) shape between the sub-bit-cell arrays; and a global peripheral circuit region including a tail peripheral circuit region extending in a first direction and a head peripheral circuit region extending in a second direction, the tail peripheral circuit region and the head peripheral circuit region being arranged in a “T” shape.

VARIABLE RESISTANCE MEMORY DEVICE (18338707)

Main Inventor

Seyun KIM

Brief explanation

This abstract describes a type of memory device that uses a variable resistance layer. The device consists of a first conductive element, a second conductive element, and the variable resistance layer. The variable resistance layer is made up of two layers, with the second layer having a different valence (a measure of the number of electrons in an atom's outer shell) than the first layer. The first and second conductive elements are placed on the variable resistance layer, but are separated from each other. This creates a path for electric current to flow through the variable resistance layer in a direction perpendicular to the stacking direction of the two layers.

Abstract

A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer including a first material and a second layer on the first layer and the second layer including a second material. The second material has a different valence than a valence of the first material. The first conductive element and the second conductive element are on the variable resistance layer and separated from each other to form an electric current path in the variable resistance layer in a direction perpendicular to a direction in which the first layer and the second layer are stacked.