US Patent Application 18338237. FLIP-FLOP CIRCUITRY simplified abstract
Contents
FLIP-FLOP CIRCUITRY
Organization Name
Inventor(s)
FLIP-FLOP CIRCUITRY - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18338237 Titled 'FLIP-FLOP CIRCUITRY'
Simplified Explanation
The abstract describes a flip-flop circuit that consists of a clock generator, a master-slave latch circuit, and a feedback path. The clock generator generates two clock signals with different phases. The master latch includes a scan path and a data path. The scan path produces a scan path signal when a scan enable signal and a scan input signal are received. The data path generates a first latch signal based on a data signal and the scan path signal. The feedback path includes a tri-state inverter that is controlled by the clock signals. The tri-state inverter connects the data path output to a node of the scan path.
Original Abstract Submitted
A flip-flop circuit includes a clock generator configured to generate first and second clock signals having different phases relative to each other, and a master-slave latch circuit including master and slave latches. The master latch includes a scan path configured to output a scan path signal in response to a scan enable signal and a scan input signal, and a data path configured to output a first latch signal in response to a data signal and the scan path signal. A feedback path is provided, which includes a tri-state inverter responsive to the first and second clock signals. The tri-state inverter has an input terminal connected to an output terminal of the data path and an output terminal connected to a node of the scan path.
